Search results for "ASIC"

Hits ?▲	Authors	Title	Venue	Year	Link
14	Malik Imran, Felipe Almeida, Jaan Raik, Andrea Basso 0002, Sujoy Sinha Roy, Samuel Pagliarini	Design Space Exploration of SABER in 65nm ASIC.	CoRR	2021	DBLP BibTeX RDF
14	Bobby Sleeba, Mikael Collin, Mats Brorsson	An ASIC Implementation and Evaluation of a Profiled Low-Energy Instruction Set Architecture Extension.	CoRR	2021	DBLP BibTeX RDF
14	Tiago Diadami Perez, Marcio M. Gonçalves, José Rodrigo Azambuja, Leonardo Gobatto, Marcelo Brandalero, Samuel Pagliarini	G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators.	CoRR	2021	DBLP BibTeX RDF
14	Mateus Saquetti, Raphael Martins Brum, Bruno Zatt, Samuel Pagliarini, Weverton Cordeiro, José Rodrigo Azambuja	A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization.	CoRR	2021	DBLP BibTeX RDF
14	Ankit Wagle, Sunil P. Khatri, Sarma B. K. Vrudhula	A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells.	CoRR	2021	DBLP BibTeX RDF
14	T. Suresh, Z. Brijet	Optimised fault tolerant core-based ASIC design for SRAM.	Int. J. Manuf. Technol. Manag.	2021	DBLP DOI BibTeX RDF
14	Malik Imran, Felipe Almeida, Jaan Raik, Andrea Basso 0002, Sujoy Sinha Roy, Samuel Pagliarini	Design Space Exploration of SABER in 65nm ASIC.	IACR Cryptol. ePrint Arch.	2021	DBLP BibTeX RDF
14	Mark D. Aagaard, Nusa Zidaric	ASIC Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: (Preliminary Results).	IACR Cryptol. ePrint Arch.	2021	DBLP BibTeX RDF
14	Taehoon Kim, Fabian Fool, Djalma Simões dos Santos, Zu-Yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs	Design of an Ultrasound Transceiver ASIC with a Switching-Artifact Reduction Technique for 3D Carotid Artery Imaging.	Sensors	2021	DBLP DOI BibTeX RDF
14	Pawel Kopciewicz, Kazuyoshi Carvalho Akiba, Tomasz Szumlak, Sebastian Sitko, William Barter, Jan Buytaert, Lars Eklund, Karol Hennessy, Patrick Koppenburg, Thomas Latham, Maciej Majewski, Agnieszka Oblakowska-Mucha, Chris Parkes, Wenbin Qian, Jaap Velthuis, Mark Williams	Simulation and Optimization Studies of the LHCb Beetle Readout ASIC and Machine Learning Approach for Pulse Shape Reconstruction.	Sensors	2021	DBLP DOI BibTeX RDF
14	Mingliang Wang, Ronghua Qin, Jiang Wang 0013, Xinyi Zhang, Zhengfeng Gu, Baoqing Li, Xiaobing Yuan	A serial-timing multi-channel CMOS charge readout ASIC for X-ray detectors.	IEICE Electron. Express	2021	DBLP DOI BibTeX RDF
14	Peter J. Adams, Brannon Batson, Alistair Bell, Jhanvi Bhatt, J. Adam Butts, Timothy Correia, Bruce Edwards, Peter Feldmann, Christopher H. Fenton, Anthony Forte, Joseph Gagliardo, Gennette Gill, Maria Gorlatova, Brian Greskamp, J. P. Grossman, Jeremy Hunt, Bryan L. Jackson, Mollie M. Kirk, Jeffrey Kuskin, Roy J. Mader, Richard McGowen, Adam McLaughlin, Mark A. Moraes, Mohamed Nasr, Lawrence J. Nociolo, Lief O'Donnell, Andrew Parker, Jon L. Peticolas, Terry Quan, T. Carl Schwink, Keun Sup Shim, Naseer Siddique, Jochen Spengler, Michael Theobald, Brian Towles, William Vick, Stanley C. Wang, Michael E. Wazlowski, Madeleine J. Weingarten, John M. Williams, David E. Shaw	The ΛNTON 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics Simulations.	HCS	2021	DBLP DOI BibTeX RDF
14	Malik Imran, Felipe Almeida, Jaan Raik, Andrea Basso 0002, Sujoy Sinha Roy, Samuel Pagliarini	Design Space Exploration of SABER in 65nm ASIC.	ASHES@CCS	2021	DBLP DOI BibTeX RDF
14	Sarah Hesham, Mohamed Shalan, M. Watheq El-Kharashi, Mohamed Dessouky	Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison.	MWSCAS	2021	DBLP DOI BibTeX RDF
14	Mateus Saquetti, Raphael Martins Brum, Bruno Zatt, Samuel Pagliarini, Weverton Cordeiro, José Rodrigo Azambuja	A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization.	ISVLSI	2021	DBLP DOI BibTeX RDF
14	Abdelrahman Sobeih Hussein, Hassan Mostafa	ASIC-FPGA Gap for a RISC-V Core Implementation for DNN Applications.	NILES	2021	DBLP DOI BibTeX RDF
14	Md Iftakharul Islam, Javed I. Khan	CP-Trie: Cumulative PopCount based Trie for IPv6 Routing Table Lookup in Software and ASIC.	HPSR	2021	DBLP DOI BibTeX RDF
14	Spencer Nelson, Sang Yun Kim 0002, Jia Di, Zhe Zhou, Zhihang Yuan, Guangyu Sun 0003	Reconfigurable ASIC Implementation of Asynchronous Recurrent Neural Networks.	ASYNC	2021	DBLP DOI BibTeX RDF
14	Susmita Dey Manasi, Sachin S. Sapatnekar	DeepOpt: Optimized Scheduling of CNN Workloads for ASIC-based Systolic Deep Learning Accelerators.	ASP-DAC	2021	DBLP DOI BibTeX RDF
14	Alexander Frank, Bart Kootte, Thorsten Göttsche, Peter Jutte, Jean Schleipen, Vincent Henneken, Martin van der Mark, Eckardt Bihler, Paul Dijkstra, Jens Anders, Joachim N. Burghartz	A 96-Channel Electrophysiology Catheter with Integrated Read-Out ASIC and Optical Link.	EMBC	2021	DBLP DOI BibTeX RDF
14	Eman Hassan, Huruy Tekle Tesfai, Baker Mohammad, Hani H. Saleh	ASIC Implementation of Associative Memory and Hamming Distance for HDC Application.	ICECS	2021	DBLP DOI BibTeX RDF
14	Clive Seguna, Edward Gatt, Ivan Grech, Owen Casha, Giacinto De Cataldo	Development of an New ASIC based, Multi-channel Data Acquisition and Real-Time Processing System.	ICIT	2021	DBLP DOI BibTeX RDF
14	Osaze Shears, Kangjun Bai, Lingjia Liu 0001, Yang Yi 0002	A Hybrid FPGA-ASIC Delayed Feedback Reservoir System to Enable Spectrum Sensing/Sharing for Low Power IoT Devices ICCAD Special Session Paper.	ICCAD	2021	DBLP DOI BibTeX RDF
14	Prajith Kumar Poongodan, Oleg Sakolski, Frank Vanselow, Linus Maurer	An 8 Channel Transceiver ASIC to Interface a CMUT Array.	NEWCAS	2021	DBLP DOI BibTeX RDF
14	Alexander Hofmann, Peggy Reich, Martin Grabmann, Georg Gläser, Alexander Rolapp, Marco Reinhard, Eric Schäfer, Max Trübenbach, Friedrich Scholz	Filterless TRF Reader with CMOS Sensor ASIC for Lateral Flow Immunoassays.	BioCAS	2021	DBLP DOI BibTeX RDF
14	Lindong Wu, Zongwei Wang, Ming Zhao, Wei Hu, Yimao Cai, Ru Huang	A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural Network.	ISCAS	2021	DBLP DOI BibTeX RDF
14	Wei Tu, Miguel Cacho-Soblechero, Dan Terracina, Paul H. Strutton, Pantelis Georgiou	A 4-Channel sEMG ASIC with Real-Time Muscle Fatigue Feature Extraction.	ISCAS	2021	DBLP DOI BibTeX RDF
14	Rohit B. Chaurasiya, Rahul Shrestha	Hardware-Efficient ASIC Implementation of Eigenvalue Based Spectrum Sensor Reconfigurable-Architecture for Cooperative Cognitive-Radio Network.	ISCAS	2021	DBLP DOI BibTeX RDF
14	David Ariando, Yiqiao Tang, Shin Utsuzawa, Yi-Qiao Song, Soumyajit Mandal	A Compact GaNFET-Based Power Amplifier for ASIC-Based Miniature NMR Spectrometers.	ISCAS	2021	DBLP DOI BibTeX RDF
14	Tomoyuki Akiyama, Motoyuki Nishizawa, Akio Sugama, Yasuhiro Nakasha, Shinsuke Tanaka, Yu Tanaka, Shoichiro Oda, Takeshi Hoshida	Demonstration of Crosstalk-Free WDM Demultiplexing on Si Nanowire PIC Controlled by Si CMOS ASIC.	OFC	2021	DBLP BibTeX RDF
14	Zhixiong Di, Yongming Tang, Jiahua Lu, Zhaoyang Lv	ASIC Design Principle Course with Combination of Online-MOOC and Offline-Inexpensive FPGA Board.	ACM Great Lakes Symposium on VLSI	2021	DBLP DOI BibTeX RDF
14	Fan Ye, Ting-Ao Tang (eds.)	14th IEEE International Conference on ASIC, ASICON 2021, Kunming, China, October 26-29, 2021	ASICON	2021	DBLP DOI BibTeX RDF
14	Jaehyuk So, Dong-Hyun Lee, Min-Joon Kim, Yeon-Kug Moon	ASIC Implementation of Magnetic Induction based Wireless Communication System.	ISOCC	2021	DBLP DOI BibTeX RDF
14	Anupam Chattopadhyay, Mustafa Khairallah, Gaëtan Leurent, Zakaria Najm, Thomas Peyrin, Vesselin Velichkov	On the Cost of ASIC Hardware Crackers: A SHA-1 Case Study.	CT-RSA	2021	DBLP DOI BibTeX RDF
14	Bambang Suparjo, Jugantor Chetia, Ankit R. Shah	Seamless Physical Implementation of ASIC Hierarchical Integrated Scan Architecture.	ITC	2021	DBLP DOI BibTeX RDF
14	Han Wu 0003, Miaolin Zhang, Jiaqi Guo, Zhichun Shao, Kian Ann Ng, Jiamin Li, Lian Zhang, Yilong Dong, Liuhao Wu, Chne-Wuen Tsai, Ho Yin Benjamin Lee, Liwei Lin, Jerald Yoo	A 7m-range, 4.3mW/Ch. Ultrasound ASIC with Universal Energy Recycling TX for All-Weather Metamorphic Robotic 3D Vision System.	A-SSCC	2021	DBLP DOI BibTeX RDF
14	Spencer Nelson, Wassim Khalil, SangYun Kim 0002, Jia Di, Zhe Zhou, Zhihang Yuan, Guang-Yu Sun 0003	Rapid Configuration of Asynchronous Recurrent Neural Networks for ASIC Implementations.	HPEC	2021	DBLP DOI BibTeX RDF
14	Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli	LUT-Based Optimization For ASIC Design Flow.	DAC	2021	DBLP DOI BibTeX RDF
14	Zhecheng Guo, Yuejun Zhang, Suling Xu, Zhixin Wu, Wanlong Zhao	A Multi-conductance States Memristor-based CNN Circuit Using Quantization Method for Digital Recognition.	ASICON	2021	DBLP DOI BibTeX RDF
14	Haige Wu, Xuan Zhang, Xiaoling Ding, Ziyu Wang, Anfeng Xue, Yu Gong, Bo Liu 0019	An Always-on Ultra-Low Power Speaker Verification Accelerator based on Binary Weighted Neural Network with System Co-optimization.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yuki Sekine, Shogo Katayama, Yasunori Kobori, Anna Kuwana, Haruo Kobayashi 0001	Multi-Output SEIPC Multiplied Boost Converter with Exclusive Control.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yuyuan Tian, Lianxi Liu	A High-Sensitivity, Low-Power Dual-Band RF Energy Harvesting and Managing System for Bio-Potential Acquisition.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yongshuai Sun, Mengyu Guo, Dacheng Liang, Shan Tang, Naifeng Jing	Exploiting Dynamic Bit Sparsity in Activation for Deep Neural Network Acceleration.	ASICON	2021	DBLP DOI BibTeX RDF
14	Ziwei Li, Yutong Zhao, Guoyao Wu, Fan Ye 0001, Junyan Ren	A Wide-Range 12b 150MS/s P-SAR ADC with Open-Loop Residue Amplifier for Ultrasound AFE.	ASICON	2021	DBLP DOI BibTeX RDF
14	Thurein Aung, Mahalingam Nagarajan, Kiat Seng Yeo	A New Degeneration Technique for 60 GHz Triple Cascode Wideband Low Noise Amplifier.	ASICON	2021	DBLP DOI BibTeX RDF
14	Hao Jiang, Jinsong Wei, Ye Li, Jikai Lu, Tuo Shi, Qi Liu	Design of Multi-core Spiking Neural Network Chip Based on Butterfly Network.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yue Shi 0001, Zuao Wang, Zekun Zhou, Zhuo Wang 0007, Bo Zhang 0027	A Segmented and Linear Frequency Controller for Flyback Converters.	ASICON	2021	DBLP DOI BibTeX RDF
14	RiMing Jia, Tu Xu, Yuchun Chang	Scalable Systolic Array Multiplier Optimized by Sparse Matrix.	ASICON	2021	DBLP DOI BibTeX RDF
14	Jiankun Huang, Xinjie Feng, Congying Zhou, Yongzhen Chen	A High-Performance Mel-scale Frequency Cepstral Coefficients Digital Circuit Used on Keyword-Spotting Chip.	ASICON	2021	DBLP DOI BibTeX RDF
14	Wei Liu, Gang Liu 0016, Bing He, Jie Zhang, Hanlin Qin, Shuai Yuan	Development of MEMS Capacitive Mirror Structure with CMOS Compatible Process.	ASICON	2021	DBLP DOI BibTeX RDF
14	Renyuan Zhang, Xuetao Wang, Ziyu Wang, Anfeng Xue, Haichuan Yang, Yu Gong, Bo Liu 0019	Mutual Error Compensation based Area and Power efficient Approximate Multiplier.	ASICON	2021	DBLP DOI BibTeX RDF
14	Peng Feng 0001, Liyuan Liu, Nanjian Wu	Pixel Design of Ultra-high Speed CMOS Image Sensor.	ASICON	2021	DBLP DOI BibTeX RDF
14	Ai He, Weixin Gai, Kai Sheng, Ninghuang Li	An Adaptive DFE Using Pattern-Dependent Data-Level Reference in 28 nm CMOS Technology.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yinchuan Gu, Chris Eom, Jake Jung, Brian Lee 0003, Edwin Kim, Kanyu Cao	A 2-stage with 3-stack 1-tap DFE Sense Amplifier based on Dual Reference for High Speed & Low Power DRAM Interface.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xiaoxu Kang, Xiaolan Zhong, Zhangfa Chen, Zhengkai Dao, Qiang Zhang, Hao Wan, Yamin Zhou, Ming Li, Yingjia Guo, Ran Nie, Tao Wu	Development and Characterization of High Temperature Plasma Nitridation Process for Advanced CMOS Technology Application.	ASICON	2021	DBLP DOI BibTeX RDF
14	Jiangbo Wei, Chenghao Zhang, Jiaji Ma, Zhihang Li, Maliang Liu	An ECG Automatic Detection System with Baseline Drift Removal Based on SG Filter.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xiangying Tao, Duoli Zhang, Min Wang, Yan Ma, Yukun Song	Design and Implementation of A High-speed Configurable 2D ML-CFAR Detector.	ASICON	2021	DBLP DOI BibTeX RDF
14	Cong Tao, Liangbo Lei, Jiangli Huang, Zhipeng Chen, Yumei Huang, Zhiliang Hong	New Linearization Implementations Improving IIP3 of Wideband LNTA by More than 14dB.	ASICON	2021	DBLP DOI BibTeX RDF
14	Zheng Chai, Pedro Freitas, Weidong Zhang 0002, Jian Fu Zhang 0001, John S. Marsland	True random number generator based on switching probability of volatile GeXSe1-X ovonic threshold switching selectors.	ASICON	2021	DBLP DOI BibTeX RDF
14	Dawei Wang, Tao Liu, Xin Sun, Kun Chen, Jingwen Yang, Chunlei Wu, Min Xu, David Wei Zhang	Channel Stress Engineering Through Source/Drain Recess Optimization and Its Process Variation Study for 5 nm-node FinFETs.	ASICON	2021	DBLP DOI BibTeX RDF
14	You-You Zhang, Lirida A. B. Naviner, Hao Cai	Ultra-low Power Access Strategy for Process-Voltage-Temperature Aware STT-MRAM.	ASICON	2021	DBLP DOI BibTeX RDF
14	Ruijie Yan, Lihan Cui, Zhiliang Hong	A Fourth Order Chebyshev Complex Band-pass Filter Design with Filter Solution.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yi Zhou, Ming-e Jing, Fa Xu, Yibo Fan, Xiaoyang Zeng	Mutli-level Regression Anchor-free Object Detection.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yiliang Guo, Mingjun Jiang, Feng Dong, Kehua Yu, Ke Chen, Wei Qu, Jianfei Jiang 0001	A CPU-FPGA Based Heterogeneous Accelerator for RepVGG.	ASICON	2021	DBLP DOI BibTeX RDF
14	Hui Zhang, Zhaojie Li, Heqing Yang, Xu Cheng 0002, Xiaoyang Zeng	A High-Efficient and Configurable Hardware Accelerator for Convolutional Neural Network.	ASICON	2021	DBLP DOI BibTeX RDF
14	Wen-Cheng Lai	Integrated Homodyne Receiver Chip Design with Dual-Band Antenna.	ASICON	2021	DBLP DOI BibTeX RDF
14	Junkai Zhang, Zunkai Huang, Quanze Li, Xinyao Zhang, Li Tian, Yongxin Zhu 0001, Hui Wang, Songlin Feng	A High-Efficiency Charge Pump for AMOLED Display Driver IC.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xiaofeng Hong, Hao Cai	A Novel Hybrid Nonvolatile SRAM for Suppressing Leakage Power Using Tunnel FET.	ASICON	2021	DBLP DOI BibTeX RDF
14	Wentao Tang, Xudong Yang, Yi Zhao	Combined-solvent engineering of HPbI3 for efficient FAPbI3 perovskite solar cells.	ASICON	2021	DBLP DOI BibTeX RDF
14	Limo Guo, PengXu Lin, Lei Guo, Bo Liu 0019	Implementation of a CRNN-based low-power keyword recognition system on FPGA.	ASICON	2021	DBLP DOI BibTeX RDF
14	Liang Qi, Xinyu Qin, Sai-Weng Sin, Chixiao Chen, Fan Ye 0001, Guoyong Shi, Guoxing Wang	Advances in Continuous-time MASH ΔΣ Modulators.	ASICON	2021	DBLP DOI BibTeX RDF
14	Ruoyu Zhang, Ming-e Jing, Yibo Fan, Xiaoyang Zeng	Small Object Detection in Aerial Images.	ASICON	2021	DBLP DOI BibTeX RDF
14	Jiaqi Jiang, Hongbo Zhang, Yunhao Fu, Yuchun Chang	A Phased-array Optoelectronic Detector using Phase-difference Filtering Technology for Incremental Encoder Application.	ASICON	2021	DBLP DOI BibTeX RDF
14	Wei Zhang, Yunlin Liu, Zhibo Chen 0008, Yating Zou, Yizhou Jiang, Ye Lu, Yajie Qin	16-Channel Readout Circuit for Nucleic Acid Detection Based on Graphene Electrolyte-gated Field-effect Transistors (EGFETs).	ASICON	2021	DBLP DOI BibTeX RDF
14	Geng Zhang 0001, Fangxu Lv, Zhengbin Pang, Heming Wang, Dongbin Lv, Tao Liu, Jinwang Zhang	A 5-156.25Gb/s high pin efficiency Receiver Based on CNRZ-5 for USR High-Speed Interface.	ASICON	2021	DBLP DOI BibTeX RDF
14	Makoto Ikeda	Hardware Acceleration of Elliptic-Curve based Crypto-Algorithm, ECDSA and Pairing Engines.	ASICON	2021	DBLP DOI BibTeX RDF
14	Tinghuan Chen, Qi Sun 0002, Bei Yu 0001	Machine Learning in Nanometer AMS Design-for-Reliability : (Invited Paper).	ASICON	2021	DBLP DOI BibTeX RDF
14	Xinyu Qin, Xudong Liu, Jun Han 0003	A CNN Hardware Accelerator Designed for YOLO Algorithm Based on RISC-V SoC.	ASICON	2021	DBLP DOI BibTeX RDF
14	Haoliang Zhu, Zhiqun Li, Zhennan Li, Yan Yao	Design of Wideband Phase Modulator for 2.4~5.25 GHz Digital Polar Transmitter.	ASICON	2021	DBLP DOI BibTeX RDF
14	Tianxin Min, Jian Kang, Bo Xu, Weimin Shi, C. Patrick Yue	Design and Verification of a 334-Mb/s DCO-OFDM Li-Fi Transceiver Using Integrated System Evaluation Engine.	ASICON	2021	DBLP DOI BibTeX RDF
14	Li Ni, Pengjun Wang, Yuejun Zhang, Jia Chen, Liwei Li 0004, Huihong Zhang	A Reliable Multi-information Entropy Glitch PUF Using Schmitt Trigger Sampling Method for IoT Security.	ASICON	2021	DBLP DOI BibTeX RDF
14	Kewei Xin, Bing Li, Haiyang Ding, Lei Bao, Haipeng Li	Modeling and analysis of injection factor based on injection-locked LC oscillator.	ASICON	2021	DBLP DOI BibTeX RDF
14	Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao 0001	System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yangyun Zhang, Yuting Xiang, Xinjie Zhang, Chunqi Shi, Runxi Zhang, Jinghong Chen	A 22-33 GHz Wideband CMOS LNA Using Low-k Non-inverting MCCRs for 5G mmW Communication Applications.	ASICON	2021	DBLP DOI BibTeX RDF
14	Bo Yi, Zheng Wu, Junji Cheng, Haimeng Huang, Moufu Kong, Hongqiang Yang	A Vertical Thin Layer pLDMOS with Linear doping realizing ultralow Ron, sp.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yutong Zhang, Rui Yin, Xiaoliang Shen, Na Yan, Ghazanfar Ali Safdar, Masood Ur Rehman 0001	A 60 GHz Broadband Wearable Antenna for Body-to-Body Communications.	ASICON	2021	DBLP DOI BibTeX RDF
14	Yuanfa Wang, Yu Pang, Huan Huang, Qianneng Zhou, Jiasai Luo	Hardware Design of Gaussian Kernel Function for Non-Linear SVM Classification.	ASICON	2021	DBLP DOI BibTeX RDF
14	Jun Jiang, Jie Sun, Chao Wang, Anquan Jiang	Controlled domain wall directions within nanodevices integrated on the surface of LiNbO3 single crystals.	ASICON	2021	DBLP DOI BibTeX RDF
14	Shahzad Haider, Song Chen 0001	Effects of using Multi Voltage Threshold Transistors in Asynchronous Circuits.	ASICON	2021	DBLP DOI BibTeX RDF
14	Chuanhe Shang, Zhufei Chu	Design of Majority Logic Based 4-bit Approximate Subtractors and its Application in Divider.	ASICON	2021	DBLP DOI BibTeX RDF
14	Liu Wang, Guojing Ye, Yumei Huang	A Digital to Time Converter Assisted TA-TDC with High Resolution for Low Power ADPLL in 22nm CMOS.	ASICON	2021	DBLP DOI BibTeX RDF
14	Hiroshi Iwai	NMOS LSI Development from 1970's to the beginning of 1980's.	ASICON	2021	DBLP DOI BibTeX RDF
14	Zilong Zhang, Haichuang Yang, Xuan Zhang, Xiaoling Ding, Xuetao Wang, Yu Gong, Bo Liu 0019	Low-Power Keyword Recognition Feature Extraction Circuit based on SRMFCC and Shared Multiplier for High Noise Background.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xin Si, Yongliang Zhou, Jun Yang, Meng-Fan Chang	Challenge and Trend of SRAM Based Computation-in-Memory Circuits for AI Edge Devices.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xuexiang Wang, Yiran Sun, Mingming Fang	Reconfigurable Clock Tree Design Methodology for Wide Voltage Scaling Using Custom Buffer.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xuejie Zhang, Zhidi Jiang, Jianping Hu	A Novel Tri-input Schottky Barrier FET Exhibiting Three-Input Series Switching Function.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xin Wang, Heming Sun, Jiro Katto, Yibo Fan	A Hardware Architecture for Adaptive Loop Filter in VVC Decoder.	ASICON	2021	DBLP DOI BibTeX RDF
14	Tao Zhong, Yuekang Guo, Jing Jin 0005	Analysis of SAR ADC Quantization Error and Nonlinearity in PMCW Automotive Radar.	ASICON	2021	DBLP DOI BibTeX RDF
14	Peng Wang, En-xia Zhang, Daniel M. Fleetwood, Peng Fei Wang, Michael W. McCurdy, Ji-Tzouh Lin, Michael L. Alles, Jim L. Davidson, Bruce W. Alphenaar, Ronald D. Schrimpf	Effects of Charge Generation and Trapping on the X-ray Response of Strained AlGaN/GaN HEMTs.	ASICON	2021	DBLP DOI BibTeX RDF
14	Xu Chen, Junyan Ren, Shunli Ma	A 79GHz 5-bit Phase Shifter With π-Network in 28-nm CMOS.	ASICON	2021	DBLP DOI BibTeX RDF