Search results for "ESSCIRC"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Ying Chen, Yu Pei 0002, Domine M. W. Leenaerts	A fully integrated 30GHz 16-QAM single-channel phased array transmitter with 5.9% EVM at 6dB back-off.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Taimur Gibran Rabuske, Jorge R. Fernandes	A 9-b 0.4-V charge-mode SAR ADC with 1.6-V input swing and a MOSCAP-only DAC.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Cecilia Gimeno, Carlos Sánchez-Azqueta, Erick Guerrero, Javier Aguirre, Concepción Aldea, Santiago Celma	A 2.5-Gb/s multi-rate continuous-time adaptive equalizer for short reach optical links.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Mehrdad A. Ghanad, Catherine Dehollain, Michael M. Green	A 30 μW remotely-powered implant with time-based voltage regulation.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Barend van Liempd, Benjamin P. Hershberg, Björn Debaillie, Piet Wambacq, Jan Craninckx	An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Peng Chen 0022, Xiongchuan Huang, Yao-Hong Liu, Ming Ding 0003, Cui Zhou, Ao Ba, Kathleen Philips, Harmke de Groot, Robert Bogdan Staszewski	Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Yeo Myung Kim, Woojun Choi, Jaehoon Kim, Sanghoon Lee 0009, Sangho Lee, Hyeongon Kim, Kofi A. A. Makinwa, Youngcheol Chae, Tae Wook Kim	A 0.02mm2 embedded temperature sensor with ±2°C inaccuracy for self-refresh control in 25nm mobile DRAM.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Jonas Hansryd	5G wireless communication beyond 2020.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Barend van Liempd, Saneaki Ariumi, Ewout Martens, Shih-Hung Chen, Piet Wambacq, Jan Craninckx	A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protection.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Michiel Steyaert, Filip Tavernier, Hans Meyvaert, Athanasios Sarafianos, Nicolas Butzen	When hardware is free, power is expensive! Is integrated power management the solution?	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Anders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani	A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Dong-Ryeol Oh, Jong-In Kim, Min-Jae Seo, Jin-Gwang Kim, Seung-Tak Ryu	A 6-bit 10-GS/s 63-mW 4x TI time-domain interpolating flash ADC in 65-nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Shailesh Kulkarni, Ibrahim Kazi, David Seebacher, Peter Singerl, Franz Dielacher, Wim Dehaene, Patrick Reynaert	Multi-standard wideband OFDM RF-PWM transmitter in 40nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Khawar Sarfraz, Mansun Chan	A 65nm 3.2GHz 44.2mW Low-Vt register file with robust low-capacitance dynamic local bitlines.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Francesco Radice, Melchiorre Bruccoleri, Enrico Mammei, Matteo Bassi, Andrea Mazzanti	A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Yihu Li, Wang Ling Goh, Yong-Zhong Xiong	A 124 to 132.5 GHz frequency quadrupler with 4.4 dBm output power in 0.13μm SiGe BiCMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Hesong Xu, Matteo Perenzoni, Nicola Massari, Alberto Gola, Alessandro Ferri, David Stoppa	A 30-ns recovery time, 11.5-nC input charge range, 16-channel read-out ASIC for PET application.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Mihail Jefremow, Doris Schmitt-Landsiedel, Thomas Kern, Martin Stiftinger, Christoph Roll	Slope only sense amplifier with 4.5ns sense delay for 8Mbit memory sector, employing in situ current monitoring with 66% write speed improvement in 40nm embedded flash for automotive.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Seyed Mohammad Ali Zeinolabedin, Jun Zhou 0017, Xin Liu 0015, Tony T. Kim	A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compression.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Dmytro Cherniak, Michael Aichner, Roberto Nonis, Nicola Da Dalt	Low power digitally controlled delay insertion unit and 1% accuracy 100MHz oscillator for precise dead-time insertion in DC-DC converters.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Teerachot Siriburanon, Hanli Liu, Kengo Nakata, Wei Deng 0001, Ju Ho Son, Dae Young Lee, Kenichi Okada, Akira Matsuzawa	A 28-GHz fractional-N frequency synthesizer with reference and frequency doublers for 5G cellular.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Barbara Stadlober, Esther Karner, Andreas Petritz, Alexander Fian, Mihai Irimia-Vladu	Nature as microelectronic fab: Bioelectronics: Materials, transistors and circuits.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Anca Gabriela Vasilica, Vlad Anghel, Gheorghe Pristavu, Gheorghe Brezeanu	Suppressing start-up time variation versus load current - Adaptive soft-start in boost LED drivers.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Mitsuhiko Igarashi, Kan Takeuchi, Takeshi Okagaki, Koji Shibutani, Hiroaki Matsushita, Koji Nii	An on-die digital aging monitor against HCI and xBTI in 16 nm Fin-FET bulk CMOS technology.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Teruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya	248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvesting.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sahba Jahromi, Jussi-Pekka Jansson, Ilkka Nissinen, Jan Nissinen, Juha Kostamovaara	A single chip laser radar receiver with a 9×9 SPAD detector array and a 10-channel TDC.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Fady Abouzeid, Sylvain Clerc, Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Damien Croain, Gilles Gasiot, Dimitri Soussan, Philippe Roche	28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Shuai Yuan 0005, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Peng Wang, Wen Jia, Chun Zhang, Zhihua Wang 0001	A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Fabio Padovan, Marc Tiebout, Andrea Neviani, Andrea Bevilacqua	A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Philipp Greiner, Jasmin Grosinger 0002, Christoph Steffan, Gerald Holweg, Wolfgang Bösch	Non-trimmable LC oscillator for all CMOS frequency control.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Kyuho Jason Lee, Junyoung Park 0002, Injoon Hong, Hoi-Jun Yoo	Intelligent task scheduler with high throughput NoC for real-time mobile object recognition SoC.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Claudio De Berti, Piero Malcovati, Lorenzo Crespi, Andrea Baschirotto	A 106.7-dB DR, 390-μW CT 3rd-order ΣΔ modulator for MEMS microphones.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Zeyu Cai, Robert H. M. van Veldhoven, Annelies Falepin, Hilco Suy, Eric Sterckx, Kofi A. A. Makinwa, Michiel A. P. Pertijs	A ratiometric readout circuit for thermal-conductivity-based resistive gas sensors.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Aritra Banerjee, Lei Ding 0001, Rahmi Hezar	High efficiency multi-mode outphasing RF power amplifier in 45nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Luca Sant, Andrea Fant, Snezana Stojanovic, Simone Fabbro, Jose Luis Ceballos	A 13.2b optical proximity sensor system with 130klx ambient light rejection capable of heart rate and blood oximetry monitoring.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Stefan Shopov, Sorin P. Voinigescu	A 3×40Gb/s 28nm FDSOI CMOS front-end array with 10mVPP sensitivity and >4VPP output swing.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Pietro Ciccarella, Marco Carminati, Giorgio Ferrari, Francesco Morichetti, Marco Sampietro	32-Channel low-noise lock-in ASIC for non-invasive light detection in silicon photonics.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Silvian Spiridon, Han Yan, Hans Eberhart	A linearity improvement technique for overcoming signal-dependent induced switching time mismatch in DAC-Based transmitters.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Nam-Seog Kim, Jan M. Rabaey	A 3.1-10.6GHz wavelet-based dual-resolution spectrum sensing with harmonic rejection mixers.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Paul Brandl, Reinhard Enne, Horst Zimmermann	Optical wireless receiver circuit with integrated APD and high background-light immunity.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Giorgio Baccarani, Emanuele Baravelli, Elena Gnani, Antonio Gnudi, Susanna Reggiani	Theoretical analyses and modeling for nanoelectronics.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Benjamin Saft, Eric Schaefer, Alexander Rolapp, Eckhard Hennig	An ultra-low power capacitance extrema and ratio detector for electrostatic energy harvesters.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Domenico Pepe, Domenico Zito	A 78.8-92.8 GHz 4-bit 0-360° active phase shifter in 28nm FDSOI CMOS with 2.3 dB average peak gain.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	David Bol, El Hafed Boufouss, Denis Flandre, Julien De Vos	A 0.48mm2 5μW-10mW indoor/outdoor PV energy-harvesting management unit in a 65nm SoC based on a single bidirectional multi-gain/multi-mode switched-cap converter with supercap storage.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Juergen Wittmann, Alexander Barner, Thoralf Rosahl, Bernhard Wicht	A 12V 10MHz buck converter with dead time control based on a 125 ps differential delay chain.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Tong Zhang 0019, Mazhareddin Taghivand, Jacques Christophe Rudell	A 55-70GHz two-stage tunable polyphase filter with feedback control for quadrature generation with <2° and <0.32dB phase/amplitude imbalance in 28nm CMOS process.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Khaled Khalaf, Vojkan Vidojkovic, John R. Long, Piet Wambacq	A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Tero Tikka, Kari Stadius, Jussi Ryynänen, Mikko Kaltiokallio	A 0.8-3 GHz mixer-first receiver with on-chip transformer balun in 65-nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Matthias Kuhl, Yiannos Manoli	A 0.01 mm2 fully-differential 2-stage amplifier with reference-free CMFB using an architecture-switching-scheme for bandwidth variation.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Yipeng Wang 0003, Duona Luo, Quan Pan 0002, Liwen Jing, Zhixin Li, C. Patrick Yue	A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Yue Wu, Tianyu Jia, Bo Xia, Xinlong Ma, Li Kang, Xiaodong Yang	Suppression of VCO pulling effects using even-harmonic quiet transmitting circuits.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Meng-Wei Chien, Wen-Hau Yang, Ying-Wei Chou, Hsin-Chieh Chen, Wei-Chung Chen, Ke-Horng Chen, Chin-Long Wey, Shin-Chi Lai, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo	Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Chao Liu, Qiang Li, Yihu Li, Xiang Li, Haitao Liu, Yong-Zhong Xiong	An 890 mW stacked power amplifier using SiGe HBTs for X-band multifunctional chips.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	José Luis González 0001, Vincent Puyal, Alexandre Siligaris, Clement Jany, Cedric Dehos	A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nm.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Toru Kawajiri, Takahiro Moroto, Hiroki Ishikuro	A low EMI SIDO wireless power transfer system with 10μsec response time.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Hsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, Hsin-Yu Luo	120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Ashish Kumar, G. S. Visweswaran, Kaushik Saha	Low voltage error resilient SRAM using run-time error detection and correction.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Xin Meng, Jinzhou Cao, Tao He 0001, Yi Zhang 0023, Gabor C. Temes, Mitsuru Aniya, Kazuki Sobue, Koichi Hamashita	A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Abhik Das, Yuan Gao 0011, Tony Tae-Hyoung Kim	A 76% efficiency boost converter with 220mV self-startup and 2nW quiescent power for high resistance thermo-electric energy harvesting.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Björn Debaillie, Barend van Liempd, Benjamin P. Hershberg, Jan Craninckx, Kari Rikkinen, D. J. van den Broek, Eric A. M. Klumperink, Bram Nauta	In-band full-duplex transceiver technology for 5G mobile networks.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Jiawei Xu 0001, Pieter Harpe, Julia Pettine, Chris Van Hoof, Refet Firat Yazicioglu	A low power configurable bio-impedance spectroscopy (BIS) ASIC with simultaneous ECG and respiration recording functionality.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Wolfgang Pribyl, Franz Dielacher, Gernot Hueber (eds.)	ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference, Graz, Austria, September 14-18, 2015	ESSCIRC	2015	DBLP BibTeX RDF
1	Borivoje Nikolic	Simpler, more efficient design.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Rudolf Ritter, Patrick Torta, Lukas Dörrer, Antonio Di Giandomenico, Stefan Herzinger, Maurits Ortmanns	A multimode CT ΔΣ-modulator with a reconfigurable digital feedback filter for semi-digital blocker/interferer rejection.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Yann Deval	RFIC design by mathematics for next generation wireless access.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Juan Pablo Duarte, Sourabh Khandelwal, Aditya Sankar Medury, Chenming Hu, Pragya Kushwaha, Harshit Agarwal, Avirup Dasgupta, Yogesh Singh Chauhan	BSIM-CMG: Standard FinFET compact model for advanced circuit design.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Chao Chen 0019, Zhao Chen 0001, Zu-yao Chang, Michiel A. P. Pertijs	A compact 0.135-mW/channel LNA array for piezoelectric ultrasound transducers.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Christian C. Enz, Maria-Anna Chalkiadaki, Anurag Mangla	Low-power analog/RF circuit design based on the inversion coefficient.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Haikun Jia, Baoyong Chi, Zhihua Wang 0001	An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sung-Yong Cho, Sungwoo Kim, Min-Seong Choo, Jinhyung Lee, Han-Gon Ko, Sungchun Jang, Sang-Hyeok Chu, Woo-Rham Bae, Yoonsoo Kim, Deog-Kyoon Jeong	A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Xin-Ru Lee, Chih-Wen Yang, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee	A 1.31Gb/s, 96.6% utilization stochastic nonbinary LDPC decoder for small cell applications.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Nima Soltani, Hossein Kassiri, Hamed Mazhab-Jafari, Karim Abdelhalim, Roman Genov	0.13μm CMOS 230Mbps 21pJ/b UWB-IR transmitter with 21.3% efficiency.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Shunli Ma, Guangyao Zhou, Jianbing Jiang, Chixiao Chen, Yongzhen Chen, Fan Ye 0001, Junyan Ren	A quadrature clock generator with calibration for 22∼31.4 GS/s real-time sampling system.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Jacob Göppert, Yiannos Manoli	Fully integrated start-up at 70 mV of boost converters for thermoelectric energy harvesting.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Chongjun Ding, Yiannos Manoli, Matthias Keller	A 5.1mW 74dB DR CT ΔΣ modulator with quantizer intrinsic ELD compensation achieving 75fJ/conv.-step in a 20MHz BW.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Hazar Yueksel, Lukas Kull, Andreas Burg, Matthias Braendli, Peter Buchmann, Pier Andrea Francese, Christian Menolfi, Marcel A. Kossel, Thomas Morf, Toke Meyer Andersen, Danny Luu, Thomas Toifl	A 3.6pJ/b 56Gb/s 4-PAM receiver with 6-Bit TI-SAR ADC and quarter-rate speculative 2-tap DFE in 32 nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Chuanwei Li, Antonio Liscidini	A current re-use PA-VCO cell for low-power BLE transmitters.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sebastian Nessler, Maximilian Marx 0002, Michael Maurer, Stefan Rombach, Yiannos Manoli	A Continuous-Time Collocated Force-Feedback and Readout Front-End for MEM Gyroscopes.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Koki Tanaka, Ryo Saito, Hiroki Ishikuro	A 1.6 GS/s 3.17 mW 6-b passive pipelined binary-search ADC with memory effect canceller and reference voltage calibration.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Masaki Yonekura, Hiroki Ishikuro	I/Q mismatch compensation ΔΣ modulator using ternary capacitor rotation technique.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Feng-Wei Kuo, Masoud Babaie, Huan-Neng Ron Chen, Kyle Yen, Jinn-Yeh Chien, Lanchou Cho, Fred Kuo, Chewnpu Jou, Fu-Lung Hsueh, Robert Bogdan Staszewski	A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBm.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Ning Guo, Yipeng Huang 0001, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis	Continuous-time hybrid computation with programmable nonlinearities.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Antonio A. D'Amico, Marcello De Matteis, Stefano D'Amico, Claudio De Berti, Lorenzo Crespi, Andrea Baschirotto	A 4th-order 100μA diode-C-based filter with 5dBm-IIP3 at the 24MHz cut-off frequency.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Aravind Tharayil Narayanan, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Korkut Kaan Tokgoz, Kengo Nakata, Wei Deng 0001, Kenichi Okada, Akira Matsuzawa	A fractional-N sub-sampling PLL using a pipelined phase-interpolator with a FoM of -246dB.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Badr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx	A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sameer Singh 0003, Madhusudan Govindarajan, T. S. Venkatesh, William Evans, Ayushi Kansal, S. S. Murali	A 23fJ/conv-step 12b 290MS/s time interleaved pipelined SAR ADC.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Md Shakil Akter, Rohan Sehgal, Frank M. L. van der Goes, Klaas Bult	A 66 dB SNDR pipelined split-ADC using class-AB residue amplifier with analog gain correction.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Fan Yang 0006, Philip K. T. Mok	A 0.6-1V input capacitor-less asynchronous digital LDO with fast transient response achieving 9.5b over 500mA loading range in 65-nm CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sanu Mathew, David Johnston, Paul Newman 0002, Sudhir Satpathy, Vikram B. Suresh, Mark A. Anders 0001, Himanshu Kaul, Gregory K. Chen, Amit Agarwal 0001, Steven Hsu, Ram Krishnamurthy 0001	μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Saeed Ghamari, Gabriele Tasselli, Cyril Botteron, Pierre-André Farine	A wide tuning range 4 th-order Gm-C elliptic filter for wideband multi-standards GNSS receivers.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Norman Dodel, Stefan Keil, Andreas Wiemhofer, Malte Kortstock, Philipp Scholz, Uwe Kerst, Roland Thewes	A BIST structure for the evaluation of the MOSFET gate dielectric interface state density in post-processed CMOS chips.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Martijn F. Snoeij, Viola Schaffer, Sudarshan Udayashankar, Mikhail V. Ivanov	An integrated fluxgate magnetometer for use in closed-loop/open-loop isolated current sensing.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Hiroshi Uemura, Yoichiro Kurita, Hideto Furuyama	12.5Gb/s optical driver and receiver ICs with double threshold AGC for SATA Out-of-Band transmission.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Alexander Fritsch, Michael Kugel, Rolf Sautter, Dieter F. Wendel, Juergen Pille, Otto A. Torreiter, Shankar Kalyanasundaram, Daniel A. Dobson	A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Alexandre Siligaris, Yogadissen Andee, Eric Mercier, Jose Moron Guerra, Jean-François Lampin, Guillaume Ducournau, Yves Quéré	A 278 GHz heterodyne receiver with on-chip antenna for THz imaging in 65 nm CMOS process.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Sandro Carrara	New frontiers in digital health: Remote monitoring of animal and human metabolism on our smartphones and tablets.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Raghavasimhan Thirunarayanan, David Ruffieux, Nicola Scolari, Christian C. Enz	A ΣΔ based direct all-digital frequency synthesizer with 20 Mbps frequency modulation capability and 3μs startup latency.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Tae-Kwang Jang, Seokhyeon Jeong, Myungjoon Choi, Wanyeong Jung, Gyouho Kim, Yen-Po Chen, Yejoong Kim, Wootaek Lim, Dennis Sylvester, David T. Blaauw	FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Mei-Chen Chuang, Chia-Liang Tai, Ying-Chih Hsu, Alan Roth, Eric G. Soenen	A temperature sensor with a 3 sigma inaccuracy of ±2°C without trimming from -50°C to 150°C in a 16nm FinFET process.	ESSCIRC	2015	DBLP DOI BibTeX RDF
1	Remko E. Struiksma, Eric A. M. Klumperink, Bram Nauta, Frank E. van Vliet	A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering.	ESSCIRC	2014	DBLP DOI BibTeX RDF

Publications at "ESSCIRC"( http://dblp.L3S.de/Venues/ESSCIRC )