Search results for "multiprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	Fong Pong, Nian-Feng Tzeng, Koray Öner, Chun Ning, Kwong-Tak Chui, Manoj Ekbote, Yanping Lu	Communication performance of a modular high-bandwidth multiprocessor system.	ICPADS	2007	DBLP DOI BibTeX RDF
15	Hennadiy Leontyev, James H. Anderson	Generalized Tardiness Bounds for Global Multiprocessor Scheduling.	RTSS	2007	DBLP DOI BibTeX RDF
15	Xiaohong Kong, Jun Sun 0008, Bin Ye, Wenbo Xu 0001	An Efficient Quantum-Behaved Particle Swarm Optimization for Multiprocessor Scheduling.	International Conference on Computational Science (1)	2007	DBLP DOI BibTeX RDF
15	Zhe Ma, Daniele Paolo Scarpazza, Francky Catthoor	Run-time Task Overlapping on Multiprocessor Platforms.	ESTIMedia	2007	DBLP DOI BibTeX RDF
15	Jugash Chandarlapati, Mainak Chaudhuri	LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation.	ICCD	2007	DBLP DOI BibTeX RDF
15	Jörg Dümmler, Thomas Rauber, Gudula Rünger	Communicating Multiprocessor-Tasks.	LCPC	2007	DBLP DOI BibTeX RDF
15	Étienne Ogoubi, David Pouliot, Marcel Turcotte, Abdelhakim Hafid	Parallel Multiprocessor Approaches to the RNA Folding Problem.	PPAM	2007	DBLP DOI BibTeX RDF	message passing, folding, parallel computer architecture, secondary structure, RNA
15	Yufeng Xie, Leibo Liu, Rui Dai, Shaojun Wei	Battery-Aware Variable Voltage Scheduling on Real-Time Multiprocessor Platforms.	ISCAS	2007	DBLP DOI BibTeX RDF
15	Guichang Zhong, Alan N. Willson Jr.	An Energy-efficient Reconfigurable Viterbi Decoder on a Programmable Multiprocessor.	ISCAS	2007	DBLP DOI BibTeX RDF
15	Philippe Bergheaud, Dinesh Subhraveti, Marc Vertes	Fault Tolerance in Multiprocessor Systems Via Application Cloning.	ICDCS	2007	DBLP DOI BibTeX RDF
15	Theodore P. Baker, Michele Cirinei	Brute-Force Determination of Multiprocessor Schedulability for Sets of Sporadic Hard-Deadline Tasks.	OPODIS	2007	DBLP DOI BibTeX RDF
15	Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto	A design kit for a fully working shared memory multiprocessor on FPGA.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	FPGA, shared memory, programming model, embedded computing, reconfigurable logic
15	YuHai Yang, Shengsheng Yu, XueLian Bin	A New Dynamic Scheduling Algorithm for Real-Time Heterogeneous Multiprocessor Systems.	IITA	2007	DBLP DOI BibTeX RDF
15	Manika Govil, Alberto M. Segre, Veronica J. Vieland	MLIP: A Multiprocessor Linkage Analysis System.	IMSCCS	2007	DBLP DOI BibTeX RDF
15	Mitsunori Kubo, Baoliu Ye, Arata Shinozaki, Minyi Guo	UMP-PerComp: A Ubiquitous Multiprocessor Network-Based Pipeline Processing Framework for Pervasive Computing Environments.	AINA	2007	DBLP DOI BibTeX RDF
15	Stanley P. Y. Fung, Chung Keung Poon, Feifeng Zheng	Online Interval Scheduling: Randomized and Multiprocessor Cases.	COCOON	2007	DBLP DOI BibTeX RDF
15	Sander Stuijk, Twan Basten, Marc Geilen, Henk Corporaal	Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs.	DAC	2007	DBLP DOI BibTeX RDF
15	Oleg Petlin, Wilson Snyder	Functional Verification of SiCortex Multiprocessor System-on-a-Chip.	DAC	2007	DBLP DOI BibTeX RDF
15	Da-Ren Chen, Yu-Chun Chu, Chiun-Chieh Hsu	Multiprocessor Scheduling for Distance-Constrained Task Systems.	PDCAT	2007	DBLP DOI BibTeX RDF
15	R. M. Muthukumar, D. Janakiram	Yama: A Scalable Generational Garbage Collector for Java in Multiprocessor Systems.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	on-the-fly garbage collection, Java, programming languages, Garbage collection, memory management, Java virtual machine
15	Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna	UML-based multiprocessor SoC design framework.	ACM Trans. Embed. Comput. Syst.	2006	DBLP DOI BibTeX RDF	design flow, architecture exploration, UML 2.0
15	Mikko Setälä, Petri Kukkala, Tero Arpinen, Marko Hännikäinen, Timo D. Hämäläinen	Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform.	SAMOS	2006	DBLP DOI BibTeX RDF
15	T. Srinivasan 0001, M. Sandhya, N. Srikrishna	An Efficient Parallel IP Lookup Technique using CREW Based Multiprocessor Organization.	CNSR	2006	DBLP DOI BibTeX RDF	High performance routing, Parallel Algorithm, IP Address Lookup
15	Mehmet Derin Harmanci, Nuria Pazos, Paolo Ienne, Yusuf Leblebici	A Predictable Communication Scheme for Embedded Multiprocessor Systems.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
15	Ravindra V. Kshirsagar, Rajendra M. Patrikar	Design of a Reconfigurable Multiprocessor Core for Higher Performance and Reliability of Embedded Systems.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
15	Manuel Saldaña, Lesley Shannon, Paul Chow	The routability of multiprocessor network topologies in FPGAs.	FPGA	2006	DBLP DOI BibTeX RDF
15	Tero Arpinen, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen	Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications.	DATE	2006	DBLP DOI BibTeX RDF
15	Dipankar Das 0002, Rajeev Kumar 0004, P. P. Chakrabarti 0001	Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications.	APSEC	2006	DBLP DOI BibTeX RDF
15	Irene Zuccar, Mauricio Solar, Fernanda Kri, Víctor Parada	A Shared-Memory Multiprocessor Scheduling Algorithm.	IFIP PPAI	2006	DBLP DOI BibTeX RDF
15	Gregory Buehrer, Yen-Kuang Chen, Srinivasan Parthasarathy 0001, Anthony D. Nguyen, Amol Ghoting, Daehyun Kim 0001	Efficient pattern mining on shared memory systems: implications for chip multiprocessor architectures.	Memory System Performance and Correctness	2006	DBLP DOI BibTeX RDF
15	Moo-Kyoung Chung, Chong-Min Kyung	Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction.	PADS	2006	DBLP DOI BibTeX RDF
15	Vandy Berten, Joël Goossens, Emmanuel Jeannot	A probabilistic approach for fault tolerant multiprocessor real-time scheduling.	IPDPS	2006	DBLP DOI BibTeX RDF
15	Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihin	Helper thread prefetching for loosely-coupled multiprocessor systems.	IPDPS	2006	DBLP DOI BibTeX RDF
15	Seng Lin Shee, Andrea Erdos, Sri Parameswaran	Heterogeneous multiprocessor implementations for JPEG: : a case study.	CODES+ISSS	2006	DBLP DOI BibTeX RDF
15	Suri Pushpa, Prasad Vinod, Carsten Maple	Creating a Forest of Binary Search Trees for a Multiprocessor System.	PARELEC	2006	DBLP DOI BibTeX RDF
15	Awni Itradat, M. Omair Ahmad, Ali M. Shatnawi	A Delay-Optimal Static Scheduling of DSP Applications Mapped onto Multiprocessor Architectures.	PARELEC	2006	DBLP DOI BibTeX RDF
15	Chewoo Na, Hyeonjoong Cho, Binoy Ravindran, E. Douglas Jensen	Garbage Collector Scheduling in Dynamic, Multiprocessor Real-Time Systems.	RTCSA	2006	DBLP DOI BibTeX RDF
15	Björn Andersson, Eduardo Tovar	Multiprocessor Scheduling with Few Preemptions.	RTCSA	2006	DBLP DOI BibTeX RDF
15	Haixia Wang 0001, Dongsheng Wang 0002, Peng Li 0031	Acceleration Techniques for Chip-Multiprocessor Simulator Debug.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF
15	Aaron Block, James H. Anderson	Accuracy versus Migration Overhead in Real-Time Multiprocessor Reweighting Algorithms.	ICPADS (1)	2006	DBLP DOI BibTeX RDF
15	John M. Calandrino, Hennadiy Leontyev, Aaron Block, UmaMaheswari C. Devi, James H. Anderson	LITMUS^RT : A Testbed for Empirically Comparing Real-Time Multiprocessor Schedulers.	RTSS	2006	DBLP DOI BibTeX RDF
15	George A. Gravvanis, Konstantinos M. Giannoutakis	Parallel Exact and Approximate Arrow-Type Inverses on Symmetric Multiprocessor Systems.	International Conference on Computational Science (1)	2006	DBLP DOI BibTeX RDF
15	Egor Bondarev, Michel R. V. Chaudron, Peter H. N. de With	Compositional Performance Analysis of Component-Based Systems on Heterogeneous Multiprocessor Platforms.	EUROMICRO-SEAA	2006	DBLP DOI BibTeX RDF
15	Daewook Kim, Manho Kim, Gerald E. Sobelman	DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Sangchul Han, Minkyu Park	Predictability of Least Laxity First Scheduling Algorithm on Multiprocessor Real-Time Systems.	EUC Workshops	2006	DBLP DOI BibTeX RDF
15	Pengyong Ma, Xiao Hu, Shuming Chen, Yang Guo	Pseudo Share Data Cache in Multiprocessor: PSDMP.	ISPA Workshops	2006	DBLP DOI BibTeX RDF
15	Xiao Hu, Pengyong Ma, Shuming Chen, Yang Guo, Xing Fang	TraceDo: An On-Chip Trace System for Real-Time Debug and Optimization in Multiprocessor SoC.	ISPA	2006	DBLP DOI BibTeX RDF
15	Hakem Beitollahi, Geert Deconinck	Fault-Tolerant Partitioning Scheduling Algorithms in Real-Time Multiprocessor Systems.	PRDC	2006	DBLP DOI BibTeX RDF
15	Andreas Merkel, Frank Bellosa	Balancing power consumption in multiprocessor systems.	EuroSys	2006	DBLP DOI BibTeX RDF	event counters, thermal management, energy estimation, task migration, energy-aware scheduling
15	Abdennour El Rhalibi, Madjid Merabti, Yuanyuan Shen	Improving Game Processing in Multithreading and Multiprocessor Architecture.	Edutainment	2006	DBLP DOI BibTeX RDF
15	Ruey-Maw Chen, Shih-Tang Lo, Yueh-Min Huang	Solving Multiprocessor Real-Time System Scheduling with Enhanced Competitive Scheme.	ICONIP (2)	2006	DBLP DOI BibTeX RDF	Slack neuron, Scheduling, Hopfield neural network, Competitive learning
15	Hisashige Ando, Nestoras Tzartzanis, William W. Walker	A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
15	Constantine Katsinis	Block Migration in Broadcast-based Multiprocessor Architectures.	NCA	2005	DBLP DOI BibTeX RDF
15	Kyriakos Stavrou, Paraskevas Evripidou, Pedro Trancoso	DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor.	SAMOS	2005	DBLP DOI BibTeX RDF
15	Jürgen Stohr, Alexander von Bülow, Georg Färber	Bounding Worst-Case Access Times in Modern Multiprocessor Systems.	ECRTS	2005	DBLP DOI BibTeX RDF
15	Chuan-Yue Yang, Jian-Jia Chen, Tei-Wei Kuo	An Approximation Algorithm for Energy-Efficient Scheduling on A Chip Multiprocessor.	DATE	2005	DBLP DOI BibTeX RDF
15	Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo	Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip.	DATE	2005	DBLP DOI BibTeX RDF
15	Nikolay Kavaldjiev, Gerard J. M. Smit, Pierre G. Jansen	Throughput of Streaming Applications Running on a Multiprocessor Architecture.	DSD	2005	DBLP DOI BibTeX RDF
15	Sander Stuijk, Twan Basten, Bart Mesman, Marc Geilen	Predictable embedding of large data structures in multiprocessor networks-on-chip.	DSD	2005	DBLP DOI BibTeX RDF
15	Liang-Yu Lin, Cheng-Yeh Wang, Pao-Jui Huang, Chih-Chieh Chou, Jing-Yang Jou	Communication-driven task binding for multiprocessor with latency insensitive network-on-chip.	ASP-DAC	2005	DBLP DOI BibTeX RDF
15	Francisco J. Villa, Manuel E. Acacio, José M. García 0001	Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture.	HPCC	2005	DBLP DOI BibTeX RDF
15	Weidong Shi, Hsien-Hsin S. Lee, Guofei Gu, Laura Falk, Trevor N. Mudge, Mrinmoy Ghosh	An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor.	ICAC	2005	DBLP DOI BibTeX RDF	Intrusion-tolerant computing, survivable service, buffer overflow, self-healing, rootkits, chip multi processor
15	Michael Hübner 0001, Katarina Paulsson, Jürgen Becker 0001	Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores.	IPDPS	2005	DBLP DOI BibTeX RDF
15	Gary Gostin, Jean-Francois Collard, Kirby Collins	The architecture of the HP Superdome shared-memory multiprocessor.	ICS	2005	DBLP DOI BibTeX RDF
15	Kaouther Abrougui, Mourad Elhadef	Parallel Self-Diagnosis of Large Multiprocessor Systems Under the Generalized Comparison Model.	ICPADS (1)	2005	DBLP DOI BibTeX RDF
15	Ali El-Haj-Mahmoud, Ahmed S. Al-Zawawi, Aravindh Anantaraman, Eric Rotenberg	Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing.	CASES	2005	DBLP DOI BibTeX RDF	worst-case execution time, schedulability analysis, superscalar processor, simultaneous multithreading, hard real-time, resource partitioning
15	Ghulam Qader, M. Younus Javed	Simulation of Resolution of CS Problem for Multiple Common Variables in Multiprocessor Environment.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
15	Khaled Z. Ibrahim	Correlation between Detailed and Simplified Simulations in Studying Multiprocessor Architecture.	ICCD	2005	DBLP DOI BibTeX RDF
15	Orlando Moreira, Jan David Mol, Marco Bekooij, Jef L. van Meerbergen	Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix.	IEEE Real-Time and Embedded Technology and Applications Symposium	2005	DBLP DOI BibTeX RDF
15	Erno Salminen, Ari Kulmala, Timo D. Hämäläinen	HIBI-based multiprocessor SoC on FPGA.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
15	Nathan Fisher, Sanjoy K. Baruah	The Partitioned, Static-Priority Scheduling of Sporadic Real-Time Tasks with Constrained Deadlines on Multiprocessor Platforms.	OPODIS	2005	DBLP DOI BibTeX RDF
15	Muhammet Fikret Ercan	Scheduling Pipelined Multiprocessor Tasks: An Experimental Study with Vision Architecture.	ICCSA (3)	2005	DBLP DOI BibTeX RDF
15	Samarjit Chakraborty	Towards a Framework for System-Level Design of Multiprocessor SoC Platforms for Media Processing.	ASAP	2005	DBLP DOI BibTeX RDF
15	Biplab Kumer Sarker, Toshiya Hirata, Kuniaki Uehara, Virendra C. Bhavsar	Mining Association Rules from Multi-stream Time Series Data on Multiprocessor Systems.	ISPA	2005	DBLP DOI BibTeX RDF
15	Daniel Quadt	A Hierarchical Production Planning Approach for Multiprocessor Flow Shops.	OR	2005	DBLP DOI BibTeX RDF
15	Samy Meftali, Jean-Luc Dekeyser, Isaac D. Scherson	Scalable Multistage Network for Multiprocessor System-on-Chip Design.	ISPAN	2005	DBLP DOI BibTeX RDF
15	Jason F. Cantin, Mikko H. Lipasti, James E. Smith 0001	Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking.	ISCA	2005	DBLP DOI BibTeX RDF
15	Seungbeom Lee, Sin-Chong Park	Transaction Analysis of Multiprocessor Based Platform with Bus Matrix.	IWSOC	2005	DBLP DOI BibTeX RDF
15	Patrick Schaumont, Bo-Cheng Charles Lai, Wei Qin, Ingrid Verbauwhede	Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design.	DAC	2005	DBLP DOI BibTeX RDF
15	Frode Eika Sandnes, Oliver Sinnen, Yo-Ping Huang	Gracefully Degrading Battery-Aware Static Multiprocessor Schedules Based on Symmetric Task Fusion.	PDCAT	2005	DBLP DOI BibTeX RDF
15	Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough	Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1.	IEEE Micro	2004	DBLP DOI BibTeX RDF
15	Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough	Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2.	IEEE Micro	2004	DBLP DOI BibTeX RDF
15	Stavros Souravlas, Manos Roumeliotis	A Pipeline Technique for Dynamic Data Transfer on a Multiprocessor Grid.	Int. J. Parallel Program.	2004	DBLP DOI BibTeX RDF	Block-cyclic redistribution, processor classes, pipeline tasks, High Performance Fortran
15	Daehyun Kim, Mainak Chaudhuri, Mark A. Heinrich, Evan Speight	Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	Active memory systems, address remapping, flexible memory controller architecture, distributed shared memory, cache coherence protocol
15	Annie S. Wu, Han Yu 0003, Shiyuan Jin, Kuo-Chi Lin, Guy A. Schiavone	An Incremental Genetic Algorithm Approach to Multiprocessor Scheduling.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF	Genetic algorithm, parallel processing, task scheduling
15	Seongbeom Kim, Dhruba Chandra, Yan Solihin	Fair Cache Sharing and Partitioning in a Chip Multiprocessor Architecture.	IEEE PACT	2004	DBLP DOI BibTeX RDF
15	Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu	Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.	IEEE PACT	2004	DBLP DOI BibTeX RDF
15	Sanjoy K. Baruah, Giuseppe Lipari	Executing Aperiodic Jobs in a Multiprocessor Constant-Bandwidth Server Implementation.	ECRTS	2004	DBLP DOI BibTeX RDF
15	Krishnan Srinivasan, Nagender Telkar, Vijay Ramamurthi, Karam S. Chatha	System-Level Design Techniques for Throughput and Power Optimization of Multiprocessor SoC Architectures.	ISVLSI	2004	DBLP DOI BibTeX RDF
15	Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee	Supporting Cache Coherence in Heterogeneous Multiprocessor Systems.	DATE	2004	DBLP DOI BibTeX RDF
15	Matthias Grünewald, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert 0001	A Mapping Strategy for Resource-Efficient Network Processing on Multiprocessor SoC.	DATE	2004	DBLP DOI BibTeX RDF
15	Jari Kreku, Jani Penttilä, Janne Kangas, Juha-Pekka Soininen	Workload Simulation Method for Evaluation of Application Feasibility in a Mobile Multiprocessor Platform.	DSD	2004	DBLP DOI BibTeX RDF
15	Andreas Larsson, Anders Gidenstam, Phuong Hoai Ha, Marina Papatriantafilou, Philippas Tsigas	Multi-word Atomic Read/Write Registers on Multiprocessor Systems.	ESA	2004	DBLP DOI BibTeX RDF
15	Marco Bekooij, Orlando Moreira, Peter Poplavko, Bart Mesman, Milan Pastrnak, Jef L. van Meerbergen	Predictable Embedded Multiprocessor System Design.	SCOPES	2004	DBLP DOI BibTeX RDF
15	Armando Astarloa, Jesús Lázaro 0001, Unai Bidarte, José Luis Martín 0001, Aitzol Zuloaga	A Self-Reconfiguration Framework for Multiprocessor CSoPCs.	FPL	2004	DBLP DOI BibTeX RDF
15	Saifeddine Berrayana, Etienne Faure, Daniela Genius, Frédéric Pétrot	Modular On-chip Multiprocessor for Routing Applications.	Euro-Par	2004	DBLP DOI BibTeX RDF
15	Sanjoy K. Baruah	Cost Efficient Synthesis of Real-Time Systems upon Heterogeneous Multiprocessor Platforms.	IPDPS	2004	DBLP DOI BibTeX RDF	Embedded systems, Approximation algorithms, Multiprocessors, Periodic tasks
15	Raymond Hoare, Shen Chih Tung, Katrina Werger	An 88-Way Multiprocessor within an FPGA with Customizable Instructions.	IPDPS	2004	DBLP DOI BibTeX RDF	FPGA, Architecture, Parallelism, DSP, SIMD
15	Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, David A. Wood 0001	Using Speculation to Simplify Multiprocessor Design.	IPDPS	2004	DBLP DOI BibTeX RDF
15	Jun Wu 0010, Jian-Jia Chen, Chih-wen Hsueh, Tei-Wei Kuo	Scheduling of Query Execution Plans in Symmetric Multiprocessor Database Systems.	IPDPS	2004	DBLP DOI BibTeX RDF