Search results for "multiprocessors"

Hits ?▲	Authors	Title	Venue	Year	Link
12	Saravanan Ramanathan, Arvind Easwaran	Mixed-Criticality Scheduling on Multiprocessors with Service Guarantees.	ISORC	2018	DBLP DOI BibTeX RDF
12	Risat Mahmud Pathan	Improving the Schedulability and Quality of Service for Federated Scheduling of Parallel Mixed-Criticality Tasks on Multiprocessors.	ECRTS	2018	DBLP DOI BibTeX RDF
12	Kathrin Rosvall, Tage Mohammadat, George Ungureanu, Johnny Öberg, Ingo Sander	Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors.	DSD	2018	DBLP DOI BibTeX RDF
12	Baisakhi Das, Mamata Dalui, Anupama Mondal, Salma Mandi, Nilanjana Das, Biplab K. Sikdar	Evaluation of Misspeculation Impact on Chip-Multiprocessors Power Overhead.	ICSCA	2018	DBLP DOI BibTeX RDF
12	Brvan Donvanavard, Amir Mahdi Hosseini Monazzah, Nikil D. Dutt, Tiago Mück	Exploring Hybrid Memory Caches in Chip Multiprocessors.	ReCoSoC	2018	DBLP DOI BibTeX RDF
12	Aniseh Dorostkar, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	Optimization-based reconfigurable approach for low-power 3D chip-multiprocessors.	LASCAS	2018	DBLP DOI BibTeX RDF
12	Zheng Dong 0002, Cong Liu 0005	Work-in-Progress: New Analysis Techniques for Supporting Hard Real-Time Sporadic DAG Task Systems on Multiprocessors.	RTSS	2018	DBLP DOI BibTeX RDF
12	Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines.	ISCAS	2018	DBLP DOI BibTeX RDF
12	Pooneh Safayenikoo, Arghavan Asad, Farah Mohammadi 0001	An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses.	CCECE	2018	DBLP DOI BibTeX RDF
12	Alankar V. Umdekar, Arijit Nath, Shirshendu Das, Hemangee K. Kapoor	Dynamic Thermal Management by Using Task Migration in Conjunction with Frequency Scaling for Chip Multiprocessors.	VLSID	2018	DBLP DOI BibTeX RDF
12	Tiago Rogério Mück	Reflective On-Chip Resource Management Policies for Energy-Efficient Heterogeneous Multiprocessors.		2018	RDF
12	Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha	ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-Based Chip Multiprocessors.	IEEE Trans. Multi Scale Comput. Syst.	2017	DBLP DOI BibTeX RDF
12	Juan M. Cebrian, Ricardo Fernández Pascual, Alexandra Jimborean, Manuel E. Acacio, Alberto Ros 0001	A dedicated private-shared cache design for scalable multiprocessors.	Concurr. Comput. Pract. Exp.	2017	DBLP DOI BibTeX RDF
12	Sumeet S. Kumar, Amir Zjajo, René van Leuken 0001	Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2017	DBLP DOI BibTeX RDF
12	Akram Reza, Mahnaz Rafie	Limited contiguous processor allocation mechanism in the mesh-connected multiprocessors using compaction.	J. Supercomput.	2017	DBLP DOI BibTeX RDF
12	Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul M. Carpenter, Nacho Navarro, Alex Ramírez	Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors.	Int. J. Parallel Program.	2017	DBLP DOI BibTeX RDF
12	Wei Shu, Nian-Feng Tzeng	Compressed Sharer Tracking and Relinquishment Coherence for Superior Directory Efficiency of Chip Multiprocessors.	IEEE Trans. Computers	2017	DBLP DOI BibTeX RDF
12	Muhammad E. S. Elrabaa, Ayman Hroub, Muhamed F. Mudawar, Amran Al-Aghbari, Mohammed Alasli, Ahmad Khayyat	A Very Fast Trace-Driven Simulation Platform for Chip-Multiprocessors Architectural Explorations.	IEEE Trans. Parallel Distributed Syst.	2017	DBLP DOI BibTeX RDF
12	Ju Hee Choi, Gi-Ho Park	NVM Way Allocation Scheme to Reduce NVM Writes for Hybrid Cache Architecture in Chip-Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2017	DBLP DOI BibTeX RDF
12	Shaoming Chen, Samuel Irving, Lu Peng 0001, Yue Hu, Ying Zhang 0016, Ashok Srivastava	Using Switchable Pins to Increase Off-Chip Bandwidth in Chip-Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2017	DBLP DOI BibTeX RDF
12	Arghavan Asad, Ozcan Ozturk 0001, Mahmood Fathy, Mohammad Reza Jahed-Motlagh	Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy.	Microprocess. Microsystems	2017	DBLP DOI BibTeX RDF
12	Rajesh Devaraj, Arnab Sarkar, Santosh Biswas	Fault-Tolerant Preemptive Aperiodic RT Scheduling by Supervisory Control of TDES on Multiprocessors.	ACM Trans. Embed. Comput. Syst.	2017	DBLP DOI BibTeX RDF
12	Mohaddeseh Hoveida, Fatemeh Aghaaliakbari, Ramin Bashizade, Mohammad Arjomand, Hamid Sarbazi-Azad	Efficient Mapping of Applications for Future Chip-Multiprocessors in Dark Silicon Era.	ACM Trans. Design Autom. Electr. Syst.	2017	DBLP DOI BibTeX RDF
12	Nadezhda A. Ezhova, Leonid B. Sokolinsky	Analytical study of the "master-worker" framework scalability on multiprocessors with distributed memory.	CoRR	2017	DBLP BibTeX RDF
12	Xu Jiang 0004, Nan Guan, Xiang Long, Wang Yi 0001	Semi-Federated Scheduling of Parallel Real-Time Tasks on Multiprocessors.	CoRR	2017	DBLP BibTeX RDF
12	Leonid B. Sokolinsky	Analytical Estimation of Scalability of Iterative Numerical Algorithms on Distributed Memory Multiprocessors.	CoRR	2017	DBLP BibTeX RDF
12	Moreno Marzolla, Gabriele D'Angelo	Parallel Sort-Based Matching for Data Distribution Management on Shared-Memory Multiprocessors.	CoRR	2017	DBLP BibTeX RDF
12	Cha V. Li, Vinicius Petrucci, Daniel Mossé	Exploring Machine Learning for Thread Characterization on Heterogeneous Multiprocessors.	ACM SIGOPS Oper. Syst. Rev.	2017	DBLP DOI BibTeX RDF
12	Ngoc-Son Pham, Youngmin Kim, Kwang-Hyun Baek, Chan-Gun Lee	Reduction of task migrations and preemptions in optimal real-time scheduling for multiprocessors by using dynamic T-L plane.	J. Syst. Archit.	2017	DBLP DOI BibTeX RDF
12	Changmin Ahn, Camilo A. Celis Guzman, Bernhard Egger 0002	POSTER: NUMA-Aware Power Management for Chip Multiprocessors.	PACT	2017	DBLP DOI BibTeX RDF
12	Risat Mahmud Pathan	Improving the Quality-of-Service for Scheduling Mixed-Criticality Systems on Multiprocessors.	ECRTS	2017	DBLP DOI BibTeX RDF
12	Aniseh Dorostkar, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	Optimal Placement of Heterogeneous Uncore Component in 3D Chip-Multiprocessors.	DSD	2017	DBLP DOI BibTeX RDF
12	Amr Abdelhafez, Enrique Alba 0001	Speed-up of synchronous and asynchronous distributed Genetic Algorithms: A first common approach on multiprocessors.	CEC	2017	DBLP DOI BibTeX RDF
12	Fatemeh Arezoomand, Arghavan Asad, Mahdi Fazeli, Mahmood Fathy, Farah Mohammadi 0001	Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors.	ReCoSoC	2017	DBLP DOI BibTeX RDF
12	Alexia Ingerson, David Chiu 0001, Jason Sawin	Cache-Friendly Bitmap Compression on Symmetric Multiprocessors.	ICAC	2017	DBLP DOI BibTeX RDF
12	Milad Ghorbani Moghaddam	Dynamic energy and reliability management in network-on-chip based chip multiprocessors.	IGSC	2017	DBLP DOI BibTeX RDF
12	Milad Ghorbani Moghaddam, Wenkai Guan, Cristinel Ababei	Investigation of LSTM based prediction for dynamic energy management in chip multiprocessors.	IGSC	2017	DBLP DOI BibTeX RDF
12	Chuge Wu, Ling Wang 0001, Jingjing Wang	A t-level driven search for estimation of distribution algorithm in solving task graph allocation to multiprocessors.	CASE	2017	DBLP DOI BibTeX RDF
12	Xia-an Bi, Qi Sun	Population dynamic evolutionary algorithm for virtual routers running on multiprocessors system.	ICNC-FSKD	2017	DBLP DOI BibTeX RDF
12	Jian-Jia Chen, Wen-Hung Huang 0001, Zheng Dong 0002, Cong Liu 0005	Fixed-priority scheduling of mixed soft and hare real-time tasks on multiprocessors.	RTCSA	2017	DBLP DOI BibTeX RDF
12	Kecheng Yang 0001, James H. Anderson	On the Soft Real-Time Optimality of Global EDF on Uniform Multiprocessors.	RTSS	2017	DBLP DOI BibTeX RDF
12	Xu Jiang 0004, Nan Guan, Xiang Long, Wang Yi 0001	Semi-Federated Scheduling of Parallel Real-Time Tasks on Multiprocessors.	RTSS	2017	DBLP DOI BibTeX RDF
12	Youhui Zhang, Youyang Zhang, Yanhua Li, Xiang Fei, Weimin Zheng	In-Place Irregular Computation for Message-Passing Chip-Multiprocessors.	ICPP Workshops	2017	DBLP DOI BibTeX RDF
12	Kramer Straube, Christopher Nitta, Raj Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Improving Execution Time of Parallel Programs on Large Scale Chip Multiprocessors with Constant Average Power Processing.	ICCD	2017	DBLP DOI BibTeX RDF
12	Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors.	ISQED	2017	DBLP DOI BibTeX RDF
12	Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi 0001	A new traffic compression method for end-to-end memory accesses in 3D chip-multiprocessors.	CCECE	2017	DBLP DOI BibTeX RDF
12	Shounak Chakraborty 0001, Hemangee K. Kapoor	Towards Controlling Chip Temperature by Dynamic Cache Reconfiguration in Multiprocessors.	VLSID	2017	DBLP DOI BibTeX RDF
12	Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam	An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors.	VLSID	2017	DBLP DOI BibTeX RDF
12	Sukarn Agarwal, Hemangee K. Kapoor	Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors.	VLSID	2017	DBLP DOI BibTeX RDF
12	Moreno Marzolla, Gabriele D'Angelo	Parallel sort-based matching for data distribution management on shared-memory multiprocessors.	DS-RT	2017	DBLP DOI BibTeX RDF
12	Pattaravut Maleehuan, Yuki Chiba, Toshiaki Aoki	Assembly program verification for multiprocessors with relaxed memory model using SMT solver.	TASE	2017	DBLP DOI BibTeX RDF
12	Avishek Choudhury, Biplab K. Sikdar	Performance Analysis of Disability Based Fault Tolerance Techniques for Permanent Faults in Chip Multiprocessors.	VDAT	2017	DBLP DOI BibTeX RDF
12	Malik Al-Manasia	Mitigating cache associativity and coherence scalability constraints for many-core chip multiprocessors		2017	RDF
12	Sara Afshar	Lock-Based Resource Sharing for Real-Time Multiprocessors.		2017	RDF
12	Paulraj Ranjith Kumar, K. Santhakumar, Sankaran Palani	An intelligent approach for optimizing Energy consumption and Schedule length of Embedded multiprocessors.	J. Intell. Fuzzy Syst.	2016	DBLP DOI BibTeX RDF
12	Ioannis Sourdis, Danish Anis Khan, Alirad Malek, Stavros Tzilis, Georgios Smaragdos, Christos Strydis	Resilient Chip Multiprocessors with Mixed-Grained Reconfigurability.	IEEE Micro	2016	DBLP DOI BibTeX RDF
12	Hao Xiao, Ning Wu, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang	Efficient Synchronization for Distributed Embedded Multiprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2016	DBLP DOI BibTeX RDF
12	Md Nashid Anjum, Honggang Wang 0001	Dynamic scheduling and analysis of real time systems with multiprocessors.	Digit. Commun. Networks	2016	DBLP DOI BibTeX RDF
12	Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad	An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors.	IEEE Trans. Computers	2016	DBLP DOI BibTeX RDF
12	Di Zhu 0002, Lizhong Chen, Siyu Yue, Timothy Mark Pinkston, Massoud Pedram	Providing Balanced Mapping for Multiple Applications in Many-Core Chip Multiprocessors.	IEEE Trans. Computers	2016	DBLP DOI BibTeX RDF
12	Pavan Poluri, Ahmed Louri	Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2016	DBLP DOI BibTeX RDF
12	Albert Esteve, Alberto Ros 0001, María Engracia Gómez, Antonio Robles, José Duato	Efficient TLB-Based Detection of Private Pages in Chip Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2016	DBLP DOI BibTeX RDF
12	Guangmo Tong, Cong Liu 0005	Supporting Soft Real-Time Sporadic Task Systems on Uniform Heterogeneous Multiprocessors with No Utilization Loss.	IEEE Trans. Parallel Distributed Syst.	2016	DBLP DOI BibTeX RDF
12	Ying Zhang 0016, Samuel Irving, Lu Peng 0001, Xin Fu, David M. Koppelman, Weihua Zhang, Jesse Ardonne	Design space exploration for device and architectural heterogeneity in chip-multiprocessors.	Microprocess. Microsystems	2016	DBLP DOI BibTeX RDF
12	Marta Ortín-Obón, Darío Suárez Gracia, María Villarroya-Gaudó, Cruz Izu, Víctor Viñals Yúfera	Analysis of network-on-chip topologies for cost-efficient chip multiprocessors.	Microprocess. Microsystems	2016	DBLP DOI BibTeX RDF
12	Risat Mahmud Pathan	Real-Time Scheduling on Uni- and Multiprocessors based on Priority Promotions.	Leibniz Trans. Embed. Syst.	2016	DBLP DOI BibTeX RDF
12	Sandeep Navada, Anil Krishna	Criticality Aware Multiprocessors.	CoRR	2016	DBLP BibTeX RDF
12	Leonid Yavits, Amir Morad, Ran Ginosar	Effect of Data Sharing on Private Cache Design in Chip Multiprocessors.	CoRR	2016	DBLP BibTeX RDF
12	Mason Thammawichai, Eric C. Kerrigan	Energy-Efficient Real-Time Scheduling for Two-Type Heterogeneous Multiprocessors.	CoRR	2016	DBLP BibTeX RDF
12	Peng Wu, Minsoo Ryu	EDZL Scheduling and Schedulability Analysis for Performance Asymmetric Multiprocessors.	Int. J. Found. Comput. Sci.	2016	DBLP DOI BibTeX RDF
12	Vicent Selfa, Crispín Gómez Requena, María Engracia Gómez, Julio Sahuquillo	A Simple Activation/Deactivation Prefetching Scheme for Chip Multiprocessors.	PDP	2016	DBLP DOI BibTeX RDF
12	Björn Andersson, Gurulingesh Raravi	Scheduling Constrained-Deadline Parallel Tasks on Two-type Heterogeneous Multiprocessors.	RTNS	2016	DBLP DOI BibTeX RDF
12	Sanjoy K. Baruah, Vincenzo Bonifaci, Renato Bruni, Alberto Marchetti-Spaccamela	ILP-Based Approaches to Partitioning Recurrent Workloads Upon Heterogeneous Multiprocessors.	ECRTS	2016	DBLP DOI BibTeX RDF
12	Alessandro Biondi 0001, Björn B. Brandenburg	Lightweight Real-Time Synchronization under P-EDF on Symmetric and Asymmetric Multiprocessors.	ECRTS	2016	DBLP DOI BibTeX RDF
12	Peng Wu, Shakaiba Majeed, Minsoo Ryu	Two approaches towards EDZL scheduling for performance asymmetric multiprocessors.	IC-NIDC	2016	DBLP DOI BibTeX RDF
12	Yingnan Cui, Wei Zhang 0012, Bingsheng He	A discrete thermal controller for chip-multiprocessors.	DATE	2016	DBLP BibTeX RDF
12	Emanuele Del Sozzo, Gianluca C. Durelli, E. M. G. Trainiti, Antonio Miele, Marco D. Santambrogio, Cristiana Bolchini	Workload-aware power optimization strategy for asymmetric multiprocessors.	DATE	2016	DBLP BibTeX RDF
12	Xiaomei Guo	A novel parallel FDTD algorithm on Non-Uniform Memory Access multiprocessors.	ICIS	2016	DBLP DOI BibTeX RDF
12	Pooneh Safayenikoo, Arghavan Asad, Kaamran Raahemifar, Mahmood Fathy	UCA: An Energy-efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to minimize crosstalk.	NoCArc@MICRO	2016	DBLP DOI BibTeX RDF
12	Sajib K. Biswas, Amit Rauniyar, Pranab K. Muhuri	Multi-objective Bayesian optimization algorithm for real-time task scheduling on heterogeneous multiprocessors.	CEC	2016	DBLP DOI BibTeX RDF
12	Yanhua Li, Youhui Zhang, Kunpeng Song, Haibin Wang, Weiming Zheng	Near Data Computation for Message-Passing Chip-Multiprocessors.	HPCC/SmartCity/DSS	2016	DBLP DOI BibTeX RDF
12	Elham Kashefi, Hamid R. Zarandi, Ann Gordon-Ross	Postponing wearout failures in chip multiprocessors using thermal management and thread migration.	ReCoSoC	2016	DBLP DOI BibTeX RDF
12	Cha V. Li, Vinicius Petrucci, Daniel Mossé	Predicting Thread Profiles across Core Types via Machine Learning on Heterogeneous Multiprocessors.	SBESC	2016	DBLP DOI BibTeX RDF
12	Daniel R. Mendat, Sang Chin 0001, Steve B. Furber, Andreas G. Andreou	Neuromorphic sampling on the SpiNNaker and parallella chip multiprocessors.	LASCAS	2016	DBLP DOI BibTeX RDF
12	Wei Shu, Nian-Feng Tzeng	Relinquishment coherence for enhancing directory efficiency in chip multiprocessors.	ICCD	2016	DBLP DOI BibTeX RDF
12	Shuyu Chen, Letian Huang, Song Li	An address remapping algorithm to reduce power consumption in NoC-based chip-multiprocessors.	ISOCC	2016	DBLP DOI BibTeX RDF
12		A heterogeneous memory organization with minimum energy consumption in 3D chip-multiprocessors.	CCECE	2016	DBLP DOI BibTeX RDF
12	Arif M. Khan, Alex Pothen, Md. Mostofa Ali Patwary, Mahantesh Halappanavar, Nadathur Rajagopalan Satish, Narayanan Sundaram, Pradeep Dubey	Designing scalable b-Matching algorithms on distributed memory multiprocessors by approximation.	SC	2016	DBLP DOI BibTeX RDF
12	Surajit Das, Shirshendu Das, Hemangee K. Kapoor	Tag only storage for capacity optimised last level cache in chip multiprocessors.	VDAT	2016	DBLP DOI BibTeX RDF
12	Jagpreet Singh, Aditya Gujral, Harmandeep Singh, Jag Ustit Singh, Nitin Auluck	Energy Aware Scheduling on Heterogeneous Multiprocessors with DVFS and Duplication.	PDCAT	2016	DBLP DOI BibTeX RDF
12	Marco Elver	Memory consistency directed cache coherence protocols for scalable multiprocessors.		2016	RDF
12	Gaurang Upasani	Soft error mitigation techniques for future chip multiprocessors.		2016	RDF
12	Vítor Schwambach	Methods and tools for rapid and efficient parallel implementation of computer vision algorithms on embedded multiprocessors. (Méthodes et outils pour l'implémentation rapide et efficace d'algorithmes de vision par ordinateur sur des multiprocesseurs embarqués).		2016	RDF
12	J. Rubén Titos Gil, Manuel E. Acacio	Hardware Approaches to Transactional Memory in Chip Multiprocessors.	Handbook on Data Centers	2015	DBLP DOI BibTeX RDF
12	Prapaporn Rattanatamrong, José A. B. Fortes	Improved real-time scheduling of periodic tasks on multiprocessors.	Concurr. Comput. Pract. Exp.	2015	DBLP DOI BibTeX RDF
12	Jade Alglave, Luc Maranget, Daniel Poetzl, Tyler Sorensen 0001	I compute, therefore I am (buggy): methodic doubt meets multiprocessors.	Tiny Trans. Comput. Sci.	2015	DBLP BibTeX RDF
12	Seyed Majid Zahedi, Benjamin C. Lee	Sharing Incentives and Fair Division for Multiprocessors.	IEEE Micro	2015	DBLP DOI BibTeX RDF
12	Seunghan Lee, Kyungsu Kang, Chong-Min Kyung	Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
12	Ying Wang 0001, Lei Zhang 0008, Yinhe Han 0001, Huawei Li 0001, Xiaowei Li 0001	Data Remapping for Static NUCA in Degradable Chip Multiprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
12	Nitin Chaturvedi, Arun Subramaniyan 0001, S. Gurunarayanan 0001	An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors.	J. Supercomput.	2015	DBLP DOI BibTeX RDF