Search results for "BIST"

Hits ?▲	Authors	Title	Venue	Year	Link
14	Dzmitry Maliuk, Yiorgos Makris	An analog non-volatile neural network platform for prototyping RF BIST solutions.	DATE	2014	DBLP DOI BibTeX RDF
14	C. Vasanthanayaki, A. Azhagu Jaisudhan Pazhani, Jincy Johnson	VLSI Implementation of Low Power Multiple Single Input Change (MSIC) Test Pattern Generation for BIST Scheme.	ISED	2014	DBLP DOI BibTeX RDF
14	Marzieh Mohammadi, Somayeh Sadeghi Kohan, Nasser Masoumi, Zainalabedin Navabi	An off-line MDSI interconnect BIST incorporated in BS 1149.1.	ETS	2014	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis	Concurrent online BIST for sequential circuits exploiting input reduction and output space compaction.	ETS	2014	DBLP DOI BibTeX RDF
14	Yun-Chao You, Chi-Chun Yang, Jin-Fu Li 0001, Chih-Yen Lo, Chao-Hsun Chen, Jenn-Shiang Lai, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu	BIST-Assisted Tuning Scheme for Minimizing IO-Channel Power of TSV-Based 3D DRAMs.	ATS	2014	DBLP DOI BibTeX RDF
14	Ali Ebrahim, Tughrul Arslan, Xabier Iturbe	A fast and scalable FPGA damage diagnostic service for R3TOS using BIST cloning technique.	FPL	2014	DBLP DOI BibTeX RDF
14	Intissar Toihria, Rim Ayadi, Mohamed Masmoudi	High Performance BIST PLL approach for VCO testing.	ATSIP	2014	DBLP DOI BibTeX RDF
14	Siam U. Hussain, Sudha Yellapantula, Mehrdad Majzoobi, Farinaz Koushanfar	BIST-PUF: online, hardware-based evaluation of physically unclonable circuit identifiers.	ICCAD	2014	DBLP DOI BibTeX RDF
14	Bendik Kleveland, Jeong Choi, Jeff Kumala, Pascal Adam, Patrick Chen, Rajesh Chopra, Antonio Cruz, Ronald B. David, Ashish Dixit, Sinan Doluca, Mark Hendrickson, Ben Lee, Ming Liu, Michael John Miller, Mike Morrison, Byeong Cheol Na, Jay Patel 0003, Dipak K. Sikdar, Michael Sporer, Clement Szeto, Anju Tsao, Jianguang Wang, Daniel Yau, Wesley Yu	Early detection and repair of VRT and aging DRAM bits by margined in-field BIST.	VLSIC	2014	DBLP DOI BibTeX RDF
14	Martin Omaña 0001, Daniele Rossi 0001, Edda Beniamino, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche	Power droop reduction during Launch-On-Shift scan-based logic BIST.	DFT	2014	DBLP DOI BibTeX RDF
14	Bruce Querbach, Rahul Khanna, David Blankenbeckler, Yulan Zhang, Ronald T. Anderson, David G. Ellis, Zale T. Schoenborn, Sabyasachi Deyati, Patrick Chiang 0001	A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time.	ITC	2014	DBLP DOI BibTeX RDF
14	Mukesh Agrawal 0001, Krishnendu Chakrabarty, Bill Eklow	A distributed, reconfigurable, and reusable bist infrastructure for 3D-stacked ICs.	ITC	2014	DBLP DOI BibTeX RDF
14	Stephen Sunter, Saghir A. Shaikh, Qing Lin	Fast BIST of I/O Pin AC specifications and inter-chip delays.	ITC	2014	DBLP DOI BibTeX RDF
14	Elena Dubrova, Mats Näslund, Gunnar Carlsson, Ben J. M. Smeets	Keyed logic BIST for Trojan detection in SoC.	ISSoC	2014	DBLP DOI BibTeX RDF
14	Taha Mehrabi, Kaamran Raahemifar, Vadim Geurkov	Design of a 4-bit programmable delay with TDC-based BIST for use in serial data links.	ISIC	2014	DBLP DOI BibTeX RDF
14	Ramesh Bhakthavatchalu, Sreeja Krishnan, V. Vineeth, M. Nirmala Devi 0001	Deterministic seed selection and pattern reduction in Logic BIST.	VDAT	2014	DBLP DOI BibTeX RDF
14	Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein	Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures.	DAC	2014	DBLP DOI BibTeX RDF
14	Jorge Carballido, Jorge Hermosillo, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio 0002, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst	A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver.	IEEE J. Solid State Circuits	2013	DBLP DOI BibTeX RDF
14	Feng Liang 0001, Luwen Zhang, Shaochong Lei, Guohe Zhang, Kaile Gao, Bin Liang	Test Patterns of Multiple SIC Vectors: Theory and Application in BIST Schemes.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
14	Senling Wang, Yasuo Sato, Seiji Kajihara, Kohei Miyase	Scan-Out Power Reduction for Logic BIST.	IEICE Trans. Inf. Syst.	2013	DBLP DOI BibTeX RDF
14	Zhengliang Lv, Shiyuan Yang, Hong Wang, Linda Milor	A Delay Evaluation Circuit for Analog BIST Function.	IEICE Trans. Electron.	2013	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis, Costas Efstathiou, Hera Antonopoulou, Athanasios Milidonis	An effective two-pattern test generator for Arithmetic BIST.	Comput. Electr. Eng.	2013	DBLP DOI BibTeX RDF
14	Iftekhar Ibne Basith, Nabeeh Kandalaft, Rashid Rashidzadeh, Majid Ahmadi	Charge-Controlled Readout and BIST Circuit for MEMS Sensors.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2013	DBLP DOI BibTeX RDF
14	Tie-Bin Wu, Heng-Zhu Liu, Peng-Xia Liu, Dong-Sheng Guo, Hai-Ming Sun	A Cost-efficient Input Vector Monitoring Concurrent On-line BIST Scheme Based on Multilevel Decoding Logic.	J. Electron. Test.	2013	DBLP DOI BibTeX RDF
14	Jiafeng Zhu, Na Bai, Jianhui Wu	A low active and leakage power SRAM using a read and write divided and BIST programmable timing control circuit.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
14	Reza Nourmandi-Pour, Nafiseh Mousavian	A fully parallel BIST-based method to test the crosstalk defects on the inter-switch links in NOC.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
14	Aiwu Ruan, Shi Kang, Yu Wang, Xiao Han, Zujian Zhu, Yongbo Liao, Peng Li	A Built-In Self-Test (BIST) system with non-intrusive TPG and ORA for FPGA test and diagnosis.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
14	Xin Chen, Ning Wu, Wei Hu, Weiwei Shan	BIST design of power switch.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
14	Weizheng Wang, Peng Liu 0045, Shuo Cai, Lingyun Xiang	Low power logic BIST with high test effectiveness.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
14	Daniel Arbet, Gabriel Nagy, Viera Stopjaková, Gábor Gyepes	Efficiency of oscillation-based BIST in 90nm CMOS active analog filters.	DDECS	2013	DBLP DOI BibTeX RDF
14	Priyanka Gadde, Mohammed Y. Niamat	FPGA memory testing technique using BIST.	MWSCAS	2013	DBLP DOI BibTeX RDF
14	Hakim Zimouche, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	A BIST method for TSVs pre-bond test.	IDT	2013	DBLP DOI BibTeX RDF
14	Elmira Karimi, Mahmoud Tabandeh, M. H. Haghbayan	Test data compression strategy while using hybrid-BIST methodology.	EWDTS	2013	DBLP DOI BibTeX RDF
14	Ireneusz Mrozek, Svetlana V. Yarmolik	Analyses of two run march tests with address decimation for BIST procedure.	EWDTS	2013	DBLP DOI BibTeX RDF
14	Yang Yu 0015, Zhiming Yang 0001, Xiyuan Peng, Dianguo Xu 0001	Efficient concurrent BIST with comparator-based response analyzer.	I2MTC	2013	DBLP DOI BibTeX RDF
14	Bibhas Ghoshal, Indranil Sengupta 0001	A Distributed BIST Scheme for NoC-Based Memory Cores.	DSD	2013	DBLP DOI BibTeX RDF
14	Jerzy Tyszer, Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee 0001, Janusz Rajski	New test compression scheme based on low power BIST.	ETS	2013	DBLP DOI BibTeX RDF
14	Christophe Kelma, Sébastien Darfeuille, Andreas Neuburger, Andreas Lobnig	RF BIST and test strategy for the receive part of an RF transceiver in CMOS technology.	ETS	2013	DBLP DOI BibTeX RDF
14	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras	BIST architecture to detect defects in tsvs during pre-bond testing.	ETS	2013	DBLP DOI BibTeX RDF
14	Martin Omaña 0001, Daniele Rossi 0001, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache	Novel approach to reduce power droop during scan-based logic BIST.	ETS	2013	DBLP DOI BibTeX RDF
14	Akihiro Tomita, Xiaoqing Wen, Yasuo Sato, Seiji Kajihara, Patrick Girard 0001, Mohammad Tehranipoor, Laung-Terng Wang	On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST.	Asian Test Symposium	2013	DBLP DOI BibTeX RDF
14	Amit Kumar 0004, Janusz Rajski, Sudhakar M. Reddy, Thomas Rinderknecht	On the Generation of Compact Deterministic Test Sets for BIST Ready Designs.	Asian Test Symposium	2013	DBLP DOI BibTeX RDF
14	Koay Soon Chan, Nuzrul Fahmi Nordin, Kim Chon Chan, Terk Zyou Lok, Chee Wai Yong	Multi-histogram ADC BIST System for ADC Linearity Testing.	Asian Test Symposium	2013	DBLP DOI BibTeX RDF
14	Manuel J. Barragán, Gildas Léger, Diego Vázquez, Adoración Rueda	Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique.	LASCAS	2013	DBLP DOI BibTeX RDF
14	Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale	A 3D IC BIST for pre-bond test of TSVs using ring oscillators.	NEWCAS	2013	DBLP DOI BibTeX RDF
14	Imene Lahbib, Mohamed-Aziz Doukkali, Philippe Descarnps, Christophe Kelma, Olivier Tesson	Design of an embedded RF signal generator for BIST application.	NEWCAS	2013	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis, Costas Efstathiou, Cleo Sgouropoulou	A low-cost input vector monitoring concurrent BIST scheme.	IOLTS	2013	DBLP DOI BibTeX RDF
14	Michael Nicolaidis, Panagiota Papavramidou	Transparent BIST for ECC-based memory repair.	IOLTS	2013	DBLP DOI BibTeX RDF
14	Shi-Yu Huang, Jeo-Yen Lee, Kun-Han Tsai, Wu-Tung Cheng	At-speed BIST for interposer wires supporting on-the-spot diagnosis.	IOLTS	2013	DBLP DOI BibTeX RDF
14	Richun Fei, Jocelyn Moreau, Salvador Mir	BIST of interconnection lines in the pixel matrix of CMOS imagers.	IWASI	2013	DBLP DOI BibTeX RDF
14	Pablo A. Petrashin, Carlos Dualibe, Walter J. Lancioni, Luis E. Toledo	Low-cost DC BIST for analog circuits: A case study.	LATW	2013	DBLP DOI BibTeX RDF
14	Emanuel Dogaru, Filipe Vinci dos Santos, William Rebernak	LMS-based RF BIST architecture for multistandard transmitters.	DFTS	2013	DBLP DOI BibTeX RDF
14	Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel	BIST for logic and local interconnect resources in a novel mesh of cluster FPGA.	DFTS	2013	DBLP DOI BibTeX RDF
14	Samed Maltabas, Osman Kubilay Ekekon, Kemal Kulovic, Anne Meixner, Martin Margala	An IDDQ BIST approach to characterize phase-locked loop parameters.	VTS	2013	DBLP DOI BibTeX RDF
14	Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian	An effective solution for building memory BIST infrastructure based on fault periodicity.	VTS	2013	DBLP DOI BibTeX RDF
14	Sen-Wen Hsiao, Nicholas Tzou, Abhijit Chatterjee	A programmable BIST design for PLL static phase offset estimation and clock duty cycle detection.	VTS	2013	DBLP DOI BibTeX RDF
14	Yi Cai, Liming Fang, Ivan Chan, Max Olsen, Kevin Richter	12Gbps SerDes Jitter Tolerance BIST in production loopback testing with enhanced spread spectrum clock generation circuit.	ITC	2013	DBLP DOI BibTeX RDF
14	Zoe Conroy, Alfred L. Crouch	BA-BIST: Board test from inside the IC out.	ITC	2013	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis, Costas Efstathiou, Cleo Sgouropoulou	Symmetric transparent online BIST for arrays of word-organized RAMs.	DTIS	2013	DBLP DOI BibTeX RDF
14	Takanori Moriyasu, Satoshi Ohtake	A Method of LFSR Seed Generation for Scan-Based BIST Using Constrained ATPG.	CISIS	2013	DBLP DOI BibTeX RDF
14	Palanichamy Manikandan	Path Delay Fault Test and BIST.		2013	RDF
14	Ireneusz Mrozek, Vyacheslav N. Yarmolik	Antirandom Test Vectors for BIST in Hardware/Software Systems.	Fundam. Informaticae	2012	DBLP DOI BibTeX RDF
14	Ya-Ting Shyu, Ying-Zu Lin, Rong-Sing Chu, Guan-Ying Huang, Soon-Jyh Chang	A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2012	DBLP DOI BibTeX RDF
14	Jingbo Duan, Bharath K. Vasan, Chen Zhao, Degang Chen 0001, Randall L. Geiger	On Chip Signal Generators for Low Overhead ADC BIST.	J. Electron. Test.	2012	DBLP DOI BibTeX RDF
14	Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Shyam Kumar Devarakond, Hyun Woo Choi, Abhijit Chatterjee	BIST/Digital-Compatible Testing of RF Devices Using Distortion Model Fitting.	J. Electron. Test.	2012	DBLP DOI BibTeX RDF
14	Shao-Feng Hung, Hao-Chiao Hong	Experimental Results of Testing a BIST Σ-Δ ADC on the HOY Wireless Test Platform.	J. Electron. Test.	2012	DBLP DOI BibTeX RDF
14	Jun Yuan, Masayoshi Tachibana	A common-mode BIST technique for fully-differential sample-and-hold circuits.	IEICE Electron. Express	2012	DBLP DOI BibTeX RDF
14	Weizheng Wang, Jishun Kuang, Peng Liu 0045, Xin Peng, Zhiqiang You	Switching activity reduction for scan-based BIST using weighted scan input data.	IEICE Electron. Express	2012	DBLP DOI BibTeX RDF
14	M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi	Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST.	DDECS	2012	DBLP DOI BibTeX RDF
14	Jaan Raik, Vineeth Govind	Low-area boundary BIST architecture for mesh-like network-on-chip.	DDECS	2012	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis	Input vector monitoring on line concurrent BIST based on multilevel decoding logic.	DATE	2012	DBLP DOI BibTeX RDF
14	Rene Krenz-Baath, Friedrich Hapke, Rolf Hinze, Reinhard Meier, Maija Ryynaenen, Andreas Glowatz	Robust Evaluation of Weighted Random Logic BIST Structures in Industrial Designs.	DSD	2012	DBLP DOI BibTeX RDF
14	Cândido Duarte, Henrique Cavadas, Pedro Coke, Luis Malheiro, Vítor Grade Tavares, Pedro Guedes de Oliveira	BIST design for analog cell matching.	ETS	2012	DBLP DOI BibTeX RDF
14	Senling Wang, Yasuo Sato, Kohei Miyase, Seiji Kajihara	A Scan-Out Power Reduction Method for Multi-cycle BIST.	Asian Test Symposium	2012	DBLP DOI BibTeX RDF
14	Yasuo Sato, Senling Wang, Takaaki Kato, Kohei Miyase, Seiji Kajihara	Low Power BIST for Scan-Shift and Capture Power.	Asian Test Symposium	2012	DBLP DOI BibTeX RDF
14	Saif Uddin, Johnny Öberg	Testing of an off-chip NoC protocol using a BIST/Synthesizable Testbench approach.	NORCHIP	2012	DBLP DOI BibTeX RDF
14	Feiran Lei, Vivek Yenamandra, Steven Bibyk, Mohammed Ismail 0001	A RF/DC current-mode detector for BiST and digital calibration of current-driven mixers.	ICECS	2012	DBLP DOI BibTeX RDF
14	Lampros Dermentzoglou, John Liaperdos, Angela Arapoyanni, Yiorgos Tsiatouhas	Testing wireless transceivers' RF front-ends utilizing defect-oriented BIST techniques.	ICECS	2012	DBLP DOI BibTeX RDF
14	Jorge Hermosillo, Jorge Carballido, Arturo Veloz-Guerrero, David Arditti, Alberto Del Rio 0002, Edgar Borrayo Sandoval, Manuel E. Guzman-Renteria, Hasnain Lakdawala, Marian Verhelst	A programmable calibration/BIST engine for RF/analog blocks in SoCs.	ESSCIRC	2012	DBLP DOI BibTeX RDF
14	Jingbo Duan, Degang Chen 0001, Randall L. Geiger	A low cost method for testing offset and gain error for ADC BIST.	ISCAS	2012	DBLP DOI BibTeX RDF
14	Bharath K. Vasan, Siva Sudani, Degang Chen 0001, Randall L. Geiger	Sinusoidal signal generation for production testing and BIST applications.	ISCAS	2012	DBLP DOI BibTeX RDF
14	Dzmitry Maliuk, Nathan Kupp, Yiorgos Makris	Towards a fully stand-alone analog/RF BIST: A cost-effective implementation of a neural classifier.	VTS	2012	DBLP DOI BibTeX RDF
14	Wei-Cheng Lien, Tong-Yu Hsieh, Kuen-Jong Lee	Routing-efficient implementation of an internal-response-based BIST architecture.	VLSI-DAT	2012	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis, Kyriakos Axiotis, Nikolaos S. Papaspyrou, Hera Antonopoulou, Costas Efstathiou	Test Set Embedding into Low-Power BIST Sequences Using Maximum Bipartite Matching.	Panhellenic Conference on Informatics	2012	DBLP DOI BibTeX RDF
14	Matthieu Dubois, Emeric de Foucauld, Christopher Mounet, Serigne Dia, Cedric Mayor	A frequency measurement BIST implementation targeting gigahertz application.	ITC	2012	DBLP DOI BibTeX RDF
14	Zoe Conroy, James J. Grealish, Harrison Miles, Anthony J. Suto, Alfred L. Crouch, Skip Meyers	Board assisted-BIST: Long and short term solutions for testpoint erosion - Reaching into the DFx toolbox.	ITC	2012	DBLP DOI BibTeX RDF
14	Bibhas Ghoshal, Subhadip Kundu, Indranil Sengupta 0001, Santanu Chattopadhyay	Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip.	VDAT	2012	DBLP DOI BibTeX RDF
14	Jiajing Wang, A. Hoefler, Benton H. Calhoun	An Enhanced Canary-Based System With BIST for SRAM Standby Power Reduction.	IEEE Trans. Very Large Scale Integr. Syst.	2011	DBLP DOI BibTeX RDF
14	HyeonUk Son, Incheol Kim, Sang-Goog Lee, Jin-Ho Ahn, Jeong-Do Kim, Sungho Kang	Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach.	IEICE Trans. Electron.	2011	DBLP DOI BibTeX RDF
14	Nilanjan Mukherjee 0001, Artur Pogiel, Janusz Rajski, Jerzy Tyszer	BIST-Based Fault Diagnosis for Read-Only Memories.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2011	DBLP DOI BibTeX RDF
14	Jianfeng Zhu 0001, Hu He 0001, Dong Wu, Liyang Pan	Erratum to: A Cost-Efficient Self-Configurable BIST Technique for Testing Multiplexer-Based FPGA Interconnect.	J. Electron. Test.	2011	DBLP DOI BibTeX RDF
14	Gurgen Harutunyan, Aram Hakhumyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian	Symmetry Measure for Memory Test and Its Application in BIST Optimization.	J. Electron. Test.	2011	DBLP DOI BibTeX RDF
14	Jianfeng Zhu 0001, Hu He 0001, Dong Wu, Liyang Pan	A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect.	J. Electron. Test.	2011	DBLP DOI BibTeX RDF
14	Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu	Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping.	J. Electron. Test.	2011	DBLP DOI BibTeX RDF
14	Reza Nourmandi-Pour, Nafiseh Mousavian, Ahmad Khadem-Zadeh	BIST for network on chip communication infrastructure based on combination of extended IEEE 1149.1 and IEEE 1500 standards.	Microelectron. J.	2011	DBLP DOI BibTeX RDF
14	R. S. Oliveira, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira 0001	On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications.	J. Low Power Electron.	2011	DBLP DOI BibTeX RDF
14	Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas, Mohammad Areef	A programmable BIST with macro and micro codes for embedded SRAMs.	EWDTS	2011	DBLP DOI BibTeX RDF
14	Atieh Lotfi, Parisa Kabiri, Zainalabedin Navabi	Configurable architecture for memory BIST.	EWDTS	2011	DBLP DOI BibTeX RDF
14	Ioannis Voyiatzis, Costas Efstathiou, Hera Antonopoulou	A Novel SRAM-Cell Based Input Vector Monitoring Concurrent BIST Architecture.	ETS	2011	DBLP DOI BibTeX RDF
14	V. R. Devanathan, Sunil Bhavsar, Rajat Mehrotra	Physical-Aware Memory BIST Datapath Synthesis: Architecture and Case-Studies on Complex SoCs.	Asian Test Symposium	2011	DBLP DOI BibTeX RDF