Search results for "Carry"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	C. W. Gill, Phillip E. Pace	Neural prediction of missile dynamics during hardware-in-the-loop captive-carry experiments.	ICNN	1997	DBLP DOI BibTeX RDF
15	Kiniio Ueda, Hiroaki Suzuki, Kakutaro Suda, Hirofumi Shinohara, Koichiro Mashiko	A 64-bit carry look ahead adder using pass transistor BiCMOS gates.	IEEE J. Solid State Circuits	1996	DBLP DOI BibTeX RDF
15	Luigi Ciminiera, Paolo Montuschi	Carry-Save Multiplication Schemes without Final Addition.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF
15	Alessandro De Gloria, Mauro Olivieri	Statistical Carry Lookahead Adders.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF
15	Fumio Kanehiro, Masayuki Inaba, Hirochika Inoue	Development of a two-armed bipedal robot that can walk and carry objects.	IROS	1996	DBLP DOI BibTeX RDF
15	Debanjan Saha, Sarit Mukherjee, Satish K. Tripathi	Carry-Over Round Robin: A Simple Cell Scheduling Mechanism for ATM Networks.	INFOCOM	1996	DBLP DOI BibTeX RDF
15	Patrik Larsson, Chris J. Nicol	Transition reduction in carry-save adder trees.	ISLPED	1996	DBLP DOI BibTeX RDF
15	T. Kesavadas, David J. Cannon	Virtual tools that carry attributes for interactively specifying intermediate manufacturing processes.	Virtual Real.	1995	DBLP DOI BibTeX RDF
15	Raymond Couture, Pierre L'Ecuyer	Linear Recurrences with Carry as Uniform Random Number Generators.	WSC	1995	DBLP DOI BibTeX RDF
15	Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin	Unifying carry-sum and signed-digital number representations for low power.	ISLPD	1995	DBLP DOI BibTeX RDF
15	Chin-Long Wey	Built-In Self Test (BIST) Design of High-Speed Carry-Free Dividers.	ISCAS	1995	DBLP DOI BibTeX RDF
15	Martin Colbert	Illustration of immature HCI engineering: carry forward in the development of military planning systems.		1995	RDF
15	Dhananjay S. Phatak, Israel Koren	Hybrid Signed-Digit Number Systems: A Unified Framework for Redundant Number Representations With Bounded Carry Propagation Chains.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF
15	Paul Skokowski	Can computers carry content 'inexplicitly'?	Minds Mach.	1994	DBLP DOI BibTeX RDF
15	Andrew Klapper	Feedback with Carry Shift Registers over Finite Fields (extended abstract).	FSE	1994	DBLP DOI BibTeX RDF
15	Chin-Long Wey	Concurrent Error Detection in High Speed Carry-free Division Using Alternative Input Data.	ICCD	1994	DBLP DOI BibTeX RDF
15	David R. Bull, Graham Wacey	Gate Level Optimisation of Primitive Operator Digital Filters using a Carry Save Decomposition.	ISCAS	1994	DBLP DOI BibTeX RDF
15	June Wang, Zhongde Wang, Graham A. Jullien, William C. Miller	Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple Output Domino Logic.	ISCAS	1994	DBLP DOI BibTeX RDF
15	Damian Harris-Dowsett, Steve Summerfield	Carry Save & Pipelining Techniques for Wave Digital Filters.	ISCAS	1994	DBLP DOI BibTeX RDF
15	Reza Hashemian	Design of a 54-bit adder using a modified Manchester carry chain.	Great Lakes Symposium on VLSI	1994	DBLP DOI BibTeX RDF
15	Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi	A C-Testable Carry-Free Divider.	ICCD	1993	DBLP DOI BibTeX RDF
15	Dhananjay S. Phatak, Israel Koren, Hoon Choi	Hybrid Number Representations with Bounded Carry Propagation Chains.	ICCD	1993	DBLP DOI BibTeX RDF
15	James B. Kuo, Hung-Pin Chen 0001, H. J. Huang	A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture with Carry Look Ahead for CPU VLSI.	ISCAS	1993	DBLP BibTeX RDF
15	Zhongde Wang, Graham A. Jullien, William C. Miller, June Wang	New Concepts for the Design of Carry Lookahaead Adders.	ISCAS	1993	DBLP BibTeX RDF
15	Clark D. Thomborson, Yi Sun	Optimizing carry lookahead adders for semicustom CMOS.	Great Lakes Symposium on VLSI	1993	DBLP DOI BibTeX RDF
15	M. Shamanna, Sterling R. Whitaker	A Carry Select Adder with Conflict Free Bypass Circuit.	VLSI Design	1993	DBLP DOI BibTeX RDF
15	Thomas W. Lynch, Earl E. Swartzlander Jr.	A Spanning Tree Carry Lookahead Adder.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF
15	Shu Tezuka, Pierre L'Ecuyer	Analysis of Add-with-Carry and Subtract-with-Borrow Generators.	WSC	1992	DBLP DOI BibTeX RDF
15	Toshinori Kobayashi, Yoichi Tsuji, Yoshinobu Iguchi	Proving the Carry-over Effect of Slow-Wave Sleep by Mathematical Models.	J. Robotics Mechatronics	1991	DBLP DOI BibTeX RDF
15	Vitit Kantabutra	Designing optimum carry-skip adders.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
15	Stanislaw J. Piestrak	Design of residue generators and multioperand modular adders using carry-save adders.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
15	Pak K. Chan, Martine D. F. Schlag	Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF
15	Jawed Siddiqi, Babak Khazaei	What are the 'Carry Over Effects' in changing from a Procedural to a Declarative Approach?	PPIG	1990	DBLP BibTeX RDF
15	Akhilesh Tyagi	A reduced area scheme for carry-select adders.	ICCD	1990	DBLP DOI BibTeX RDF
15	Silvio Turrini	Optimal group distribution in carry-skip adders.	IEEE Symposium on Computer Arithmetic	1989	DBLP DOI BibTeX RDF
15	Pak K. Chan, Martine D. F. Schlag	Analysis and design of CMOS Manchester adders with variable carry-skip.	IEEE Symposium on Computer Arithmetic	1989	DBLP DOI BibTeX RDF
15	Jawed I. A. Siddiqi, Babak Khazaei	What are the 'carry over effects' in changing from a procedural to a declarative approach?	COMPSAC	1989	DBLP DOI BibTeX RDF
15	Ichiro Kimura, Jutaroh Tadano	Guide and carry robot for hospital use.	Adv. Robotics	1988	DBLP DOI BibTeX RDF
15	Carlos F. Bunge, Annik Vivier Bunge, Gerardo Cisneros, Jean-Pierre Daudey	New algorithm and FORTRAN module to carry out the four-index transformation of atomic and molecular physics wholly in central memory.	Comput. Chem.	1988	DBLP DOI BibTeX RDF
15	Irving S. Reed, B. Sharma, Ming-Tang Shih, John Bailey, Trieu-Kien Truong	VLSI implementation of GSC architecture with a new ripple carry adder.	ICCD	1988	DBLP DOI BibTeX RDF
15	Wu-Tung Cheng, Janak H. Patel	A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders.	IEEE Trans. Computers	1987	DBLP DOI BibTeX RDF	minimum test set, testing, Adders, iterative logic arrays, multiple fault detection
15	Peter M. Fenwick	A Fast-Carry Adder with CMOS Transmission Gates.	Comput. J.	1987	DBLP DOI BibTeX RDF
15	D. Salomon	A Design for an Efficient NOR-Gate only, Binary-Ripple Adder with Carry-Completion-Detection Logic.	Comput. J.	1987	DBLP DOI BibTeX RDF
15	Ernest S. Hughes	The SSEC and Its Carry-Over Effects on the IBM Type 650.	IEEE Ann. Hist. Comput.	1986	DBLP DOI BibTeX RDF
15	Tin-Fook Ngai, Mary Jane Irwin, Shishpal Rawat	Regular Area-Time Efficient Carry-Lookahead Adders.	J. Parallel Distributed Comput.	1986	DBLP DOI BibTeX RDF
15	David Y. Y. Yun, Chang Nian Zhang	A fast carry-free algorithm and hardware design for extended integer GCD computation.	SYMSAC	1986	DBLP DOI BibTeX RDF
15	Tin-Fook Ngai, Mary Jane Irwin	Regular, area-time efficient carry-lookahead adders.	IEEE Symposium on Computer Arithmetic	1985	DBLP DOI BibTeX RDF
15	Ralph Kallman	A Faster 8-Bit Carry Circuit.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF
15	Michael Shapiro	Speak software and carry a strip chip.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
15	Oscar N. Garcia, Harvey Glass, Stanley C. Haimes	An approximate and empirical study of the distribution of adder inputs and maximum carry length propagation.	IEEE Symposium on Computer Arithmetic	1978	DBLP DOI BibTeX RDF
15	Jean P. Chinal	Boolean Features of Sign-Flipping and Signed-Carry Logic in Base -2.	IEEE Trans. Computers	1977	DBLP DOI BibTeX RDF
15	Hung Chi Lai	A Study of Current Logic Design Problems: Part I, Design of Diagnosable Mos Networks; Part Ii, Minimum Nor (Nand) Networks for Parity Functions of an Arbitrary Number of Variables; Part Iii, Minimum Parallel Binary Adders With Nor (Nand) Gates and Their Extensions to Networks Consisting of Carry-Save Adders		1976	RDF
15	Jürgen Schulte Mönting	Interpolation formulae for predicates and terms which carry their own history.	Arch. Math. Log.	1975	DBLP DOI BibTeX RDF
15	Chung-Kwong Yuen	Comment on "Some New Results on Average Worst Case Carry".	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
15	Dhiraj K. Pradhan	Fault-Tolerant Carry-Save Adders.	IEEE Trans. Computers	1974	DBLP DOI BibTeX RDF
15	Bruce E. Briley	Some New Results on Average Worst Case Carry.	IEEE Trans. Computers	1973	DBLP DOI BibTeX RDF
15	Charles W. Weller	A High-Speed Carry Circuit for Binary Adders.	IEEE Trans. Computers	1969	DBLP DOI BibTeX RDF
15	Domenico Ferrari	Fast Carry-Propagation Iterative Networks.	IEEE Trans. Computers	1968	DBLP DOI BibTeX RDF
15	Stanislaw Majerski	On Determination of Optimal Distributions of Carry Skips in Adders.	IEEE Trans. Electron. Comput.	1967	DBLP DOI BibTeX RDF
15	Héctor Arango, Jorge Santos	A Fast Carry-Propagation Circuit for Base 3 Signed Non redundant Arithmetic.	IEEE Trans. Electron. Comput.	1966	DBLP DOI BibTeX RDF
15	Emanuel Katell	A bounded carry inspection adder for fast parallel arithmetic.	AFIPS Fall Joint Computing Conference (1)	1965	DBLP DOI BibTeX RDF
15	Joseph F. Kruy	A fast conditional sum adder using carry bypass logic.	AFIPS Fall Joint Computing Conference (1)	1965	DBLP DOI BibTeX RDF
15	M. Lehman	The Minimization of Assimilations in Binary Carry-Storage Arithmetic Units.	IEEE Trans. Electron. Comput.	1963	DBLP DOI BibTeX RDF
15	Mu Yue Hsiao, Frederick F. Sellers Jr.	The Carry-Dependent Sum Adder.	IEEE Trans. Electron. Comput.	1963	DBLP DOI BibTeX RDF
15	Edward J. McCluskey	Reduction of Feedback Loops in Sequential Circuits and Carry Leads in Iterative Networks	Inf. Control.	1963	DBLP DOI BibTeX RDF
15	Orest J. Bedrij	Carry-Select Adder.	IRE Trans. Electron. Comput.	1962	DBLP DOI BibTeX RDF
15	Edward J. McCluskey	Reduction of feedback loops in sequential circuits and carry leads in iterative networks	SWCT	1962	DBLP DOI BibTeX RDF
15	Meier M. Lehman, Naphtali Burla	Skip Techniques for High-Speed Carry-Propagation in Binary Arithmetic Units.	IRE Trans. Electron. Comput.	1961	DBLP DOI BibTeX RDF
15	Meier M. Lehman, Naphtali Burla	A Note on the Simultaneous-Carry-Generation System for High-Speed Adders.	IRE Trans. Electron. Comput.	1960	DBLP DOI BibTeX RDF
15	George W. Reitwiesner	The Determination of Carry Propagation Length for Binary Addition.	IRE Trans. Electron. Comput.	1960	DBLP DOI BibTeX RDF
15	Gernot Metze, James E. Robertson	Elimination of carry propagation in digital computers.	IFIP Congress	1959	DBLP BibTeX RDF
15	Sullivan G. Campbell, G. H. Rosser Jr.	An analysis of carry transmission in computer addition.	ACM National Meeting	1958	DBLP DOI BibTeX RDF
15	Bruce Gilchrist, James H. Pomerene, S. Y. Wong	Fast Carry Logic for Digital Computers.	IRE Trans. Electron. Comput.	1955	DBLP DOI BibTeX RDF
14	Shinpei Kuribayashi, Yusuke Sakumoto, Hiroyuki Ohsaki, Satoshi Hasegawa, Makoto Imase	Performance Evaluation of Epidemic Broadcast with Directional Antennas in Vehicular Ad-Hoc Networks.	SAINT	2011	DBLP DOI BibTeX RDF	ITS (Intelligent Transport Systems), VANET (Ve-hicular Ad-hoc Network), DTN (Delay Tolerant Network), epidemic broadcast, DSCF (Directional Store-Carry-Forward), directional antenna
14	Álvaro Vázquez, Elisardo Antelo, Paolo Montuschi	Improved Design of High-Performance Parallel Decimal Multipliers.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	Decimal multiplication, decimal carry-save addition, decimal codings, parallel multiplication
14	Ching-Yi Yang, Shou-Chih Lo	Street Broadcast with Smart Relay for Emergency Messages in VANET.	AINA Workshops	2010	DBLP DOI BibTeX RDF	Emergency Broadcast, Carry and Forward, ITS, VANET
14	Birgit Graf, Christopher Parlitz, Martin Hägele	Robotic Home Assistant Care-O-bot® 3 Product Vision and Innovation Platform.	HCI (2)	2009	DBLP DOI BibTeX RDF	robotic home assistant, Care-O-bot, product vision, object learning and detection, safe human-robot interaction, fetch and carry tasks, navigation, manipulation
14	Alexandre Berzati, Cécile Canovas-Dumas, Louis Goubin	Fault Analysis of Rabbit: Toward a Secret Key Leakage.	INDOCRYPT	2009	DBLP DOI BibTeX RDF	carry analysis, Stream cipher, fault attacks, Rabbit
14	Andrew Klapper	Expected pi-Adic Security Measures of Sequences.	SETA	2008	DBLP DOI BibTeX RDF	algebraic feedback shift register, sequence, pseudo-randomness, security measure, feedback with carry shift register
14	Hirokatsu Shirahama, Takahiro Hanyu	Design of High-Performance Quaternary Adders Based on Output-Generator Sharing.	ISMVL	2008	DBLP DOI BibTeX RDF	Carry pre-addition, Differential-pair circuitry, Voltage-mode circuit, Transfer-gate circuitry, Current-mode circuit
14	Rao Naveed Bin Rais, Thierry Turletti, Katia Obraczka	Coping with episodic connectivity in heterogeneous networks.	MSWiM	2008	DBLP DOI BibTeX RDF	disruption tolerance, episodic connectivity, node relaying, store-carry-and-forward, heterogeneous networks
14	Saroja V. Siddamal, R. M. Banakar, B. C. Jinaga	Design of High-Speed Floating Point Multiplier.	DELTA	2008	DBLP DOI BibTeX RDF	FP operations, Fast Carry look ahead adder (MCLA), CSD algorithm, Booth algorithm
14	Zygmunt J. Haas, Tara Small	A new networking model for biological applications of ad hoc sensor networks.	IEEE/ACM Trans. Netw.	2006	DBLP DOI BibTeX RDF	animal monitoring, biological data acquisition, capacity-delay tradeoff, stochastic routing, store-carry-forward, wireless infostation model, sensor networks, delay-tolerant networks, data dissemination, flooding, epidemic modelling, SWIM, epidemic routing, sparse networks
14	Ghassem Jaberipur, Behrooz Parhami, Mohammad Ghodsi	An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	(4,2)-compressor, digit set, signed digit, computer arithmetic, redundant number system, carry-free addition
14	Ahmad A. Hiasat	High-Speed and Reduced-Area Modular Adder Structures for RNS.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	modular adder, hardware requirements, VLSI, Computer arithmetic, Residue Number System, time delay, carry-lookahead adder
14	Neil Burgess	The Flagged Prefix Adder and its Applications in Integer Arithmetic.	J. VLSI Signal Process.	2002	DBLP DOI BibTeX RDF	prefix adders, absolute difference, end-around carry, computer arithmetic
14	Dhananjay S. Phatak, Tom Goff, Israel Koren	Constant-Time Addition and Simultaneous Format Conversion Based on Redundant Binary Representations.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	constant-time addition, simultaneous format conversion, redundant adders, signed-digit addition, 4:2 compressor, Redundant representations, carry-save addition
14	Sorin Cotofana, Stamatis Vassiliadis	Signed Digit Addition and Related Operations with Threshold Logic.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	signed-digit arithmetic, redundant adders, redundant multipliers, neural networks, Computer arithmetic, threshold logic, carry-free addition, signed-digit number representation
14	Reto Zimmermann	Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF	Modulo (2^n=B11) adders and multipliers, end-around-carry parallel-prefix adders, IDEA cipher, cryptography, computer arithmetic, RNS, VLSI circuits
14	David Raymond Lutz, Doddaballapur Narasimha-Murthy Jayasimha	The Half-Adder Form and Early Branch Condition Resolution.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	half-adder form, branch conditions, early zero detection, carry generation detection, addition, subtraction
14	Peter Kornerup	Digit-Set Conversions: Generalizations and Application.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	conditional sum addition, digit set conversion, multiplier recoding, nonredundant representation, on-the-fly conversion, parallel prefix computation, carry-lookahead techniques, computer arithmetic, digital arithmetic, multiplying circuits, redundant representation
14	Jean Duprat, Yvan Herreros, Sylvanus Kla	New Redundant Representations of Complex Numbers and Vectors.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	n-dimensional vectors, digital arithmetic, multiplication, redundant representation, complex numbers, carry-free addition, signed-digit number systems, polygonal representation
14	Eric M. Schwarz, Michael J. Flynn	Parallel High-Radix Nonrestoring Division.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	parallel high-radix nonrestoring division, quotient estimation, generalized partial remainder, carry propagate adder, high-radix division, logic design, logic design, latency, computer arithmetic, digital arithmetic, combinatorial algorithm, SRT division
14	Jean Duprat, Jean-Michel Muller	The CORDIC Algorithm: New Results for Fast VLSI Implementation.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	sign functions, fast VLSI implementation, signed-digit implementation, carry-save representation, branching CORDIC method, constant normalization factor, online delay, cosine functions, VLSI, signal processing, digital arithmetic, CORDIC algorithm
14	Behrooz Parhami	On the Implementation of Arithmetic Support Functions for Generalized Signed-Digit Number Systems.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	zero detection, arithmetic support functions, generalized signed-digit number systems, OSD number representation, borrow-free subtraction, overflow handling, digital arithmetic, redundant number representations, carry-free addition, sign detection
14	Barry S. Fagin	Fast Addition of Large Integers.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	computation time asymmetry, large integers, massively parallel algorithms, average case behavior, large n-bit additions, multiple bits, parallel algorithms, computational model, digital arithmetic, massively parallel processor, binary addition, carry-lookahead
14	Nhon T. Quach, Michael J. Flynn	High-Speed Addition in CMOS.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	high speed addition, static complementary metal-oxide semiconductor, Ling-type 32-bit adder, serial transistors, worst-case critical path, carry look-ahead, CMOS, adders, CMOS integrated circuits, gate delay, 32 bit
14	Binay Sugla, David A. Carlson	Extreme Area-Time Tradeoffs in VLSI.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	bounded fan-in, fan-out prefix computation graphs, area requirements, constant factor reduction, area-time tradeoff, VLSI, lower bounds, digital arithmetic, layout, circuit layout CAD, carry look-ahead adder
14	Luigi Ciminiera, Paolo Montuschi	Higher Radix Square Rooting.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	nonrestoring square root algorithms, feasible algorithms, digit set, radicand bits, starting value, partial remainder bits, digit selection, radix 4, carry-save, constraints, representation, digital arithmetic, bounds, number theory, radix
14	Behrooz Parhami	Generalized Signed-Digit Number Systems: A Unifying Framework for Redundant Number Representations.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	generalised signed-digit number systems, carry, borrow, fast propagation-free addition, digital arithmetic, subtraction, unifying framework, redundant number representations