Search results for "ICCD"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Nishit Ashok Kapadia, Sudeep Pasricha	PRATHAM: A power delivery-aware and thermal-aware mapping framework for parallel embedded applications on 3D MPSoCs.	ICCD	2014	DBLP DOI BibTeX RDF
1	Massimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino	Automated generation of battery aging models from datasheets.	ICCD	2014	DBLP DOI BibTeX RDF
1	Te-Hsuan Chen, John P. Hayes	Analyzing and controlling accuracy in stochastic circuits.	ICCD	2014	DBLP DOI BibTeX RDF
1	Bei Zhang, Vishwani D. Agrawal	An optimized diagnostic procedure for pre-bond TSV defects.	ICCD	2014	DBLP DOI BibTeX RDF
1	Michael J. Lyons 0003, Gu-Yeon Wei, David M. Brooks	Multi-accelerator system development with the ShrinkFit acceleration framework.	ICCD	2014	DBLP DOI BibTeX RDF
1	Ying Zhang 0016, Li Zhao 0002, Ramesh Illikkal, Ravi R. Iyer 0001, Andrew Herdrich, Lu Peng 0001	QoS management on heterogeneous architecture for parallel applications.	ICCD	2014	DBLP DOI BibTeX RDF
1	Jiun-Yi Chiang, Jun-Hua Kuo, Ting-Shuo Hsu, Jing-Jia Liou	Chip clustering with mutual information on multiple clock tests and its application to yield tuning.	ICCD	2014	DBLP DOI BibTeX RDF
1	Ryota Shioya, Hideki Ando	Energy efficiency improvement of renamed trace cache through the reduction of dependent path length.	ICCD	2014	DBLP DOI BibTeX RDF
1	Amr Elshennawy, Sunil P. Khatri	An asynchronous Network-on-Chip router with low standby power.	ICCD	2014	DBLP DOI BibTeX RDF
1	Shrikanth Ganapathy, Ramon Canal, Antonio González 0001, Antonio Rubio 0001	iRMW: A low-cost technique to reduce NBTI-dependent parametric failures in L1 data caches.	ICCD	2014	DBLP DOI BibTeX RDF
1	Chi-Yuan Liu, Yao-Wen Chang	Simultaneous EUV flare- and CMP-aware placement.	ICCD	2014	DBLP DOI BibTeX RDF
1	Wei-Ting Jonas Chan, Andrew B. Kahng, Siddhartha Nath, Ichiro Yamamoto	The ITRS MPU and SOC system drivers: Calibration and implications for design-based equivalent scaling in the roadmap.	ICCD	2014	DBLP DOI BibTeX RDF
1	Yao Li 0004, Antonio Roldao Lopes, Zhouyun Xu, Zhengwei Qi, Haibing Guan	ScalaHDL: Express and test hardware designs in a Scala DSL.	ICCD	2014	DBLP DOI BibTeX RDF
1	Zhongdong Qi, Yici Cai, Qiang Zhou 0001	Accurate prediction of detailed routing congestion using supervised data learning.	ICCD	2014	DBLP DOI BibTeX RDF
1	Tao Zhang 0046, Xiaoyao Liang	Dynamic front-end sharing in graphics processing units.	ICCD	2014	DBLP DOI BibTeX RDF
1	Ozan Tuncer, Kalyan Vaidyanathan, Kenny C. Gross, Ayse K. Coskun	CoolBudget: Data center power budgeting with workload and cooling asymmetry awareness.	ICCD	2014	DBLP DOI BibTeX RDF
1	Chris Fallin, Chris Wilkerson, Onur Mutlu	The heterogeneous block architecture.	ICCD	2014	DBLP DOI BibTeX RDF
1	Hang Zhang 0031, Wei Zhang 0044, John C. Lach	A low-power accuracy-configurable floating point multiplier.	ICCD	2014	DBLP DOI BibTeX RDF
1	Chia-Chi Huang, Chang-Tzu Lin, Wei-Syun Liao, Chieh-Jui Lee, Hung-Ming Chen, Chia-Hsin Lee, Ding-Ming Kwai	Improving power delivery network design by practical methodologies.	ICCD	2014	DBLP DOI BibTeX RDF
1	Xiang Pan, Radu Teodorescu	NVSleep: Using non-volatile memory to enable fast sleep/wakeup of idle cores.	ICCD	2014	DBLP DOI BibTeX RDF
1	Raghavan Kumar, Wayne P. Burleson	Hybrid modeling attacks on current-based PUFs.	ICCD	2014	DBLP DOI BibTeX RDF
1	Ran Wang 0002, Krishnendu Chakrabarty, Sudipta Bhawmik	Built-in self-test for interposer-based 2.5D ICs.	ICCD	2014	DBLP DOI BibTeX RDF
1	Vidura Wijayasekara, Sudarshan K. Srinivasan, Scott C. Smith	Equivalence verification for NULL Convention Logic (NCL) circuits.	ICCD	2014	DBLP DOI BibTeX RDF
1	Seungjae Baek, Daeyeon Son, Dongwoo Kang, Jongmoo Choi, Sangyeun Cho	Design space exploration of an NVM-based memory hierarchy.	ICCD	2014	DBLP DOI BibTeX RDF
1	Siddharth Advani, Nandhini Chandramoorthy, Karthik Swaminathan, Kevin M. Irick, Yong Cheol Peter Cho, Jack Sampson, Vijaykrishnan Narayanan	Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Can Sitik, Scott Lerner, Baris Taskin	Timing characterization of clock buffers for clock tree synthesis.	ICCD	2014	DBLP DOI BibTeX RDF
1	Youyou Lu, Jiwu Shu, Long Sun, Onur Mutlu	Loose-Ordering Consistency for persistent memory.	ICCD	2014	DBLP DOI BibTeX RDF
1	Xin Tong 0005, Andreas Moshovos	BarTLB: Barren page resistant TLB for managed runtime languages.	ICCD	2014	DBLP DOI BibTeX RDF
1	Mengying Zhao, Liang Shi, Chengmo Yang, Chun Jason Xue	Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory.	ICCD	2014	DBLP DOI BibTeX RDF
1	Elliott Forbes, Niket Kumar Choudhary, Brandon H. Dwiel, Eric Rotenberg	Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores.	ICCD	2014	DBLP DOI BibTeX RDF
1	Walid J. Ghandour, Nadine J. Ghandour	Leveraging dynamic slicing to enhance indirect branch prediction.	ICCD	2014	DBLP DOI BibTeX RDF
1	Akhil Arunkumar, Carole-Jean Wu	ReMAP: Reuse and memory access cost aware eviction policy for last level cache management.	ICCD	2014	DBLP DOI BibTeX RDF
1	Beayna Grigorian, Glenn Reinman	Accelerating divergent applications on SIMD architectures using neural networks.	ICCD	2014	DBLP DOI BibTeX RDF
1	Pietro Mercati, Francesco Paterna, Andrea Bartolini, Luca Benini, Tajana Simunic Rosing	Dynamic variability management in mobile multicore processors under lifetime constraints.	ICCD	2014	DBLP DOI BibTeX RDF
1	Cheng-Chieh Huang, Vijay Nagarajan	Increasing cache capacity via critical-words-only cache.	ICCD	2014	DBLP DOI BibTeX RDF
1	Chris S. Lee, Kevin M. Irick, Jack Sampson, Chuanjun Zhang, Vijaykrishnan Narayanan	Exploiting natural redundancy in visual information.	ICCD	2014	DBLP DOI BibTeX RDF
1	Yaman Umuroglu, Magnus Jahre	An energy efficient column-major backend for FPGA SpMV accelerators.	ICCD	2014	DBLP DOI BibTeX RDF
1	Jaehyeong Sim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim	Timing error masking by exploiting operand value locality in SIMD architecture.	ICCD	2014	DBLP DOI BibTeX RDF
1	Seokin Hong, Jongmin Lee 0002, Soontae Kim	Ternary cache: Three-valued MLC STT-RAM caches.	ICCD	2014	DBLP DOI BibTeX RDF
1	Chen Liu 0013, Chengmo Yang	Improving multilevel PCM reliability through age-aware reading and writing strategies.	ICCD	2014	DBLP DOI BibTeX RDF
1	Yogesh Murarka, Pankaj Shailendra Gode, Sirish Kumar Pasupuleti, Soma Kohli	Software pipelining of dataflow programs with dynamic constructs on multi-core processor.	ICCD	2014	DBLP DOI BibTeX RDF
1	Ishan G. Thakkar, Sudeep Pasricha	3D-Wiz: A novel high bandwidth, optically interfaced 3D DRAM architecture with reduced random access time.	ICCD	2014	DBLP DOI BibTeX RDF
1	Giordano Salvador, Siddharth Nilakantan, Baris Taskin, Mark Hempstead, Ankit More	Static thread mapping for NoCs via binary instrumentation traces.	ICCD	2014	DBLP DOI BibTeX RDF
1		32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014	ICCD	2014	DBLP BibTeX RDF
1	Behnam Sedighi, Joseph J. Nahas, Michael T. Niemier, Xiaobo Sharon Hu	Boolean circuit design using emerging tunneling devices.	ICCD	2014	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Matteo Carminati, Marco Gribaudo, Antonio Miele	A lightweight and open-source framework for the lifetime estimation of multicore systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Mustafa Badaroglu, Kwok Ng, Mehdi Salmani Jelodar, SungGeun Kim, Gerhard Klimeck, Chorng-Ping Chang, Charles Cheung, Yuzo Fukuzaki	More Moore landscape for system readiness - ITRS2.0 requirements.	ICCD	2014	DBLP DOI BibTeX RDF
1	Qing Xie 0001, Yanzhi Wang, Shuang Chen 0001, Massoud Pedram	Variation-aware joint optimization of the supply voltage and sleep transistor size for the 7nm FinFET technology.	ICCD	2014	DBLP DOI BibTeX RDF
1	Alireza Shafaei, Yanzhi Wang, Massoud Pedram	Low write-energy STT-MRAMs using FinFET-based access transistors.	ICCD	2014	DBLP DOI BibTeX RDF
1	Costas Iordanou, Vassos Soteriou, Konstantinos Aisopos	Hermes: Architecting a top-performing fault-tolerant routing algorithm for Networks-on-Chips.	ICCD	2014	DBLP DOI BibTeX RDF
1	Rani S. Ghaida, Yasmine Badr, Puneet Gupta 0001	Pattern-restricted design at 10nm and beyond.	ICCD	2014	DBLP DOI BibTeX RDF
1	Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang 0001, Tulika Mitra, Smaïl Niar	Design space exploration of multiple loops on FPGAs using high level synthesis.	ICCD	2014	DBLP DOI BibTeX RDF
1	Jianxing Wang, Pooja Roy, Weng-Fai Wong, Xiuyuan Bi, Hai Li 0001	Optimizing MLC-based STT-RAM caches by dynamic block size reconfiguration.	ICCD	2014	DBLP DOI BibTeX RDF
1	Gary Smith 0001	Updates of the ITRS design cost and power models.	ICCD	2014	DBLP DOI BibTeX RDF
1	Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, Hannu Tenhunen	Dark silicon aware power management for manycore systems under dynamic workloads.	ICCD	2014	DBLP DOI BibTeX RDF
1	Fulya Kaplan, Charlie De Vivero, Samuel Howes, Manish Arora, Houman Homayoun, Wayne P. Burleson, Dean M. Tullsen, Ayse K. Coskun	Modeling and analysis of Phase Change Materials for efficient thermal management.	ICCD	2014	DBLP DOI BibTeX RDF
1	Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu	The Blacklisting Memory Scheduler: Achieving high performance and fairness at low cost.	ICCD	2014	DBLP DOI BibTeX RDF
1	Darshana Jayasinghe, Roshan G. Ragel, Jude Angelo Ambrose, Aleksandar Ignjatovic, Sri Parameswaran	Advanced modes in AES: Are they safe from power analysis based side channel attacks?	ICCD	2014	DBLP DOI BibTeX RDF
1	Manish Rana, Ramon Canal	REEM: Failure/non-failure region estimation method for SRAM yield analysis.	ICCD	2014	DBLP DOI BibTeX RDF
1	Yuchun Ma, Jinglan Liu, Chao Zhang, Wayne Luk	HW/SW partitioning for region-based dynamic partial reconfigurable FPGAs.	ICCD	2014	DBLP DOI BibTeX RDF
1	Tuck-Boon Chan, Sorin Dobre, Andrew B. Kahng	Improved signoff methodology with tightened BEOL corners.	ICCD	2014	DBLP DOI BibTeX RDF
1	Juan Antonio Carballo, Wei-Ting Jonas Chan, Paolo A. Gargini, Andrew B. Kahng, Siddhartha Nath	ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap.	ICCD	2014	DBLP DOI BibTeX RDF
1	Daming Zhang, Shuangchen Li, Ang Li, Yongpan Liu, Xiaobo Sharon Hu, Huazhong Yang	Intra-task scheduling for storage-less and converter-less solar-powered nonvolatile sensor nodes.	ICCD	2014	DBLP DOI BibTeX RDF
1	N. G. Chetan Kumar, Sudhanshu Vyas, Ron K. Cytron, Christopher D. Gill, Joseph Zambreno, Phillip H. Jones	Cache design for mixed criticality real-time systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Hideyuki Ichihara, Shota Ishii, Daiki Sunamori, Tsuyoshi Iwagaki, Tomoo Inoue	Compact and accurate stochastic circuits with shared random number sources.	ICCD	2014	DBLP DOI BibTeX RDF
1	Jiyang Yu, Peng Liu 0016	A Thread-Aware Adaptive Data Prefetcher.	ICCD	2014	DBLP DOI BibTeX RDF
1	Xue Lin, Yanzhi Wang, Naehyuck Chang, Massoud Pedram	Power supply and consumption co-optimization of portable embedded systems with hybrid power supply.	ICCD	2014	DBLP DOI BibTeX RDF
1	Vinay B. Y. Kumar, Shovan Maity, Sachin B. Patkar	Storage-allocation to sequential structures in High-Level Synthesis-assisted prototyping.	ICCD	2014	DBLP DOI BibTeX RDF
1	Andreas Steininger, Varadan Savulimedu Veeravalli, Dan Alexandrescu, Enrico Costenaro, Lorena Anghel	Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example.	ICCD	2014	DBLP DOI BibTeX RDF
1	Karthikeyan Dayalan, Meltem Ozsoy, Dmitry V. Ponomarev	Dynamic associative caches: Reducing dynamic energy of first level caches.	ICCD	2014	DBLP DOI BibTeX RDF
1	Fei Xia, Dejun Jiang 0001, Jin Xiong, Ninghui Sun	Write-aware random page initialization for non-volatile memory systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri	An area-efficient Ternary CAM design using floating gate transistors.	ICCD	2014	DBLP DOI BibTeX RDF
1	Congming Gao, Liang Shi, Kaijie Wu 0001, Chun Jason Xue, Edwin Hsing-Mean Sha	Exploit asymmetric error rates of cell states to improve the performance of flash memory storage systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Paula Aguilera, Katherine Morrow, Nam Sung Kim	Fair share: Allocation of GPU resources for both performance and fairness.	ICCD	2014	DBLP DOI BibTeX RDF
1	Levent Aksoy, Paulo F. Flores, José Monteiro 0001	Efficient design of FIR filters using hybrid multiple constant multiplications on FPGA.	ICCD	2014	DBLP DOI BibTeX RDF
1	Jue Wang, Xiangyu Dong, Yuan Xie 0001	ProactiveDRAM: A DRAM-initiated retention management scheme.	ICCD	2014	DBLP DOI BibTeX RDF
1	Wei Wei, Dejun Jiang 0001, Jin Xiong, Mingyu Chen 0001	HAP: Hybrid-memory-Aware Partition in shared Last-Level Cache.	ICCD	2014	DBLP DOI BibTeX RDF
1	Robert C. Aitken, David Pietromonaco, Brian Cline	DFM is dead - Long live DFM.	ICCD	2014	DBLP DOI BibTeX RDF
1	Satoshi Imamura, Hiroshi Sasaki 0001, Koji Inoue, Dimitrios S. Nikolopoulos	Power-capped DVFS and thread allocation with ANN models on modern NUMA systems.	ICCD	2014	DBLP DOI BibTeX RDF
1	Pritam Majumder, T. Venkata Kalyan, Madhu Mutyam	SFFMap: Set-First Fill mapping for an energy efficient pipelined data cache.	ICCD	2014	DBLP DOI BibTeX RDF
1	Stelios N. Neophytou, Maria K. Michael	Optimal variable ordering in ZBDD-based path representations for directed acyclic graphs.	ICCD	2014	DBLP DOI BibTeX RDF
1	Dawei Li, Ji-Hoon Kim, Seda Ogrenci Memik	Integrating thermocouple sensors into 3D ICs.	ICCD	2013	DBLP DOI BibTeX RDF
1	Fan Yao, Jie Chen 0020, Guru Venkataramani	JOP-alarm: Detecting jump-oriented programming-based anomalies in applications.	ICCD	2013	DBLP DOI BibTeX RDF
1	Matheus Trevisan Moreira, Ney Laert Vilar Calazans	Voltage scaling on C-elements: A speed, power and energy efficiency analysis.	ICCD	2013	DBLP DOI BibTeX RDF
1	Steven J. Battle, Mark Hempstead	Register allocation and VDD-gating algorithms for out-of-order architectures.	ICCD	2013	DBLP DOI BibTeX RDF
1	Qingchuan Shi, Farrukh Hijaz, Omer Khan	Towards efficient dynamic data placement in NoC-based multicores.	ICCD	2013	DBLP DOI BibTeX RDF
1	Karina Gitina, Sven Reimer, Matthias Sauer 0002, Ralf Wimmer 0001, Christoph Scholl 0001, Bernd Becker 0001	Equivalence checking of partial designs using dependency quantified Boolean formulae.	ICCD	2013	DBLP DOI BibTeX RDF
1	Bhawna Nayak, John Jose, Madhu Mutyam	SLIDER: Smart Late Injection DEflection Router for mesh NoCs.	ICCD	2013	DBLP DOI BibTeX RDF
1	Guangshuo Liu, Jinpyo Park, Diana Marculescu	Dynamic thread mapping for high-performance, power-efficient heterogeneous many-core systems.	ICCD	2013	DBLP DOI BibTeX RDF
1	Ying Teng, Baris Taskin	Resonant frequency divider design methodology for dynamic frequency scaling.	ICCD	2013	DBLP DOI BibTeX RDF
1	Nikos Foutris, Dimitris Gizopoulos, John Kalamatianos, Vilas Sridharan	Assessing the impact of hard faults in performance components of modern microprocessors.	ICCD	2013	DBLP DOI BibTeX RDF
1	Xiao Liu, John Kubiatowicz	Chisel-Q: Designing quantum circuits with a scala embedded language.	ICCD	2013	DBLP DOI BibTeX RDF
1	Infall Syafalni, Tsutomu Sasao	A TCAM generator for packet classification.	ICCD	2013	DBLP DOI BibTeX RDF
1	Tosiron Adegbija, Ann Gordon-Ross	Exploiting dynamic phase distance mapping for phase-based tuning of embedded systems.	ICCD	2013	DBLP DOI BibTeX RDF
1	Kuan Fang, Yufei Ni, Jiayuan He 0005, Zonghui Li, Shuai Mu 0002, Yangdong Deng	FastLanes: An FPGA accelerated GPU microarchitecture simulator.	ICCD	2013	DBLP DOI BibTeX RDF
1	Ankur Sharma, Joseph Sloan, Lucas Francisco Wanner, Salma Elmalaki 0001, Mani B. Srivastava, Puneet Gupta 0001	Towards analyzing and improving robustness of software applications to intermittent and permanent faults in hardware.	ICCD	2013	DBLP DOI BibTeX RDF
1	Vikram B. Suresh, Sandip Kundu	Managing test coverage uncertainty due to thermal noise in nano-CMOS: A case-study on an SRAM array.	ICCD	2013	DBLP DOI BibTeX RDF
1	Li Lei, Kai Cong, Fei Xie	Optimizing post-silicon conformance checking.	ICCD	2013	DBLP DOI BibTeX RDF
1	Madhushika M. E. Karunarathna, Yu-Chu Tian, Colin J. Fidge, Ross Hayward	Algorithm clustering for multi-algorithm processor design.	ICCD	2013	DBLP DOI BibTeX RDF
1	Jianlei Yang 0001, Yici Cai, Qiang Zhou 0001, Wei Zhao	Selected inversion for vectorless power grid verification by exploiting locality.	ICCD	2013	DBLP DOI BibTeX RDF

Publications at "ICCD"( http://dblp.L3S.de/Venues/ICCD )