| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | João Casaleiro, Luís B. Oliveira, Igor M. Filanovsky |
A quadrature RC-oscillator with capacitive coupling.  |
Integr.  |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Esmaeil Fatemi-Behbahani, Ebrahim Farshidi, Karim Ansari-Asl |
A new approach to analysis of residue probability density function in pipelined ADCs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | O. Bellaaj Kchaou, Amel Garbaya, Mouna Kotti, Pedro Pereira 0001, Mourad Fakhfakh, M. Helena Fino |
Sensitivity aware NSGA-II based Pareto front generation for the optimal sizing of analog circuits. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian Kuang 0001, Evangeline F. Y. Young |
Row-structure stencil planning approaches for E-beam lithography with overlapped characters. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiting Yan, Guanghui He, Weifeng He, Shuaijie Wang, Zhigang Mao |
High performance parallel turbo decoder with configurable interleaving network for LTE application. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Athar Javed Sethi, Fawnizu Azmadi Hussin, Nor Hisham Hamid |
Bio-inspired NoC fault tolerant techniques using guaranteed throughput and best effort services. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández 0001 |
Reliability simulation for analog ICs: Goals, solutions, and challenges. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Giulia Di Capua, Nicola Femia, Gianpaolo Lisi |
Impact of losses and mismatches on power and efficiency of Wireless Power Transfer Systems with controlled secondary-side rectifier. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | P. Balasubramanian 0001 |
Comments on "Dual-rail asynchronous logic multi-level implementation". |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed Rafay Hasan, Waqas Gul, Osman Hasan |
Clock domain crossing (CDC) in 3D-SICs: Semi QDI asynchronous vs loosely synchronous. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Victor R. Gonzalez-Diaz, Luis Abraham Sánchez-Gaspariano, Carlos Muñiz-Montero, Jose J. Alvarado-Pulido |
Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Salma Elabd, Waleed Khalil |
Impact of technology scaling on the tuning range and phase noise of mm-wave CMOS LC-VCOs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rabab Ezz-Eldin, Magdy A. El-Moursy, Hesham F. A. Hamed |
Corrigendum to "High throughput asynchronous NoC design under high process variation" [Integr. VLSI J. (2015) 1-13]. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Yin Li, Yi-yang Chen |
New bit-parallel Montgomery multiplier for trinomials using squaring operation. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Lior Moyal, Itamar Levi, Adam Teman, Alexander Fish |
Synthesis of Dual Mode Logic. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Pilin Junsangsri, Jie Han 0001, Fabrizio Lombardi |
Design of a hybrid non-volatile SRAM cell for concurrent SEU detection and correction. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jorge Alves Torres, João Costa Freire |
K Band SiGe HBT single ended active inductors. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Alireza Saberkari, Saman Ziabakhsh, Herminio Martínez, Eduard Alarcón |
Active inductor-based tunable impedance matching network for RF power amplifier application. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zeinab Torabi, Ghassem Jaberipur |
Fast low energy RNS comparators for 4-moduli sets {2n±1, 2n, m} with m∈{2n+1±1, 2n-1-1}. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiming Yang 0001, Yang Yu 0015, Chengcheng Zhang, Xiyuan Peng |
NBTI-aware adaptive minimum leakage vector selection using a linear programming approach. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Huang 0003, Valeriy Sukharev, Jun-Ho Choy, Marko Chew, Taeyoung Kim 0001, Sheldon X.-D. Tan |
Electromigration assessment for power grid networks considering temperature and thermal stress effects. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ricardo Povoa, Ivan Bastos, Nuno Lourenço 0003, Nuno Horta |
Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Li 0001, Sheldon X.-D. Tan, Yu Wang 0002 |
Editorial: Special Issue on The 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics 2015). |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sun-Mi Park, Ku-Young Chang, Dowon Hong, Changho Seo |
Explicit formulae for Mastrovito matrix and its corresponding Toeplitz matrix for all irreducible pentanomials using shifted polynomial basis. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hao Zhang 0078, Dongyi Ye, Wenzhong Guo |
A heuristic for constructing a rectilinear Steiner tree by reusing routing resources over obstacles. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hailong Jiao, Yongmin Qiu, Volkan Kursun |
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Yansong Gao, Omid Kavehei, Said F. Al-Sarawi, Damith Chinthana Ranasinghe, Derek Abbott |
Read operation performance of large selectorless cross-point array with self-rectifying memristive device. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhufei Chu, Yinshui Xia, Lun-Yao Wang |
Multi-supply voltage (MSV) driven SoC floorplanning for fast design convergence. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Zeinab Hojati, Mohammad Yavari |
An NTF-enhanced incremental ΣΔ modulator using a SAR quantizer. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bao Liu, Gang Qu 0001 |
VLSI supply chain security risks and mitigation techniques: A survey. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Giray Kömürcü, Ali Emre Pusane, Günhan Dündar |
Effects of aging and compensation mechanisms in ordering based RO-PUFs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Zhou 0022, Huawei Li 0001, Tiancheng Wang, Xiaowei Li 0001 |
LOFT: A low-overhead fault-tolerant routing scheme for 3D NoCs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Günhan Dündar, Nuno Horta, Francisco V. Fernández 0001 |
Introduction to the special issue on SMACD 2015. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ning Ma, Zhuo Zou, Zhonghai Lu, Li-Rong Zheng 0001 |
Design and implementation of multi-mode routers for large-scale inter-core networks. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Gildas Léger, Manuel J. Barragán |
Brownian distance correlation-directed search: A fast feature selection technique for alternate test. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sadiq M. Sait, Umair F. Siddiqi |
A stochastic evolution algorithm based 2D VLSI global router. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Elahe Rastegar Pashaki, Majid Shalchian |
Design and simulation of an ultra-low power high performance CMOS logic: DMTGDI. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Wasim Hussain, Olivier Valorge, Yves Blaquière, Yvon Savaria |
A novel spatially configurable differential interface for an electronic system prototyping platform. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Muharrem Orkun Saglamdemir, Gönenç Berkol, Günhan Dündar, Alper Sen 0001 |
An analog behavioral equivalence boundary search methodology for simulink models and circuit level designs utilizing evolutionary computation. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Pinaki Mazumder, D. Hu, Idongesit E. Ebong, Xu Zhang 0001, Z. Xu, Silvia Ferrari |
Digital implementation of a virtual insect trained by spike-timing dependent plasticity. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kourosh Hassanli, Sayed Masoud Sayedi, Rasoul Dehghani, Armin Jalili, J. Jacob Wikner |
A low-power wide tuning-range CMOS current-controlled oscillator. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Azadeh Safari, Cheeckottu Vayalil Niras, Yinan Kong |
Power-performance enhancement of two-dimensional RNS-based DWT image processor using static voltage scaling. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Lidong Xing, Tao Li, Hucai Huang, Qingsheng Zhang, Jungang Han |
Efficient modeling and analysis of energy consumption for 3D graphics rendering. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | David del Rio, Iñaki Gurutzeaga, Héctor Solar, Andoni Beriain, Roc Berenguer |
Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi |
An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2m). |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Fanshu Jiao, Alex Doboli |
Causal reasoning mining approach to analog circuit verification. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Uros Nahtigal, Drago Strle |
Design, simulation, and implementation of an integrated, hybrid photocurrent-to-digital converter in CMOS technology. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Po-Hao Wang, Shang-Jen Tsai, Rizal Tanjung, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen |
Cross-matching caches: Dynamic timing calibration and bit-level timing-failure mask caches to reduce timing discrepancies with low voltage processors. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Filipe Guimarães Russo Ramos, Tales Cleber Pimenta, Luis Henrique de Carvalho Ferreira |
A mixed-signal pulse width modulator for portable SMPS applications. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hojat Ghonoodi, Hossein Miar Naimi, Mohammad Gholami |
Analysis of frequency and amplitude in CMOS differential ring oscillators. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi |
Design of a memristor-based look-up table (LUT) for low-energy operation of FPGAs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Atefeh Salimi, Rasoul Dehghani, Abdolreza Nabavi |
A digital predistortion assisted hybrid supply modulator for envelope tracking power amplifiers. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram |
A comparative study on performance and reliability of 32-bit binary adders. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Cilardo, Edoardo Fusella |
Design automation for application-specific on-chip interconnects: A survey. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | H. C. Bandala-Hernandez, José Miguel Rocha-Pérez, Alejandro Díaz-Sánchez, Javier Lemus-López, Héctor Vázquez-Leal, Alejandra Díaz-Armendariz, Jaime Ramírez-Angulo |
Weighted median filters: An analog implementation. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad E. S. Elrabaa, Amran Al-Aghbari, Mohammed Alasli, Aiman El-Maleh, Abdelhafid Bouhraoua, Mohammad R. Alshayeb |
A low-cost platform for the prototyping and characterization of digital circuit IPs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiago Reimann, Cliff C. N. Sze, Ricardo Reis 0001 |
Challenges of cell selection algorithms in industrial high performance microprocessor designs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Arezoo Kamran, Zainalabedin Navabi |
Stochastic testing of processing cores in a many-core architecture. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Atiyeh Karimlou, Roya Jafarnejad, Jafar Sobhi |
An Inductor-less Sub-mW Low Noise Amplifier for Wireless Sensor Network Applications. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Khawar Sarfraz, Mansun Chan |
A compact low-power 4-port register file with grounded write bitlines and single-ended read operations. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | José-Cruz Nuñez Pérez, José Ricardo Cárdenas-Valdez, Katherine Montoya-Villegas, J. Apolinar Reynoso-Hernández, José Raúl Loo-Yau, Christian Gontrand, Esteban Tlelo-Cuautle |
FPGA-based test bed for measurement of AM/AM and AM/PM distortion and modeling memory effects in RF PAs. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Marzieh Ranjbar Pirbasti, Mahdi Fazeli, Ahmad Patooghy |
Phase Change Memory lifetime enhancement via online data swapping. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Geunho Cho, Fabrizio Lombardi |
Design and process variation analysis of CNTFET-based ternary memory cells. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Álvaro Gómez-Pau, Luz Balado, Joan Figueras |
Indirect test of M-S circuits using multiple specification band guarding. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Héctor Pettenghi, Ricardo Chaves, Roberto de Matos, Leonel Sousa |
Method for designing two levels RNS reverse converters for large dynamic ranges. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ricardo Martins 0003, Ricardo Povoa, Nuno Lourenço 0003, Nuno Horta |
Current-flow and current-density-aware multi-objective optimization of analog IC placement. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahshid Nasserian, Mohammad Kafi Kangi, Mohammad Maymandi-Nejad, Farshad Moradi |
A low-power fast tag comparator by modifying charging scheme of wide fan-in dynamic OR gates. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Wille, Eleonora Schönborn, Mathias Soeken, Rolf Drechsler |
SyReC: A hardware description language for the specification and synthesis of reversible circuits. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Mohamed Asan Basiri, Sk. Noor Mahammad |
Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Han Tsai 0001, Pei-Yun Tsai, Meng-Yuan Huang, Li-Yang Huang |
WHDVI: A wireless high definition video interface technique for digital home. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Shokouhifar, Ali Jalali |
Two-stage fuzzy inference system for symbolic simplification of analog circuits. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Yishai Statter, Tom Chen 0001 |
Γ (Gamma): A SaaS-enabled fast and accurate analog design System. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Qicheng Huang, Xiao Li 0002, Chenlei Fang, Fan Yang 0001, Yangfeng Su, Xuan Zeng 0001 |
An aggregating based model order reduction method for power grids. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi |
Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Alireza Saberkari, Shima Kazemi, Vahideh Shirmohammadli, Mustapha C. E. Yagoub |
gm-boosted flat gain UWB low noise amplifier with active inductor-based input matching network. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Aysa Fakheri Tabrizi, Laleh Behjat, William Swartz, Logan M. Rakai |
A fast force-directed simulated annealing for 3D IC partitioning. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Simone Orcioni, Marco Giammarini, Cristiano Scavongelli, Giovanni B. Vece, Massimo Conti |
Energy estimation in SystemC with Powersim. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ivan Bastos, Luís Bica Oliveira, João Goes, João Pedro Oliveira 0003, Manuel Medeiros Silva |
Noise canceling LNA with gain enhancement by using double feedback. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaokun Yang, Nansong Wu, Jean H. Andrian |
A novel bus transfer mode (AS transfer) and a performance evaluation methodology. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Basant Kumar Mohanty, Pramod Kumar Meher, Subodh Kumar Singhal, M. N. S. Swamy |
A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahdi Mosaffa, Siamak Mohammadi, Saeed Safari |
Statistical analysis of asynchronous pipelines in presence of process variation using formal models. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Aroutchelvame Mayilavelane, Brian Berscheid |
A Fast FIR filtering technique for multirate filters. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Jiang, Tian Xia |
ADPLL design parameters determinations through noise modeling. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hooman Farkhani, Ali Peiravi, Farshad Moradi |
A new write assist technique for SRAM design in 65 nm CMOS technology. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Elias Kougianos, Saraju P. Mohanty |
A nature-inspired firefly algorithm based approach for nanoscale leakage optimal RTL structure. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying Zhang 0016, Sui Chen, Lu Peng 0001, Shaoming Chen |
NBTI alleviation on FinFET-made GPUs by utilizing device heterogeneity. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | José Ricardo Cárdenas-Valdez, José-Cruz Nuñez Pérez, José Alejandro Galaviz-Aguilar, Andrés Calvillo-Téllez, Christian Gontrand, J. Apolinar Reynoso-Hernández, Esteban Tlelo-Cuautle |
Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSP-FPGA board. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Kan Xu, Eby G. Friedman |
Scaling trends of power noise in 3-D ICs. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Masoud Daneshtalab, Nader Bagherzadeh, Hamid Sarbazi-Azad |
On-chip parallel and network-based systems. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaohang Wang 0001, Baoxin Zhao, Terrence S. T. Mak, Mei Yang, Yingtao Jiang, Masoud Daneshtalab |
An efficient runtime power allocation scheme for many-core systems inspired from auction theory. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Songwei Pei, Huawei Li 0001, Song Jin, Jun Liu, Xiaowei Li 0001 |
An on-chip frequency programmable test clock generation and application method for small delay defect detection. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Guillaume Hubert, Laurent Artola, D. Regis |
Impact of scaling on the soft error sensitivity of bulk, FDSOI and FinFET technologies due to atmospheric radiation. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Mirzaei, Mahdi Mosaffa, Siamak Mohammadi |
Variation-aware approaches with power improvement in digital circuits. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Mario R. Casu, Paolo Mantovani |
A synchronous latency-insensitive RISC for better than worst-case design. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jin-Tai Yan |
Assignment of inter-die signals in a simplified wiring model for die-stacking SiP designs. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh |
On the design of hybrid routing mechanism for mesh-based network-on-chip. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Abderrahim Chariete, Mohamed Bakhouya, Jaafar Gaber, Maxime Wack |
A design space exploration methodology for customizing on-chip communication architectures: Towards fractal NoCs. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Inna Vaisband, Eby G. Friedman |
Energy efficient adaptive clustering of on-chip power delivery systems. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Prakash Harikumar, J. Jacob Wikner |
A 10-bit 50 MS/s SAR ADC in 65 nm CMOS with on-chip reference voltage buffer. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupama R. Subramaniam, Janet Roveda, Yu Cao 0001 |
Finite-point method for efficient timing characterization of sequential elements. |
Integr. |
2015 |
DBLP DOI BibTeX RDF |
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