Search results for "SBCCI"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Esther Rodríguez-Villegas, Alberto Yufera, Adoración Rueda	A Charge Correction Cell for FGMOS-Based Circuits.	SBCCI	2003	DBLP DOI BibTeX RDF	FGMOS analog circuits, Floating gate charge correction
1	Uilian Rafael Feijo Souza, Josué Klafke Sperb, Braulio Adriano de Mello, Flávio Rech Wagner	Tangram - Virtual Integration of Heterogeneous IP Components in a Distributed Co-Simulation Environment.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Alessandro Girardi, Fernando da Rocha Paixão Cortes, Eric E. Fabris, Sergio Bampi	Analog IC Modules Design Using Trapezoidal Association of MOS Transistors in 0.35µm Technology.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Julio Pérez, Matteo Sonza Reorda, Massimo Violante	Accurate Dependability Analysis of CAN-Based Networked Systems.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Marcelo Negreiros, Erik Schüler, Luigi Carro, Altamiro Amadeu Susin	Testing RF Signal Paths Using Spectral Analysis and Subsampling.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Faress Tissafi-Drissi, Ian O'Connor, Fabien Mieyeville, Frédéric Gaffiot	Design Methodologies for High-Speed CMOS Photoreceiver Front-Ends.	SBCCI	2003	DBLP DOI BibTeX RDF
1		Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003	SBCCI	2003	DBLP BibTeX RDF
1	Eduardo A. C. da Costa, Sergio Bampi, José Monteiro 0001	A New Pipelined Array Architecture for Signed Multiplication.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Howard H. Chen, J. Scott Neely, Michael F. Wang, Gricel Co	On-Chip Decoupling Capacitor Optimization for Noise and Leakage Reduction.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Geert Janssen	A Consumer Report on BDD Packages.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Markus Visarius, Johannes Lessmann, Wolfram Hardt, Frank Kelso, Wolfgang Thronicke	An XML Format Based Integration Infrastructure for IP Based Design.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Tang Lei, Shashi Kumar	Algorithms and Tools for Network on Chip Based System Design.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Daniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel	Improving Critical Path Identification in Functional Timing Analysis.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Santanu Dutta	Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Janet Meiling Wang, Pinhong Chen, Omar Hafiz	A New Continuous Switching Window Computation with Crosstalk Noise.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Diogo Zandonai, Sergio Bampi, Marcel Bergerman	ME64 - A Highly Scalable Hardware Parallel Architecture Motion Estimation in FPGA.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Pablo Aguirre, Fernando Silveira	Design of a Reusable Rail-to-Rail Operational Amplifier.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Julio Arlindo Pinto Azevedo, Tales Cleber Pimenta	Design of a Low Noise Amplifier for CDMA Transceivers at 900MHz in CMOS 0.35 µm.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Jürgen Becker 0001, Michael Hübner 0001, Michael Ullmann	Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations.	SBCCI	2003	DBLP DOI BibTeX RDF	Virtex FPGA, runtime reconfiguration, power consumption
1	Patrick Lysaght	Future Design Tools for Platform FPGAs.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Mário P. Véstias, Horácio C. Neto	DALI: A Methodology for the Co-Design of Dataflow Applications on Hardware/Software Architectures.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Fernando C. Castaldo, João Paulo Cerquinho Cajueiro, Carlos Alberto dos Reis	Bias Dependence of Noise Correlation in MAGFETs.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli	Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Romanelli Lodron Zuim, Claudionor José Nunes Coelho Jr., Luiz Fernando Etrusco Moreira, Antônio Otávio Fernandes, José Monteiro da Mata, Diógenes Cecilio da Silva Jr.	Dynamic Reconfiguration Behavior Using Generic FPGAs and FPIDs.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Maurizio Damiani, Andrei Y. Selchenko	Boolean Technology Mapping Based on Logic Decomposition.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Mohamed A. Elgamel, Magdy A. Bayoumi	Minimum-Area Shield Insertion for Explicit Inductive Noise Reduction.	SBCCI	2003	DBLP DOI BibTeX RDF	Shield insertion, Algorithms, Noise, Inductance, DSM
1	Ryuichi Takahashi, Hajime Ohiwa	Situated Learning on FPGA for Superscalar Microprocessor Design Education.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Grant Martin	SystemC: From Language to Applications, from Tools to Methodologies.	SBCCI	2003	DBLP DOI BibTeX RDF
1	George Logothetis, Klaus Schneider 0001, C. Metzler	Runtime Analysis of Synchronous Programs for Low-Level Real-Time Verification.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Jürgen Becker 0001, Alexander Thomas, Maik Scheer	Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Renato E. B. Poli, Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis	Unified Theory to Build Cell-Level Transistor Networks from BDDs.	SBCCI	2003	DBLP DOI BibTeX RDF
1	João Leonardo Fragoso, Gilles Sicard, Marc Renaudin	Automatic Generation of 1-of-M QDI Asynchronous Adders.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Nadia Nedjah, Luiza de Macedo Mourelle	FPGA-Based Hardware Architecture for Neural Networks: Binary Radix vs. Stochastic.	SBCCI	2003	DBLP DOI BibTeX RDF
1	José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes 0001, Ney Calazans	Core Communication Interface for FPGAs.	SBCCI	2002	DBLP BibTeX RDF
1	Paulo Sérgio B. do Nascimento, Manoel Eusébio de Lima, Paulo Maciel 0001	CDFG -Petri Net Temporal Partitioning for Switching Context Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Bogdan Nicolescu, Raoul Velazco, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante	A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks.	SBCCI	2002	DBLP BibTeX RDF
1	Luciano Volcan Agostini, Ivan Saraiva Silva, Sergio Bampi	Pipelined Entropy Coders for JPEG Compression.	SBCCI	2002	DBLP BibTeX RDF
1	Jochen A. G. Jess	Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits.	SBCCI	2002	DBLP BibTeX RDF
1	Felipe S. Marques 0001, Vinícius P. Correia, A. Prado, Marcelo Lubaszewski, André Inácio Reis	Testability Properties of BDDs.	SBCCI	2002	DBLP BibTeX RDF
1	Eduardo Costa 0001, Sergio Bampi, José Monteiro 0001	A New Architecture for 2's Complement Gray Encoded Array Multiplier.	SBCCI	2002	DBLP BibTeX RDF
1	Marcelo de Oliveira Johann, Glauco Borges Valim dos Santos, Ricardo Augusto da Luz Reis	A LEGAL Algorithm Following Global Routing.	SBCCI	2002	DBLP BibTeX RDF
1	Rafael C. Krapf, Júlio C. B. de Mattos, Gustavo Spellmeier, Luigi Carro	Signal Processing Applications for Embedded Java Systems.	SBCCI	2002	DBLP BibTeX RDF
1	Jacqueline S. Pereira, Fernando A. P. Barúqui, Antonio Petraglia	Analog Decimator IC in Direct-form Polyphase Structure.	SBCCI	2002	DBLP BibTeX RDF
1	Alexandre M. Amory, Fernando Moraes 0001, Leandro A. Oliveira, Ney Calazans, Fabiano Hessel	A Heterogeneous and Distributed Co-Simulation Environment.	SBCCI	2002	DBLP BibTeX RDF
1	César Augusto Missio Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes	Requirements, Primitives and Models for Systems Specification.	SBCCI	2002	DBLP BibTeX RDF
1	Fernando Silveira, Denis Flandre	Operational Amplifier Power Optimization for a Given Total (Slewing plus Linear) Settling Time.	SBCCI	2002	DBLP BibTeX RDF
1	Paulo Augusto Dal Fabbro, Carlos A. dos Reis Filho	An Integrated CMOS Instrumentation Amplifier with Improved CMRR.	SBCCI	2002	DBLP BibTeX RDF
1	Ricardo Doldán, Alberto Yúfera, Adoración Rueda	A Continuous-Time Incremental Analog to Digital Converter.	SBCCI	2002	DBLP BibTeX RDF
1	Niels Vanspauwen, Edna Barros, Sérgio Cavalcante, Carlos Valderrama	On the Importance, Problems and Solutions of Pointer Synthesis.	SBCCI	2002	DBLP BibTeX RDF
1	Rafael C. Krapf, Júlio C. B. de Mattos, Gustavo Spellmeier, Luigi Carro	A Study on a Garbage Collector for Embedded Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Henrique Costa de Moura Santos, Ana Isabela Araújo Cunha	CMOS OTA Sizing Using ACM Model in a Graphical Approach.	SBCCI	2002	DBLP BibTeX RDF
1	Cesar A. Zeferino, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin	A Study on Communication Issues for Systems-on-Chip.	SBCCI	2002	DBLP BibTeX RDF
1	Gerd Kreiselmaier, Timo Vogt, Norbert Wehn, Friedbert Berens	Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Júlio C. B. de Mattos, Márcio Eduardo Kreutz, Luigi Carro	Low-Power Control Architecture for Embedded Processors.	SBCCI	2002	DBLP BibTeX RDF
1	Miguel Miranda, C. Ghez, Erik Brockmeyer, Pieter Op de Beeck, Francky Catthoor	Data Transfer and Storage Exploration for Real-Time Implementation of a Digital Audio Broadcast Receiver on a Trimedia Processor.	SBCCI	2002	DBLP BibTeX RDF
1	José Antônio Gomes de Lima, Antonio Carlos Cavalcanti, Solon Ferreira de Lucena	APU: Specification and Design of a Multi Algorithm ATM Policing Unit IP.	SBCCI	2002	DBLP BibTeX RDF
1	Ricardo N. B. Lima, Marcio N. Miranda, José V. S. Filho	HW/SW Codesign of Handoff Protocol for Wireless ATM Networks Based on Performance Optimization Using Genetic Algorithm.	SBCCI	2002	DBLP BibTeX RDF
1	Valdinei Luís Belini, M. A. Romero	Design of Active Inductors Using CMOS Technology.	SBCCI	2002	DBLP BibTeX RDF
1	João Paulo Cerquinho Cajueiro, Carlos A. dos Reis Filho	CMOS Bandgap with Base-Current Thermal Compensation.	SBCCI	2002	DBLP BibTeX RDF
1	Luis Henrique de Carvalho Ferreira, Robson L. Moreno, Tales C. Pimenta, Carlos A. R. Filho	An Offset Self-Correction Sample and Hold Circuit for Precise Applications in Low Voltage CMOS.	SBCCI	2002	DBLP BibTeX RDF
1	Jürgen Becker 0001	Configurable Systems-on-Chip (CSoC).	SBCCI	2002	DBLP BibTeX RDF
1	Luís Cléber C. Marques, Wouter A. Serdijn, Carlos Galup-Montoro, Márcio C. Schneider	A Switched-MOSFET Programmable Low-Voltage Filter.	SBCCI	2002	DBLP BibTeX RDF
1	Ronald W. Mehler, Dian Zhou	Architectural Synthesis of Finite Impulse Response Digital Filters.	SBCCI	2002	DBLP BibTeX RDF
1	Peter Glösekötter, Christian Pacha, Karl F. Goser, Werner Prost, Samuel O. Kim, Holger van Husen, Thorsten Reimann, Franz-Josef Tegude	Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE).	SBCCI	2002	DBLP BibTeX RDF
1	Görschwin Fey, Rolf Drechsler	Minimizing the Number of Paths in BDDs.	SBCCI	2002	DBLP BibTeX RDF
1	Fathi A. Farag	Low-Voltage ADC for Sample to Serial Interface Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Manuel Lois Anido, Alexander Paar, Nader Bagherzadeh	A Novel Method for Improving the Operation Autonomy of SIMD Processing Elements.	SBCCI	2002	DBLP BibTeX RDF
1	Renato Fernandes Hentschke, Felipe S. Marques 0001, Fernanda Lima 0001, Luigi Carro, Altamiro Amadeu Susin, Ricardo Reis 0001	Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy.	SBCCI	2002	DBLP BibTeX RDF
1	David Deschans, Jean-Baptiste Bégueret, Yann Deval, Christophe Scarabello, Pascal Fouillat, Guy Montignac, Alain Baudry	A 4 Gsamples/S with 2-4 GHz Input Bandwidth SIGE Digitizer for Radio Astronomy Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Joarez B. Monteiro, Antonio Petraglia, Carlos Azeredo Leme	Capacitor Charge Control Technique Applied to Digitally Programmable IIR Switched-Capacitor Filter.	SBCCI	2002	DBLP BibTeX RDF
1	Marcos R. Boschetti, Alexandro M. S. Adário, Ivan Saraiva Silva, Sergio Bampi	Techniques and Mechanisms for Dynamic Reconfiguration in an Image Processor.	SBCCI	2002	DBLP BibTeX RDF
1	João Martins, Marius Strum	Power Management Exploration for a Block Turbo Decoder.	SBCCI	2002	DBLP BibTeX RDF
1	Gustavo Wilke, José Luís Güntzel, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis 0001	Finding the Critical Delay of Combinational Blocks by Floating Vector Simulation and Path Tracing.	SBCCI	2002	DBLP BibTeX RDF
1	André Borin Soares, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	Analysis and Implementation of a Stochastic Multiplier for Electrical Power Measurement.	SBCCI	2002	DBLP BibTeX RDF
1	Sandro Sawicki, Lisane B. de Brisolara, Leandro S. lndrusiak, Ricardo Reis 0001	Collaborative Design Using a Shared Object Spaces Infrastructure.	SBCCI	2002	DBLP BibTeX RDF
1	Michel Renovell	A Structural Test Methodology for SRAM-Based FPGAs.	SBCCI	2002	DBLP BibTeX RDF
1	Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero	Reducing Test Application Time through Interleaved Scan.	SBCCI	2002	DBLP BibTeX RDF
1		Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002	SBCCI	2002	DBLP BibTeX RDF
1	Carlos P. Coelho, Joel R. Phillips, L. Miguel Silveira	On Generating Compact, Passive Models of Frequency-Described Systems.	SBCCI	2002	DBLP BibTeX RDF
1	Vinícius Pazutti Correia, André Inácio Reis	Compression and Technology Mapping of Logic Circuits.	SBCCI	2002	DBLP BibTeX RDF
1	Fábio da S. Dutra, Federico Gálvez-Durand, Vladimir Castro Alves	System on a Chip for Petroleum Pipeline Inspection.	SBCCI	2002	DBLP BibTeX RDF
1	Anderson Cattelan Zigiotto, Roberto d'Amore	A Low-Cost FPGA Implementation of the Advanced Encryption Standard Algorithm.	SBCCI	2002	DBLP BibTeX RDF
1	Nadia Nedjah, Luiza de Macedo Mourelle	Two Hardware Implementations for the Montgomery Modular Multiplication: Sequential versus Parallel.	SBCCI	2002	DBLP BibTeX RDF
1	M. G. C. Flores, Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	A Noise Generator for Analog-to-Digital Converter Testing.	SBCCI	2002	DBLP BibTeX RDF
1	Alex Panato, Marcelo Barcelos, Ricardo Reis 0001	An IP of an Advanced Encryption Standard for Altera" Devices.	SBCCI	2002	DBLP BibTeX RDF
1	João Daniel Togni, Felipe Ribeiro Schneider, Vinícius P. Correia, Renato P. Ribas, André Inácio Reis	Automatic Generation of Digital Cell Libraries.	SBCCI	2002	DBLP BibTeX RDF
1	Manvi Agarwal, S. K. Nandy 0001, Jos T. J. van Eijndhoven, S. Balakrishanan	Multithreaded Architectural Support for Speculative Trace Scheduling in VLIW Processors.	SBCCI	2002	DBLP BibTeX RDF
1	João M. S. Alcântara, Antônio C. C. Vieira, Federico Gálvez-Durand, Vladimir Castro Alves	A Methodology for Dynamic Power Consumption Estimation Using VHDL Descriptions.	SBCCI	2002	DBLP BibTeX RDF
1	Raúl Acosta, Fernando Silveira, Pablo Aguirre	Experiences on Analog Circuit Technology Migration and Reuse.	SBCCI	2002	DBLP BibTeX RDF
1	Marcelo Negreiros, Luigi Carro, Altamiro Amadeu Susin	A Statistical Sampler for Increasing Analog Circuits Observability.	SBCCI	2002	DBLP BibTeX RDF
1	Ahmed Fakhfakh, Hervé Levi, N. Milet-Lewis, Yves Danto	Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications.	SBCCI	2002	DBLP BibTeX RDF
1	Cristiano C. de Araújo, Edna Barros	Interface Generation for Concurrent Processes During Hardware/Software Co-synthesis.	SBCCI	2002	DBLP BibTeX RDF
1	Alberto García Ortiz, Tudor Murgan, Leandro Soares Indrusiak, Manfred Glesner	Power Consumption in Point-to-Point Interconnect Architectures.	SBCCI	2002	DBLP BibTeX RDF
1	Jan M. Rabaey	Ultra Low-Energy Transceivers for Wireless Sensor Networks.	SBCCI	2002	DBLP BibTeX RDF
1	Wagner Luiz Alves de Oliveira, Norian Marranghello, Furio Damiani	Exception Handling with Petri Net for Digital Systems.	SBCCI	2002	DBLP BibTeX RDF
1	Fred Cruz Filho, Paulo Maciel 0001, Edna Barros	A Petri Net Based Approach for Hardware/Software Partitioning.	SBCCI	2001	DBLP BibTeX RDF
1	Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen	On Designing Mixed-Signal Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS Technologies.	SBCCI	2001	DBLP BibTeX RDF
1	Bruno Santos Pimentel, João Hilário de Ávila Valgas Filho, Rodrigo Lacerda Campos, Antônio Otávio Fernandes, Claudionor José Nunes Coelho Jr.	A FPGA Implementation of a DCT-Based Digital Electrocardiographic Signal Compression Device.	SBCCI	2001	DBLP BibTeX RDF
1	Luciano Volcan Agostini, Sergio Bampi, Ivan Saraiva Silva	Pipelined Fast 2-D DCT Architecture for JPEG Image Compression.	SBCCI	2001	DBLP BibTeX RDF
1	Ana Luiza de Almeida Pereira Zuquim, Claudionor José Nunes Coelho Jr., Antônio Otávio Fernandes, Marcos Pêgo de Oliveira, Andréa Iabrudi Tavares	An Embedded Converter from RS232 to Universal Serial Bus.	SBCCI	2001	DBLP BibTeX RDF

Publications at "SBCCI"( http://dblp.L3S.de/Venues/SBCCI )