Search results for "cycles"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
10	Changfu Wu, Jie Wu 0001	On Self-Similarity and Hamiltonicity of Dual-Cubes.	IPDPS	2003	DBLP DOI BibTeX RDF	dual-cubes, recurrent structure, Hamiltonian property, hypercubes, VLSI layout, wafer scale integration
10	Fredrik Warg, Per Stenström	Improving Speculative Thread-Level Parallelism Through Module Run-Length Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF	module-level parallelism, module run-length prediction, performance evaluation, Multiprocessors, thread-level speculation
10	Girish Varatkar, Radu Marculescu	Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization.	ICCAD	2003	DBLP DOI BibTeX RDF	dynamic voltage scaling, low-power scheduling
10	Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze	An Enhanced Multilevel Algorithm for Circuit Placement.	ICCAD	2003	DBLP DOI BibTeX RDF
10	Kiran Seth, Aravindh Anantaraman, Frank Mueller 0001, Eric Rotenberg	FAST: Frequency-Aware Static Timing Analysis.	RTSS	2003	DBLP DOI BibTeX RDF
10	Adrián Cristal, Daniel Ortega, Josep Llosa, Mateo Valero	Kilo-instruction Processors.	ISHPC	2003	DBLP DOI BibTeX RDF
10	Rebeca P. Díaz Redondo, José Juan Pazos-Arias, Ana Fernández Vilas	Reuse of Formal Verification Efforts of Incomplete Models at the Requirements Specification Stage.	Component-Based Software Quality	2003	DBLP DOI BibTeX RDF
10	Yanbin Liu, Aloysius K. Mok	An Integrated Approach for Applying Dynamic Voltage Scaling to Hard Real-Time Systems.	IEEE Real Time Technology and Applications Symposium	2003	DBLP DOI BibTeX RDF
10	Turan Demirci, Ilhan Hatirnaz, Yusuf Leblebici	Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
10	Soha Hassoun	Optimal use of 2-phase transparent latches in buffered maze routing.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
10	Ciaran McIvor, Máire McLoone, John V. McCanny	A high-speed, low latency RSA decryption silicon core.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
10	Sei Hyung Jang	A new synchronous mirror delay with an auto-skew-generation circuit.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
10	Mark A. Erle, Michael J. Schulte	Decimal Multiplication Via Carry-Save Addition.	ASAP	2003	DBLP DOI BibTeX RDF
10	Roberta Cambio, David C. Hendry	Low Power Digital Neuron for SOM Implementations.	ICANN	2003	DBLP DOI BibTeX RDF
10	André Seznec, Antony Fraboulet	Effective ahead Pipelining of Instruction Block Address Generation.	ISCA	2003	DBLP DOI BibTeX RDF
10	Mor Harchol-Balter, Cuihong Li, Takayuki Osogami, Alan Scheller-Wolf, Mark S. Squillante	Cycle stealing under immediate dispatch task assignment.	SPAA	2003	DBLP DOI BibTeX RDF	distributed system, supercomputing, task assignment, load sharing, matrix analytic methods, starvation, cycle stealing, unfairness, server farm
10	Susan Landau 0001, Neil Immerman	Embedding Linkages on an Integer Lattice.	Algorithmica	2002	DBLP DOI BibTeX RDF	NP-complete, Embedding, Lattice, Linkage
10	Peter Adams 0001, Elizabeth J. Billington, Darryn E. Bryant, Saad I. El-Zanati	On the Hamilton-Waterloo Problem.	Graphs Comb.	2002	DBLP DOI BibTeX RDF
10	Julia Khodor, David K. Gifford	Programmed Mutagenesis Is Universal.	Theory Comput. Syst.	2002	DBLP DOI BibTeX RDF
10	Steve Dropsho, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, Eby G. Friedman	Managing static leakage energy in microprocessor functional units.	MICRO	2002	DBLP DOI BibTeX RDF
10	Gregory A. Muthler, David Crowe, Sanjay J. Patel, Steven Lumetta	Instruction fetch deferral using static slack.	MICRO	2002	DBLP DOI BibTeX RDF
10	Paul C. Leyland, Arjen K. Lenstra, Bruce Dodson, Alec Muffett, Samuel S. Wagstaff Jr.	MPQS with Three Large Primes.	ANTS	2002	DBLP DOI BibTeX RDF
10	Jörg Flum, Martin Grohe	The Parameterized Complexity of Counting Problems.	FOCS	2002	DBLP DOI BibTeX RDF
10	Roland T. Mittermeir, Markus Clermont	Finding High-Level Structures in Spreadsheet Programs.	WCRE	2002	DBLP DOI BibTeX RDF
10	Massimo Baleani, Massimo Conti, Alberto Ferrari, Valerio Frascolla, Alberto L. Sangiovanni-Vincentelli	An Enhanced POLIS Framework for Fast Exploration and Implementation of I/O Subsystems on CSoC Platforms.	FPL	2002	DBLP DOI BibTeX RDF
10	Jan Vorácek, Nina Kontro-Vesivalo	International education in information technology.	ITiCSE	2002	DBLP DOI BibTeX RDF
10	Paul H. J. Kelly, Susanna Pelagatti, M. Rossiter	Instant-Access Cycle-Stealing for Parallel Applications Requiring Interactive Response.	Euro-Par	2002	DBLP DOI BibTeX RDF	parallel computing, performance prediction, cycle stealing
10	Jarkko Kari	Infinite Snake Tiling Problems.	Developments in Language Theory	2002	DBLP DOI BibTeX RDF
10	Robert W. Carey, Paul J. Van Arsdall, John P. Woodruff	The national ignition facility: early operational experience with a large Ada control system.	SIGAda	2002	DBLP DOI BibTeX RDF	Ada
10	Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers	MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64.	FCCM	2002	DBLP DOI BibTeX RDF
10	Harald Vogt	Efficient Object Identification with Passive RFID Tags.	Pervasive	2002	DBLP DOI BibTeX RDF
10	Yi Zhang, Steve Haga, Rajeev Barua	Execution history guided instruction prefetching.	ICS	2002	DBLP DOI BibTeX RDF	performance, prefetching, hardware, instruction cache
10	María C. Molina, José M. Mendías, Román Hermida	Bit-level scheduling of heterogeneous behavioural specifications.	ICCAD	2002	DBLP DOI BibTeX RDF
10	Horng-Ren Tsai	Parallel Algorithms for the Medial Axis Transform on Linear Arrays with a Reconfigurable Pipelined Bus System.	ICPADS	2002	DBLP DOI BibTeX RDF	linear array with a reconfigurable pipelined bus system, computer vision, parallel algorithms, image processing, image compression, Medial axis transform
10	Wen-Tzeng Huang, Woei-kae Chen, Chin-Hsing Chen	On the Fault-Tolerant Pancyclicity of Crossed Cubes.	ICPADS	2002	DBLP DOI BibTeX RDF
10	Emilio Di Giacomo, Giuseppe Liotta, Maurizio Patrignani	Orthogonal 3D Shapes of Theta Graphs.	GD	2002	DBLP DOI BibTeX RDF
10	Hai Jiang 0003, Vipin Chaudhary	MigThread: Thread Migration in DSM Systems.	ICPP Workshops	2002	DBLP DOI BibTeX RDF	adaptive parallel computing, compile-time code transformations, thread scheduling, thread migration, Software Distributed Shared Memory
10	G. Mulliken, Farhan Adil, Gert Cauwenberghs, Roman Genov	Delta-sigma algorithmic analog-to-digital conversion.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
10	Ilya Levin, Vladimir Sinelnikov, Mark G. Karpovsky, Sergey Ostanin	Sequential Circuits Applicable for Detecting Different Types of Faults.	IOLTW	2002	DBLP DOI BibTeX RDF
10	Gregory C. Sharp, Sang Wook Lee, David K. Wehe	Multiview Registration of 3D Scenes by Minimizing Error between Coordinate Frames.	ECCV (2)	2002	DBLP DOI BibTeX RDF
10	Yasuharu Nishi	Quality-Adaptive Testing: A Strategy for Testing with Focusing on Where Bugs Have Been Detected.	ECSQ	2002	DBLP DOI BibTeX RDF
10	Robert Thomson 0003, Tughrul Arslan	Evolvable Hardware for the Generation of Sequential Filter Circuits.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF
10	Samar Sharma, Rina Panigrahy	Sorting and Searching Using Ternary CAMs.	Hot Interconnects	2002	DBLP DOI BibTeX RDF
10	Ilhyun Kim, Mikko H. Lipasti	Implementing Optimizations at Decode Time.	ISCA	2002	DBLP DOI BibTeX RDF	speculative scheduling, speculative decode, silent store, reference combining, confidence prediction, runtime optimizations
10	Abdel Ejnioui, N. Ranganathan	A partitioning algorithm for technoiogy-mapped designs on single-chip emulation systems.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
10	Krishna M. Kavi, Roberto Giorgi, Joseph Arul	Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	superscalar, Thread Level Parallelism, Multithreaded architectures, decoupled architectures, dataflow architectures
10	Edwin A. Hakkennes, Stamatis Vassiliadis	Multimedia Execution Hardware Accelerator.	J. VLSI Signal Process.	2001	DBLP DOI BibTeX RDF	multimedia architectures, multimedia instruction set, multimedia processors, compound instructions, multimedia, hardware accelerators, subword parallelism, SIMD processors, vector architectures
10	Kumiko Nomura, Toshinori Yamada, Shuichi Ueno	On Adaptive Fault Diagnosis for Multiprocessor Systems.	ISAAC	2001	DBLP DOI BibTeX RDF
10	Giulia Galbiati	On Min-Max Cycle Bases.	ISAAC	2001	DBLP DOI BibTeX RDF
10	Dong Xiang, Yi Xu	A Multiple Phase Partial Scan Design Method.	Asian Test Symposium	2001	DBLP DOI BibTeX RDF
10	David W. Matula	Improved Table Lookup Algorithms for Postscaled Division.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
10	Julia Khodor, David K. Gifford	Programmed Mutagenesis Is a Universal Model of Computation.	DNA	2001	DBLP DOI BibTeX RDF
10	Malolan Chetlur, Philip A. Wilsey	Causality representation and cancellation mechanism in time warp simulations.	Workshop on Parallel and Distributed Simulation	2001	DBLP DOI BibTeX RDF	time warp, vector clocks, virtual time, logical time
10	Nicolas Peltier	A General Method for Using Schematizations in Automated Deduction.	IJCAR	2001	DBLP DOI BibTeX RDF
10	Can C. Özturan	Computational Issues in E-commerce Trading Exchanges.	IWCC	2001	DBLP DOI BibTeX RDF
10	Alexander Boukhanovsky, Valentin A. Rozhkov, Alexander B. Degtyarev	Peculiarities of Computer Simulation and Statistical Representation of Time-Spatial Metocean Fields.	International Conference on Computational Science (1)	2001	DBLP DOI BibTeX RDF
10	Keng Hoong Wee, Toshiyuki Nozawa, Takemi Yonezawa, Yuichiro Yamashita, Tadashi Shibata, Tadahiro Ohmi	High-precision analog EEPROM with real-time write monitoring.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
10	Sree Ganesan, Ranga Vemuri	Library Binding for High-Level Synthesis of Analog Systems.	VLSI Design	2001	DBLP DOI BibTeX RDF
10	Ting-Yi Sung, Jeng-Jung Wang	Changing the Diameter of Graph Products.	COCOON	2001	DBLP DOI BibTeX RDF
10	Johann Großschädl	A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m).	CHES	2001	DBLP DOI BibTeX RDF	iterative modulo multiplication, polynomial basis representation, bit-serial multiplier architecture, smart card crypto-coprocessor, Elliptic curve cryptography, finite field arithmetic
10	Claudio Delrieux, Gustavo Ramoscelli, Mirta Padin	Rendering Phase Portraits and Bifurcation Diagrams in Multidimensional Oscillating Systems.	SCCC	2001	DBLP DOI BibTeX RDF	Nonlinear and Chaotic Dynamical Systems, Bifurcations and Oscillations, Computer Graphics, Scientific Visualization
10	Chien-Ping Chang, Ting-Yi Sung, Lih-Hsing Hsu	Edge Congestion and Topological Properties of Crossed Cubes.	IEEE Trans. Parallel Distributed Syst.	2000	DBLP DOI BibTeX RDF	edge congestion, hypercubes, embedding, shortest path routing, wide diameter, fault diameter, Crossed cubes, bisection width
10	Sang Jeong Lee, Pen-Chung Yew	On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors.	IEEE PACT	2000	DBLP DOI BibTeX RDF
10	Kevin X. He, Michael D. Lemmon	Liveness Verification of Discrete Event Systems Modeled by n -Safe Ordinary Petri Nets.	ICATPN	2000	DBLP DOI BibTeX RDF
10	Markus Stumptner, Michael Schrefl	Behavior Consistent Inheritance in UML.	ER	2000	DBLP DOI BibTeX RDF
10	Volker Walter 0001, Dieter Fritsch	Automated revsion of GIS databases.	ACM-GIS	2000	DBLP DOI BibTeX RDF	ATKIS, classification, GIS, matching, remote sensing, update
10	Gerald G. Pechanek, Stamatis Vassiliadis	The ManArray( Embedded Processor Architecture.	EUROMICRO	2000	DBLP DOI BibTeX RDF
10	Makoto Yokoo, Katsutoshi Hirayama	The Effect of Nogood Learning in Distributed Constraint Satisfaction.	ICDCS	2000	DBLP DOI BibTeX RDF
10	Abdel Ejnioui, N. Ranganathan	Design Partitioning on Single-Chip Emulation Systems.	VLSI Design	2000	DBLP DOI BibTeX RDF	FPGA partitioning, integer programming, FPGA architecture, schedule optimization
10	Prabir Dasgupta, Santanu Chattopadhyay, Indranil Sengupta 0001	Cellular Automata Based Deterministic Test Sequence Generator for Sequential Circuits.	VLSI Design	2000	DBLP DOI BibTeX RDF
10	Iman Poernomo, John N. Crossley	Protocols between Programs and Proofs.	LOPSTR (LNCS 2042: Selected Papers)	2000	DBLP DOI BibTeX RDF
10	Stefan Biffl, Michael Halling, Monika Köhle	Investigating the Effect of a Second Software Inspection Cycle: Cost-Benefit Data from a Large-Scale Experiment on Reinspection of a Software Requirements Document.	APAQS	2000	DBLP DOI BibTeX RDF
10	Jeannette C. M. Janssen, Lata Narayanan	Approximation Algorithms for Channel Assignment with Constraints.	ISAAC	1999	DBLP DOI BibTeX RDF
10	Orna Kupferman, Moshe Y. Vardi	Model Checking of Safety Properties.	CAV	1999	DBLP DOI BibTeX RDF
10	David Hartvigsen	The Square-Free 2-Factor Problem in Bipartite Graphs.	IPCO	1999	DBLP DOI BibTeX RDF
10	András A. Benczúr, Jörg Förster, Zoltán Király	Dilworth's Theorem and Its Application for Path Systems of a Cycle - Implementation and Analysis.	ESA	1999	DBLP DOI BibTeX RDF
10	Lakshminarayanan Subramanian, Karthikeyan Mahesh	Efficient End-Host Resource Management with Kernel Optimizations for Multimedia Applications.	ECMAST	1999	DBLP DOI BibTeX RDF
10	Han-joon Kim, Sang-goo Lee	A New Flash Memory Management for Flash Storage System.	COMPSAC	1999	DBLP DOI BibTeX RDF	flash storage system, cleaning algorithm, cycle-leveling, flash memory
10	Jung-Heum Park, Hee-Chul Kim	Dihamiltonian Decomposition of Regular Graphs with Degree Three.	WG	1999	DBLP DOI BibTeX RDF
10	Johanne Cohen, Pierre Fraigniaud, Cyril Gavoille	Recognizing Bipartite Incident-Graphs of Circulant Digraphs.	WG	1999	DBLP DOI BibTeX RDF	broadcasting, gossiping, graph isomorphism, circulant graphs, chordal rings
10	Nien-Tsu Wang, Nam Ling	A Novel Dual-Path Architecture for HDTV Video Decoding.	Data Compression Conference	1999	DBLP DOI BibTeX RDF
10	Christoph Dornheim	Graph Embedding with Topological Cycle-Constraints.	GD	1999	DBLP DOI BibTeX RDF
10	Priyadarshan Kolte, Roger Smith, Su Wen	A Fast Median Filter Using AltiVec.	ICCD	1999	DBLP DOI BibTeX RDF
10	Ali Manzak, Chaitali Chakrabarti	A low power scheduling scheme with resources operating at multiple voltages.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
10	Wen-Tsong Shiue, Chaitali Chakrabarti	Memory exploration for low power embedded systems.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
10	Chin-Liang Wang, Ching-Hsien Chang	A novel DHT-based FFT/IFFT processor for ADSL transceivers.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
10	Timothy Griffin, F. Bruce Shepherd, Gordon T. Wilfong	Policy Disputes in Path-Vector Protocols.	ICNP	1999	DBLP DOI BibTeX RDF
10	Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen	Superscalar Processor Validation at the Microarchitecture Level.	VLSI Design	1999	DBLP DOI BibTeX RDF
10	Chih-Chang Lin, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee, Kuang-Chien Chen	Cost-free scan: a low-overhead scan path design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
10	Chau-Shen Chen, TingTing Hwang	Layout Driven Selection and Chaining of Partial Scan Flip-Flops.	J. Electron. Test.	1998	DBLP DOI BibTeX RDF	design for testability, matching, placement, global routing, partial scan, digital testing, layout optimization
10	James M. Calvin, Marvin K. Nakayama	Using Permutations in Regenerative Simulations to Reduce Variance.	ACM Trans. Model. Comput. Simul.	1998	DBLP DOI BibTeX RDF	regenerative simulation, permutations, variance reduction, efficiency improvement
10	Martin C. Cooper	The Tractability of Segmentation and Scene Analysis.	Int. J. Comput. Vis.	1998	DBLP DOI BibTeX RDF	computational complexity, segmentation, NP-completeness, scene analysis
10	Sorin Cotofana, Stamatis Vassiliadis	Periodic symmetric functions, serial addition, and multiplication with neural networks.	IEEE Trans. Neural Networks	1998	DBLP DOI BibTeX RDF
10	Helena Rodrigues, Richard E. Jones	Cyclic Distributed Garbage Collection with Group Merger.	ECOOP	1998	DBLP DOI BibTeX RDF	distributed systems, garbage collection, termination detection
10	Klaus Biedermann	Powerset Trilattices.	ICCS	1998	DBLP DOI BibTeX RDF
10	Peter-Michael Seidel	How to Half the Latency of IEEE Compliant Floating-Point Multiplication.	EUROMICRO	1998	DBLP DOI BibTeX RDF
10	Gilles Trombettoni	A Polynomial Time Local Propagation Algorithm for General Dataflow Constraint Problems.	CP	1998	DBLP DOI BibTeX RDF
10	Jim E. Crenshaw, Majid Sarrafzadeh	Low Power Driven Scheduling and Binding.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	high level synthesis, low power design, design automation, VLSI CAD
10	W. Lynn Gallagher, Earl E. Swartzlander Jr.	Error-Correcting Goldschmidt Dividers Using Time Shared TMR.	DFT	1998	DBLP DOI BibTeX RDF	Goldschmidt's algorithm, time shared TMR, TSTMR fault tolerance, fault tolerant arithmetic, division
10	Charles L. Byrne	Convergent block-iterative algorithms for image reconstruction from inconsistent data.	IEEE Trans. Image Process.	1997	DBLP DOI BibTeX RDF