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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 9881 publication records. Showing 9881 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Emanuele Del Sozzo, Davide Conficconi, Marco D. Santambrogio, Kentaro Sano |
Senju: A Framework for the Design of Highly Parallel FPGA-based Iterative Stencil Loop Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 233, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jonathan W. Greene |
FPGA Mux Usage and Routability Estimates without Explicit Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 141-147, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Nick Brown 0002 |
Exploring the Versal AI Engines for Accelerating Stencil-based Atmospheric Advection Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 91-97, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jinfeng Li, Yahong Rosa Zheng |
FPGA Acceleration for Successive Interference Cancellation in Severe Multipath Acoustic Communication Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 233, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Ayatallah Elakhras, Riya Sawhney, Andrea Guerrieri, Lana Josipovic, Paolo Ienne |
Straight to the Queue: Fast Load-Store Queue Allocation in Dataflow Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 39-45, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Mingqiang Huang, Yucen Liu, Sixiao Huang, Kai Li, Qiuping Wu, Hao Yu 0001 |
Multi-bit-width CNN Accelerator with Systolic-in-Systolic Dataflow and Single DSP Multiple Multiplication Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 229, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Longfei Fan, Chang Wu |
FPGA Technology Mapping with Adaptive Gate Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 135-140, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Chaoqiang Liu, Haifeng Liu 0003, Long Zheng 0003, Yu Huang 0013, Xiangyu Ye, Xiaofei Liao, Hai Jin 0001 |
FNNG: A High-Performance FPGA-based Accelerator for K-Nearest Neighbor Graph Construction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 67-77, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Lei Cai, Jing Wang, Lianfeng Yu, Bonan Yan, Yaoyu Tao, Yuchao Yang |
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 177-183, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers |
Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 47, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Dana How, Tim Ansell, Vaughn Betz, Chris Lavin, Ted Speers, Pierre-Emmanuel Gaillardon |
Open-source and FPGAs: Hardware, Software, Both or None? ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 149, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Enhao Tang, Shun Li, Yanxiang Zhu, Jun Yu 0010, Kun Wang 0005 |
Graph-OPU: An FPGA-Based Overlay Processor for Graph Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 49, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zhenyu Xu, Miaoxiang Yu, Qing Yang 0001, Yeonho Jeong, Tao Wei |
A Novel FPGA Simulator Accelerating Reinforcement Learning-Based Design of Power Converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 51, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jaideep Dastidar |
FPGAs and Their Evolving Role in Domain Specific Architectures: A Case Study of the AMD 400G Adaptive SmartNIC/DPU SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 151, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou 0001 |
CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 153-164, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Alireza Khataei, Gaurav Singh, Kia Bazargan |
Approximate Hybrid Binary-Unary Computing with Applications in BERT Language Model and Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 165-175, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Bharat Sukhwani, Mohit Kapur, Alda Ohmacht, Liran Schour, Martin Ohmacht, Chris Ward, Chuck Haymes, Sameh W. Asaad |
Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 230, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Sergey Gribok, Bogdan Pasca 0001, Martin Langhammer |
CSAIL2019 Crypto-Puzzle Solver Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 197-207, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy Kurian John, Andreas Gerstlauer |
LAWS: Large-Scale Accelerated Wave Simulations on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 230, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Saya Inagaki, Mingyu Yang, Yang Li 0001, Kazuo Sakiyama, Yuko Hara-Azumi |
Power Side-channel Countermeasures for ARX Ciphers using High-level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 52, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Sergiu Mosanu, Joshua Fixelle, Kevin Skadron, Mircea Stan |
FreezeTime: Towards System Emulation through Architectural Virtualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 234, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Vishak Narayanan, Rohit Sahu, Jidong Sun, Henry Duwe |
BOBBER A Prototyping Platform for Batteryless Intermittent Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 221-228, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Mingjie Lin |
OMT: A Demand-Adaptive, Hardware-Targeted Bonsai Merkle Tree Framework for Embedded Heterogeneous Memory Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 47, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Mehdi Moghaddamfar, Norman May, Christian Färber, Wolfgang Lehner, Akash Kumar 0001 |
A Study of Early Aggregation in Database Query Processing on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 55-65, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Colin Drewes, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond |
Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 111-122, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Linfeng Du, Tingyuan Liang, Sharad Sinha, Zhiyao Xie, Wei Zhang 0012 |
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 15-25, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Andrew David Gunter, Steven J. E. Wilton |
Towards a Machine Learning Approach to Predicting the Difficulty of FPGA Routing Problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 231, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Stefan Nikolic 0001, Paolo Ienne |
Regularity Matters: Designing Practical FPGA Switch-Blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 99-109, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna |
A Framework for Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform via on-chip Dynamic Tree Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 235-245, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zachary Susskind, Aman Arora, Alan T. L. Bacellar, Diego Leonel Cadette Dutra, Igor D. S. Miranda, Maurício Breternitz, Priscila M. V. Lima, Felipe M. G. França, Lizy K. John |
An FPGA-Based Weightless Neural Network for Edge Network Intrusion Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 232, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna |
Accelerating Sparse MTTKRP for Tensor Decomposition on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 259-269, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Chuliang Guo, Binglei Lou, Xueyuan Liu, David Boland, Philip H. W. Leong |
Single-Batch CNN Training using Block Minifloats on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 53, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Hyeong-Ju Kang |
AoCStream: All-on-Chip CNN Accelerator With Stream-Based Line-Buffer Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 48, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Xuan Wang, Lei Gong, Jing Cao, Wenqi Lou, Weiya Wang, Chao Wang 0003, Xuehai Zhou |
hAP: A Spatial-von Neumann Heterogeneous Automata Processor with Optimized Resource and IO Overhead on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 185-196, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Meghna Mandava, Deming Chen |
Nimblock: Scheduling for Fine-grained FPGA Sharing through Virtualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 49, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Lin Shu, Long Xiao, Yafang Song, Qiuxiang Fan, Guitian Fang, Jie Hao |
A Fractal Astronomical Correlator Based on FPGA Cluster with Scalability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 52, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Yongzheng Chen, Gang Wu 0007 |
A Flexible Toolflow for Mapping CNN Models to High Performance FPGA-based Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 232, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner |
Adapting Skip Connections for Resource-Efficient FPGA Inference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 229, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Ross Martin |
An Efficient High-Speed FFT Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 50, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Andrew Elbert Wilson, Nathan Baker, Ethan Campbell, Jackson Sahleen, Michael J. Wirthlin |
Post-Radiation Fault Analysis of a High Reliability FPGA Linux SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 123-133, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Tuo Dai, Bizhao Shi, Guojie Luo |
Weave: Abstraction for Accelerator Integration of Generated Modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 51, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong |
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023, pp. 247-258, 2023, ACM, 978-1-4503-9417-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Mohammadmahdi Mazraeli, Yu Gao, Paul Chow |
Partitioning Large-Scale, Multi-FPGA Applications for the Data Center. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 253-258, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Lukas Stasytis, Zsolt István |
Optimization Techniques for Hestenes-Jacobi SVD on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 144-150, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Haishuang Fan, Jingya Wu, Wenyan Lu, Xiaowei Li 0001, Guihai Yan |
Co-ViSu: a Video Super-Resolution Accelerator Exploiting Codec Information Reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 93-100, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Shashwat Khandelwal, Shanker Shreejith |
Exploring Highly Quantised Neural Networks for Intrusion Detection in Automotive CAN. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 235-241, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Pengyu Liu, Zihan Zhang, Chen Yin, Liyan Chen, Jianfei Jiang 0001, Qin Wang 0009, Zhigang Mao, Naifeng Jing |
Pipeline Balancing for Integrated Mapping in High Performance Spatial Programmable Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 116-122, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | José Oliver 0002, Carlos Álvarez 0001, Teresa Cervero, Xavier Martorell, John D. Davis, Eduard Ayguadé |
Accelerating SpMV on FPGAs Through Block-Row Compress: A Task-Based Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 151-158, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ce Guo, Diego Cupello, Wayne Luk, Joshua M. Levine, Alexander Warren, Peter Brookes |
FPGA-Accelerated Causal Discovery with Conditional Independence Test Prioritization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 182-188, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Felix Jentzsch |
Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 359-360, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Xuqi Zhu, Cong Gao, Sangeet Saha, Xiaojun Zhai, Klaus D. McDonald-Maier |
Bayesian Optimization for Efficient Heterogeneous MPSoC Based DNN Accelerator Runtime Tuning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 355-356, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ruichen Chen, Shengyao Lu, Mohamed A. Elgammal, Peter Chun, Vaughn Betz, Di Niu |
VPR-Gym: A Platform for Exploring AI Techniques in FPGA Placement Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 72-78, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Baoze Zhao, Wenjin Huang, Yihua Huang 0005 |
A Novel Hardware Accelerator of NeRF Based on Xilinx UltraScale and UltraScale+ FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 197-203, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ehsan Kabir, Daniel Coble, Joud N. Satme, Austin R. J. Downey, Jason D. Bakos, David Andrews 0001, Miaoqing Huang |
Accelerating LSTM-Based High-Rate Dynamic System Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 327-332, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Yuntao Han, Qiang Liu |
HPTA: A High Performance Transformer Accelerator Based on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 27-33, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Myrtle Shah, Jakob Ternes, Dirk Koch |
FABulous Demo: Open Source FPGA on Sky130. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 365, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Huimin Li 0004, Phillip Rieger, Shaza Zeitouni, Stjepan Picek, Ahmad-Reza Sadeghi |
FLAIRS: FPGA-Accelerated Inference-Resistant & Secure Federated Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 271-276, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Louis Ledoux, Marc Casas |
An Open-Source Framework for Efficient Numerically-Tailored Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 19-26, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Michael Offel, Andreas Ley, Sven Hager |
HashCache: High-Performance State Tracking for Resilient FPGA-Based Packet Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 364, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Changjun Song, Yongming Tang, Jiyuan Liu 0006, Sige Bian, Danni Deng, He Li 0008 |
MSDF-SGD: Most-Significant Digit-First Stochastic Gradient Descent for Arbitrary-Precision Training. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 159-165, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Stefan Abi-Karam, Cong Hao |
GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 212-218, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zhenya Zang, Uwe Dolinsky, Pietro Ghiglio, Stefano Cherubin, Mehdi Goli 0001, Shufan Yang |
Building a Reusable and Extensible Automatic Compiler Infrastructure for Reconfigurable Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 351-352, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Luyang Yu, Yizhen Lu, Meghna Mandava, Edward Richter, Vikram Sharma Mailthody, Seungwon Min, Wen-Mei W. Hwu, Deming Chen |
FSSD: FPGA-Based Emulator for SSDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 101-108, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Joshua Lant, Emmanouil Skordalakis, Kyriakos Paraskevas, William B. Toms, Mikel Luján, John Goodacre |
DiAD - Distributed Acceleration for Datacenter FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 166-173, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Yueyin Bai, Hao Zhou 0008, Keqing Zhao, Manting Zhang, Jianli Chen, Jun Yu 0010, Kun Wang 0005 |
LTrans-OPU: A Low-Latency FPGA-Based Overlay Processor for Transformer Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 283-287, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Vaibhav Kashera, Siddhant Jain, Abhishek Banerjee, Suresh Purini |
Building Low-Latency Order Books with Hybrid Binary-Linear Search Data Structures on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 299-304, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Xiaorang Guo, Martin Schulz 0001 |
A Scalable and Cross-Technology Quantum Control Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 353-354, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Guanglei Zhou, Mirjana Stojilovic, Jason Helge Anderson |
GRAMM: Fast CGRA Application Mapping Based on A Heuristic for Finding Graph Minors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 305-310, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Paul Chen, Pavan Manjunath, Sasindu Wijeratne, Bingyi Zhang, Viktor K. Prasanna |
Exploiting On-Chip Heterogeneity of Versal Architecture for GNN Inference Acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 219-227, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | M. D. Arafat Kabir, Ehsan Kabir, Joshua Hollis, Eli Levy-Mackay, Atiyehsadat Panahi, Jason D. Bakos, Miaoqing Huang, David Andrews 0001 |
FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 109-115, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Kimia Talaei Khoozani, Arash Ahmadian Dehkordi, Vaughn Betz |
Titan 2.0: Enabling Open-Source CAD Evaluation with a Modern Architecture Capture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 57-64, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Tobias Hahn, Stefan Wildermann, Jürgen Teich |
SPEAR-JSON: Selective Parsing of JSON to Enable Accelerated Stream Processing on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 189-196, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Ziyi Yang, Suhaib A. Fahmy |
Exploring FPGA Acceleration for Distributed Serverless Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 345-346, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Yang Liu, Xiaoming He, Jun Yu, Kun Wang |
DIF-LUT: A Simple Yet Scalable Approximation for Non-Linear Activation Function on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 322-326, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zizhang Luo, Liqiang Lu, Yicheng Jin, Liancheng Jia, Yun Liang 0001 |
Calabash: Accelerating Attention Using a Systolic Array Chain on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 242-247, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Nicolai Müller, Sergej Meschkov, Dennis R. E. Gnad, Mehdi B. Tahoori, Amir Moradi 0001 |
Automated Masking of FPGA-Mapped Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 79-85, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Hanning Chen, Ali Zakeri, Fei Wen, Hamza Errahmouni Barkam, Mohsen Imani |
HyperGRAF: Hyperdimensional Graph-Based Reasoning Acceleration on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 34-41, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Gabriel Rodriguez-Canal, Nick Brown 0002, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus |
Fortran High-Level Synthesis: Reducing the Barriers to Accelerating HPC Codes on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 10-18, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede |
Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 1-9, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Yang Yang 0111, Weihang Long, Rajgopal Kannan, Viktor K. Prasanna |
FPGA Acceleration of Rotation in Homomorphic Encryption Using Dynamic Data Layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 174-181, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zhiqiang Que, Shuo Liu, Markus Rognlien, Ce Guo, José Gabriel F. Coutinho, Wayne Luk |
MetaML: Automating Customizable Cross-Stage Design-Flow for Deep Learning Acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 248-252, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Ruiqi Chen, Haoyang Zhang, Shun Li, Enhao Tang, Jun Yu 0010, Kun Wang 0005 |
Graph-OPU: A Highly Integrated FPGA-Based Overlay Processor for Graph Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 228-234, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Andrew Boutros, Stephen More, Vaughn Betz |
A Whole New World: How to Architect Beyond-FPGA Reconfigurable Acceleration Devices? ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 265-270, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Yunyi Zhao, Yunjia Xia, Rui C. V. Loureiro, Hubin Zhao, Uwe Dolinsky, Shufan Yang |
FPL Demo: A Learning-Based Motion Artefact Detector for Heterogeneous Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 366, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Zhewen Yu, Christos-Savvas Bouganis |
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 204-211, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Rémi Garcia 0002, Anastasia Volkova |
Multiple Constant Multiplication: From Target Constants to Optimized Pipelined Adder Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 137-143, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Shi-Yu Huang, Yun-Chen Yang, Yu-Ru Su, Bo-Cheng Lai, Javier M. Duarte, Scott Hauck, Shih-Chieh Hsu, Jin-Xuan Hu, Mark S. Neubauer |
Low Latency Edge Classification GNN for Particle Trajectory Tracking on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 294-298, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Rubén Macias, Sergio Bernabé, Carlos González |
Accelerating the ATDCA Algorithm for Endmember Extraction from Hyperspectral Imagery with Intel oneAPI for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 349-350, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Philipp Kreowsky, Justin Knapheide, Benno Stabernack |
Challenges Using FPGA Clusters for Distributed CNN Training. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 347-348, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Petros Toupas, Christos-Savvas Bouganis, Dimitrios Tzovaras |
fpgaHART: A Toolflow for Throughput-Oriented Acceleration of 3D CNNs for HAR onto FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 86-92, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Martin Langhammer, George A. Constantinides |
eGPU: A 750 MHz Class Soft GPGPU for FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 277-282, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Jonas Krautter, Paul R. Genssler, Gloria Sepanta, Hussam Amrouch, Mehdi B. Tahoori |
Stress-Resiliency of AI Implementations on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 333-338, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Shiqing Li, Shien Zhu, Xiangzhong Luo, Tao Luo, Weichen Liu |
An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 42-48, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Hans Jakob Damsgaard, Aleksandr Ometov, Jari Nurmi |
Towards Coarse-Grained Reconfigurable Approximate Computing with CGRAgen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 361-362, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Tan Nguyen, Zachary Blair, Stephen Neuendorffer, John Wawrzynek |
SPADES: A Productive Design Flow for Versal Programmable Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 65-71, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Amin Mohaghegh, Vaughn Betz |
Tear Down The Wall: Unified and Efficient Intra-and Inter-Cluster Routing for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 130-136, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Tiandong Zhao, Siyuan Miao, Shaoqiang Lu, Jialin Cao, Jun Qiu, Xiao Shi, Kun Wang 0005, Lei He 0001 |
Token Packing for Transformers with Variable-Length Inputs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 49-56, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Shaden M. Alismail, Dirk Koch |
Efficient Resource Scheduling for Runtime Reconfigurable Systems on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 123-129, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Justin Knapheide, Philipp Kreowsky, Benno Stabernack |
Demonstrating NADA: A Workflow for Distributed CNN Training on FPGA Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 363, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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14 | Christoph Niemann 0002, Michael Rethfeldt, Dirk Timmermann |
A Novel Strategy for Flexible Placement and Routing of AVS Sensors on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 33rd International Conference on Field-Programmable Logic and Applications, FPL 2023, Gothenburg, Sweden, September 4-8, 2023, pp. 339-344, 2023, IEEE, 979-8-3503-4151-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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