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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2239 occurrences of 940 keywords
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Results
Found 7472 publication records. Showing 7472 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
15 | Eric Wong 0002, Jacob R. Minz, Sung Kyu Lim |
Decoupling-Capacitor Planning and Sizing for Noise and Leakage Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11), pp. 2023-2034, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Paulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas |
Subthreshold Leakage Modeling and Estimation of General CMOS Complex Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 474-484, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff |
Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 1460-1465, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Sastry Konduri, Brajendra Panda, Wing-Ning Li |
Monitoring Information Leakage During Query Aggregation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCIT ![In: Distributed Computing and Internet Technology, 4th International Conference, ICDCIT 2007, Bangalore, India, December 17-20, Proceedings, pp. 89-96, 2007, Springer, 978-3-540-77112-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Kerstin Lemke-Rust, Christof Paar |
Analyzing Side Channel Leakage of Masked Implementations with Stochastic Methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 2007, 12th European Symposium On Research In Computer Security, Dresden, Germany, September 24-26, 2007, Proceedings, pp. 454-468, 2007, Springer, 978-3-540-74834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Boolean Masking, Multivariate Side Channel Analysis, Higher-Order Side Channel Analysis, Stochastic Methods, Side Channel Cryptanalysis |
15 | Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang |
A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 665-672, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | De-Shiuan Chiou, Da-Cheng Juan, Yu-Ting Chen, Shih-Chieh Chang |
Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 81-86, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Pietro Babighian, Luca Benini, Alberto Macii, Enrico Macii |
Enabling fine-grain leakage management by voltage anchor insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 868-873, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy 0001 |
Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 856-861, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Benjamin Aziz |
Measuring the Speed of Information Leakage in Mobile Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AMAST ![In: Algebraic Methodology and Software Technology, 11th International Conference, AMAST 2006, Kuressaare, Estonia, July 5-8, 2006, Proceedings, pp. 36-50, 2006, Springer, 3-540-35633-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Somchai Chatvichienchai, Mizuho Iwaihara |
Detecting Information Leakage in Updating XML Documents of Fine-Grained Access Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA ![In: Database and Expert Systems Applications, 17th International Conference, DEXA 2006, Kraków, Poland, September 4-8, 2006, Proceedings, pp. 286-296, 2006, Springer, 3-540-37871-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Ralf Salomon, Frank Sill |
Biologically-Inspired Optimization of Circuit Performance and Leakage: A Comparative Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings, pp. 352-366, 2006, Springer, 3-540-32765-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Ja Chun Ku, Yehea I. Ismail |
Area optimization for leakage reduction and thermal stability in nanometer scale technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 231-236, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Ismail Kadayif, Mahmut T. Kandemir, Feihui Li |
Prefetching-aware cache line turnoff for saving leakage energy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 182-187, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Elias Kougianos, Saraju P. Mohanty |
Effective tunneling capacitance: a new metric to quantify transient gate leakage current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Harmander Deogun, Dennis Sylvester, Kevin J. Nowka |
Fine grained multi-threshold CMOS for enhanced leakage reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Qing Wu, Subhasis Nandi |
A Novel Approach to Calculate Squirrel Cage Induction Motor Rotor Leakage Inductance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1232-1235, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Koushik K. Das, Shih-Hsien Lo, Ching-Te Chuang |
High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 758-761, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Zhimin Chen, Yujie Zhou |
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 242-254, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Gate Level Masking, DRSL, Dual-Rail, Pre-charge, Side Channel Attacks, DPA |
15 | Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy 0001 |
Computing with subthreshold leakage: device/circuit/architecture co-design for ultralow-power subthreshold operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(11), pp. 1213-1224, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Shadi T. Khasawneh, Kanad Ghose |
An Adaptive Technique for Reducing Leakage and Dynamic Power in Register Files and Reorder Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 498-507, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Charan Thondapu, Praveen Elakkumanan, Ramalingam Sridhar |
RG-SRAM: A Low Gate Leakage Memory Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 295-296, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Dong Wu, Bashir M. Al-Hashimi, Marcus T. Schmitz, Petru Eles |
Power-Composition Profile Driven Co-Synthesis with Power Management Selection for Dynamic and Leakage Energy Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 34-41, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Rachid Echahed, Frédéric Prost |
Handling declared information leakage: extended abstract. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WITS ![In: Proceedings of the POPL 2005 Workshop on Issues in the Theory of Security, WITS 2005, Long Beach, California, USA, January 10-11, 2005, pp. 1-4, 2005, ACM, 1-58113-980-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Xin Lu, Yuzhuo Fu |
Reducing leakage power in instruction cache using WDC for embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1292-1295, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Panagiotis Katsaros |
On the Design of Access Control to Prevent Sensitive Information Leakage in Distributed Object Systems: A Colored Petri Net Based Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OTM Conferences (2) ![In: On the Move to Meaningful Internet Systems 2005: CoopIS, DOA, and ODBASE, OTM Confederated International Conferences, CoopIS, DOA, and ODBASE 2005, Agia Napa, Cyprus, October 31 - November 4, 2005, Proceedings, Part II, pp. 941-959, 2005, Springer, 3-540-29738-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Soheil Ghiasi |
Efficient Implementation Selection via Time Budgeting Complexity Analysis and Leakage Optimization Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 127-129, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Teng-Hung Chang, Lan-Rong Dung, Jwin-Yen Guo |
On reducing leakage quantization noise of multistage Sigma-Delta modulator using nonlinear oscillation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2555-2558, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Koichi Ishida, Kouichi Kanda, Atit Tamtrakarn, Hiroshi Kawaguchi 0001, Takayasu Sakurai |
Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3119-3122, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Magnus Själander, Mindaugas Drazdziulis, Per Larsson-Edefors, Henrik Eriksson |
A low-leakage twin-precision multiplier using reconfigurable power gating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1654-1657, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny |
Low-leakage repeaters for NoC interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 600-603, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Daisuke Suzuki, Minoru Saeki, Tetsuya Ichikawa |
DPA Leakage Models for CMOS Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29 - September 1, 2005, Proceedings, pp. 366-382, 2005, Springer, 3-540-28474-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Simon D. Byers |
Information Leakage Caused by Hidden Data in Published Documents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Secur. Priv. ![In: IEEE Secur. Priv. 2(2), pp. 23-27, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
hidden data, data security, web publishing |
15 | Geoff V. Merrett, Bashir M. Al-Hashimi |
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 198-207, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine |
Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 169-178, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Mahadevan Gomathisankaran, Akhilesh Tyagi |
WARM SRAM: A Novel Scheme to Reduce Static Leakage Energy in SRAM Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 105-114, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi |
Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 518-525, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Pietro Babighian, Luca Benini, Enrico Macii |
Sizing and Characterization of Leakage-Control Cells for Layout-Aware Distributed Power-Gating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 720-723, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Xiangrong Wang, Jun Xu, Christopher H. Pham |
An Effective Method to Detect Software Memory Leakage Leveraged from Neuroscience Principles Governing Human Memory Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSRE ![In: 15th International Symposium on Software Reliability Engineering (ISSRE 2004), 2-5 November 2004, Saint-Malo, Bretagne, France, pp. 329-339, 2004, IEEE Computer Society, 0-7695-2215-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi |
Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 362-369, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Donald Chai, Andreas Kuehlmann |
Circuit-Based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 387-392, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy 0001 |
Leakage Control Techniques for Designing Robust, Low Power Wide-OR Domino Logic for sub-130 nm CMOS Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 415-420, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Stas Polonsky, Keith A. Jenkins, Alan J. Weger, Shinho Cho |
CMOS IC diagnostics using the luminescence of OFF-state leakage currents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 134-139, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Farzan Farbiz, M. Farazian, M. Emadi, K. Sadeghi |
Sizing Consideration for Leakage Control Transistor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 639-641, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan |
Leakage Current: Moore's Law Meets Static Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 36(12), pp. 68-75, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Hiroomi Hikawa |
Pulse mode neuron with leakage integrator and additive random noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 821-824, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Koushik K. Das, Richard B. Brown |
Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 291-296, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Chen Chen 0018, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra |
Efficient FPGAs using nanoelectromechanical relays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 273-282, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
CMOS-NEM FPGA, nanoelectromechanical relay |
12 | Jungwook Kim, Seong Tae Jhang, Chu Shik Jhon |
Dynamic register-renaming scheme for reducing power-density and temperature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2010 ACM Symposium on Applied Computing (SAC), Sierre, Switzerland, March 22-26, 2010, pp. 231-237, 2010, ACM, 978-1-60558-639-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
embedded operating systems for mobile computing, power-density minimization, renaming scheme, register file, thermal management |
12 | Yongchan Ban, Savithri Sundareswaran, David Z. Pan |
Total sensitivity based dfm optimization of standard library cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010, pp. 113-120, 2010, ACM, 978-1-60558-920-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
optimization, VLSI, sensitivity, DFM, lithography |
12 | Ashutosh Chakraborty, David Z. Pan |
PASAP: power aware structured ASIC placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 395-400, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
structured ASICS, low power, placement, regular fabrics |
12 | Andrea Acquaviva, Andrea Calimera, Alberto Macii, Massimo Poncino, Enrico Macii, Matteo Giaconia, Claudio Parrella |
An integrated thermal estimation framework for industrial embedded platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 293-298, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
system-on-chip, power, estimation, thermal |
12 | Peng Zhou, JiangHe Yao, JiuLing Pei |
Implementation of an energy-efficient scheduling scheme based on pipeline flux leak monitoring networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 52(9), pp. 1632-1639, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dynamic modulation scaling, reclaiming scheme, sensor networks, real-time scheduling, EDF |
12 | Prateek Mishra, Anish Muttreja, Niraj K. Jha |
Low-power FinFET circuit synthesis using multiple supply and threshold voltages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 5(2), pp. 7:1-7:23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Low-power, linear programming, synthesis, TCMS |
12 | Xiangrong Zhou, Chenjie Yu, Peter Petrov |
Temperature-aware register reallocation for register file power-density minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(2), pp. 26:1-26:22, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Nagarajan Ranganathan, Upavan Gupta, Venkataraman Mahalingam |
Variation-aware multimetric optimization during gate sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(4), pp. 54:1-54:30, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
optimization, delay, power, mathematical programming, Gate sizing, crosstalk noise |
12 | Kameswar Rao Vaddina, Ethiopia Nigussie, Pasi Liljeberg, Juha Plosila |
Self-timed thermal sensing and monitoring of multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic, pp. 246-251, 2009, IEEE Computer Society, 978-1-4244-3341-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Marius Enachescu, Sorin Cotofana, Arjan J. van Genderen, Dimitrios Tsamados, Adrian M. Ionescu |
Can SG-FET Replace FET in Sleep Mode Circuits? ![Search on Bibsonomy](Pics/bibsonomy.png) |
NanoNet ![In: Nano-Net - 4th International ICST Conference, Nano-Net 2009, Lucerne, Switzerland, October 18-20, 2009. Proceedings, pp. 99-104, 2009, Springer, 978-3-642-04849-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
SG-FET, power gating, sleep transistor |
12 | Kotaro Fukui, Yuma Ishikawa, Keisuke Ohno, Nana Sakakibara, Masaaki Honda, Atsuo Takanishi |
Three dimensional tongue with liquid sealing mechanism for improving resonance on an anthropomorphic talking robot. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 11-15, 2009, St. Louis, MO, USA, pp. 5456-5462, 2009, IEEE, 978-1-4244-3803-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Pingqiang Zhou, Karthikk Sridharan, Sachin S. Sapatnekar |
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 179-184, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Mesut Meterelliyoz, Kaushik Roy 0001 |
Design for burn-in test: a technique for burn-in thermal stability under die-to-die parameter variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 787-792, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Chunyan Mu, David Clark 0001 |
Quantitative Analysis of Secure Information Flow via Probabilistic Semantics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARES ![In: Proceedings of the The Forth International Conference on Availability, Reliability and Security, ARES 2009, March 16-19, 2009, Fukuoka, Japan, pp. 49-57, 2009, IEEE Computer Society, 978-1-4244-3572-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | François-Xavier Standaert, François Koeune, Werner Schindler |
How to Compare Profiled Side-Channel Attacks?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACNS ![In: Applied Cryptography and Network Security, 7th International Conference, ACNS 2009, Paris-Rocquencourt, France, June 2-5, 2009. Proceedings, pp. 485-498, 2009, 978-3-642-01956-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Shafi Goldwasser |
Cryptography without (Hardly Any) Secrets ? ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT 2009, 28th Annual International Conference on the Theory and Applications of Cryptographic Techniques, Cologne, Germany, April 26-30, 2009. Proceedings, pp. 369-370, 2009, Springer, 978-3-642-01000-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Domenik Helms, Kai Hylla, Wolfgang Nebel |
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 33-38, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
electro-thermal coupling, system level estimation, reliability, thermal modelling, IR-drop |
12 | Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin |
Frequency and yield optimization using power gates in power-constrained designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 121-126, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
optimization, yield, power gate, frequency |
12 | Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos |
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 303-308, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dual oxide technology, nano-cmos, performance aware design, vco, process variation, parasitics, power aware design |
12 | Khawla Alzoubi, Daniel G. Saab, Massood Tabib-Azar |
Complementary nano-electromechanical switches for ultra-low power embedded processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 309-314, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
nems, cmos, switch, device, ultra-low power |
12 | Thom Jefferson A. Eguia, Ning Mi, Sheldon X.-D. Tan |
Statistical decoupling capacitance allocation by efficient numerical quadrature method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 309-316, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Berkant Ustaoglu |
Comparing SessionStateReveal and EphemeralKeyReveal for Diffie-Hellman Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ProvSec ![In: Provable Security, Third International Conference, ProvSec 2009, Guangzhou, China, November 11-13, 2009. Proceedings, pp. 183-197, 2009, Springer, 978-3-642-04641-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
leaking ephemeral secrets, postponed ephemeral key derivation, pseudo-static keys, Key agreement protocols |
12 | Saraju P. Mohanty |
Unified Challenges in Nano-CMOS High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 531, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan |
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 307-312, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Bardia Bozorgzadeh, Ali Afzali-Kusha |
Novel MOS Decoupling Capacitor Optimization Technique for Nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 175-180, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Jian Wang 0037, Rui Chen 0007, Pengyan Zhang, Ningjie Yu |
Fault tree analysis in city lifeline system operations and management-theory and application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIS ![In: Proceedings of the 2nd International Conference on Interaction Sciences: Information Technology, Culture and Human (ICIS 2009), Seoul, Korea, 24-26 November 2009, pp. 773-777, 2009, ACM, 978-1-60558-710-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
city lifeline system, city operations and management, triangular fuzzy number, fault tree analysis |
12 | Lejla Batina, Benedikt Gierlichs, Kerstin Lemke-Rust |
Differential Cluster Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings, pp. 112-127, 2009, Springer, 978-3-642-04137-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Differential Cluster Analysis, AES Hardware, Differential Power Analysis, Collision Attacks, Side-channel Cryptanalysis |
12 | Minoru Saeki, Daisuke Suzuki, Koichi Shimizu, Akashi Satoh |
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings, pp. 189-204, 2009, Springer, 978-3-642-04137-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Hsien-Te Chen, Chieh-Chun Chang, TingTing Hwang |
New spare cell design for IR drop minimization in Engineering Change Order. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 402-407, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
spare cell, IR drop, decoupling capacitor, ECO |
12 | Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, Russ Joseph |
Process variation characterization of chip-level multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 694-697, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
software, process variation, characterization |
12 | Jungseob Lee, Nam Sung Kim |
Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 47-50, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multicore processor, DVFS, power gating |
12 | Stephen Farrell |
Portable Storage and Data Loss. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Comput. ![In: IEEE Internet Comput. 12(3), pp. 90-93, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Philippe Golle, Frank McSherry, Ilya Mironov |
Data Collection with Self-Enforcing Privacy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Inf. Syst. Secur. ![In: ACM Trans. Inf. Syst. Secur. 12(2), pp. 9:1-9:24, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
privacy, data collection |
12 | Jin Sun 0006, Jun Li 0066, Dongsheng Ma, Janet Meiling Wang |
Chebyshev Affine-Arithmetic-Based Parametric Yield Prediction Under Limited Descriptions of Uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10), pp. 1852-1865, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Ning Mi, Sheldon X.-D. Tan, Yici Cai, Xianlong Hong |
Fast Variational Analysis of On-Chip Power Grids by Stochastic Extended Krylov Subspace Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11), pp. 1996-2006, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Frida Eng, Fredrik Gunnarsson, Fredrik Gustafsson |
Frequency Domain Analysis of Signals With Stochastic Sampling Times. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(7-2), pp. 3089-3099, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Karsten Nohl, David Evans 0001 |
Hiding in Groups: On the Expressiveness of Privacy Distributions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEC ![In: Proceedings of The IFIP TC-11 23rd International Information Security Conference, IFIP 20th World Computer Congress, IFIP SEC 2008, September 7-10, 2008, Milano, Italy, pp. 1-15, 2008, Springer, 978-0-387-09698-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Basuki E. Priyanto, Troels B. Sørensen, Ole K. Jensen |
In-Band Interference Effects on UTRA LTE Uplink Resource Block Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTC Spring ![In: Proceedings of the 67th IEEE Vehicular Technology Conference, VTC Spring 2008, 11-14 May 2008, Singapore, pp. 1846-1850, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Jie Zhang 0007, Nishant Patil, Subhasish Mitra |
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1009-1014, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Sungpack Hong, Sungjoo Yoo, Byeong Bin, Kyu-Myung Choi, Soo-Kwan Eo, Taehwan Kim 0007 |
Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 242-247, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Andrea Marongiu, Luca Benini, Andrea Acquaviva, Andrea Bartolini |
Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 259-266, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Zhenghong Wang, Ruby B. Lee |
A novel cache architecture with enhanced performance and security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), November 8-12, 2008, Lake Como, Italy, pp. 83-93, 2008, IEEE Computer Society, 978-1-4244-2836-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Zhibin Zhou 0001, Dijiang Huang |
SRK: A Distributed RFID Data Access Control Mechanism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICC ![In: Proceedings of IEEE International Conference on Communications, ICC 2008, Beijing, China, 19-23 May 2008, pp. 2854-2858, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Tao Luo 0002, David Newmark, David Z. Pan |
Total power optimization combining placement, sizing and multi-Vt through slack distribution management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 352-357, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Jin Sun 0006, Yue Huang, Jun Li 0066, Janet Meiling Wang |
Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 531-536, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Dafina Tanase, Niels Komen, Arie Draaijer, Gert-Jan Kleinrensink, Johannes Jeekel, Johan F. Lange, Paddy J. French |
Tissue-Viability Monitoring Using an Oxygen-Tension Sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BIOSTEC (Selected Papers) ![In: Biomedical Engineering Systems and Technologies, International Joint Conference, BIOSTEC 2008, Funchal, Madeira, Portugal, January 28-31, 2008, Revised Selected Papers, pp. 109-122, 2008, Springer, 978-3-540-92218-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Oxygen-tension, tissue viability, sensor |
12 | Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal |
Stress aware layout optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 168-174, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Kazumasa Omote, Kazuhiko Kato |
Protection and Recovery of Disk Encryption Key Using Smart Cards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 106-111, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Nicholas Allec, Zyad Hassan, Li Shang, Robert P. Dick, Ronggui Yang |
ThermalScope: multi-scale thermal analysis for nanometer-scale integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 603-610, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Brian Cline, Vivek Joshi, Dennis Sylvester, David T. Blaauw |
STEEL: a technique for stress-enhanced standard cell library design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 691-697, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat |
Analysis and minimization of practical energy in 45nm subthreshold logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 294-300, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Naomi Seki, Lei Zhao, Jo Kei, Daisuke Ikebuchi, Yu Kojima, Yohei Hasegawa, Hideharu Amano, Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami, Tetsuya Sunata, Jun Kanai, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura |
A fine-grain dynamic sleep control scheme in MIPS R3000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 612-617, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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