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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 5390 occurrences of 2060 keywords
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Results
Found 21101 publication records. Showing 21101 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Proshanta Saha |
Automatic Software Hardware Co-Design for Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 507-508, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Heiner Giefers, Marco Platzner |
A Many-core Implementation based on the Reconfigurable Mesh Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 41-46, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Jens Hagemeyer, Boris Kettelhoit, Markus Koester, Mario Porrmann |
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 331-338, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Kang Sun, Xuezeng Pan, Jimin Wang, Lingdi Ping |
PAD: A Design Space Exploration Model For Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2-4 April 2007, Las Vegas, Nevada, USA, pp. 964-965, 2007, IEEE Computer Society, 978-0-7695-2776-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Ying Chen, Simon Y. Chen |
Cost-Driven Hybrid Configuration Prefetching for Partial Reconfigurable Coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Florian Dittmann 0001, Marcelo Götz, Achim Rettberg |
Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Mingxian Jin, Johnnie W. Baker |
On the Power of the Multiple Associative Computing (MASC) Model Related to That of Reconfigurable Bus-Based Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Jim Tørresen, Kyrre Glette |
Improving Flexibility in On-Line Evolvable Systems by Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 7th International Conference, ICES 2007, Wuhan, China, September 21-23, 2007, Proceedings, pp. 391-402, 2007, Springer, 978-3-540-74625-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Proshanta Saha, Tarek A. El-Ghazawi |
Software/Hardware Co-Scheduling for Reconfigurable Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 299-300, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Li Chia, Chi-Sheng Shih 0001 |
Template-based Runtime Reconfiguration Scheduling for Partial Reconfigurable SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 21-24 August 2007, Daegu, Korea, pp. 542-549, 2007, IEEE Computer Society, 0-7695-2975-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Awni Itradat, M. Omair Ahmad, Ali M. Shatnawi |
Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1037-1040, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi |
System-Level Design for Partially Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2738-2741, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Wim Vanderbauwhede |
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 326-333, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Björn Osterloh, Harald Michalik, Björn Fiethe, Frank Bubenhagen |
Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 258-262, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Richard Hough, Praveen Krishnamurthy, Roger D. Chamberlain, Ron K. Cytron, John W. Lockwood, Jason E. Fritts |
Empirical performance assessment using soft-core processors on reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Experimental Computer Science ![In: Proceedings of the Workshop on Experimental Computer Science, Part of ACM FCRC, San Diego, CA, USA, 13-14 June 2007, pp. 18, 2007, ACM, 978-1-59593-751-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Vincenzo Grassi, Raffaela Mirandola, Antonino Sabetta |
A model-driven approach to performability analysis of dynamically reconfigurable component-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOSP ![In: Proceedings of the 6th International Workshop on Software and Performance, WOSP 2007, Buenes Aires, Argentina, February 5-8, 2007, pp. 103-114, 2007, ACM, 1-59593-297-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
performability, model-driven development, dynamic reconfiguration |
21 | Sohaib Majzoub, Hassan B. Diab |
Mapping and Performance Analysis of Lookup Table Implementations on Reconfigurable Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICCSA ![In: 2007 IEEE/ACS International Conference on Computer Systems and Applications (AICCSA 2007), 13-16 May 2007, Amman, Jordan, pp. 513-520, 2007, IEEE Computer Society, 1-4244-1030-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | K. N. Vikram, Vinita Vasudevan |
Mapping Data-Parallel Tasks Onto Partially Reconfigurable Hybrid Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(9), pp. 1010-1023, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Juanjo Noguera, Rosa M. Badia |
System-level power-performance tradeoffs for reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(7), pp. 730-739, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Miljan Vuletic, Laura Pozzi, Paolo Ienne |
Virtual memory window for application-specific reconfigurable coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(8), pp. 910-915, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Miguel A. Vega-Rodríguez, Juan Antonio Gómez Pulido, Juan Manuel Sánchez-Pérez, José M. Granado Criado, Manuel Rubio del Solar |
Reconfigurable Computing and Parallelism for Implementing and Accelerating Evolutionary Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Parallel Evolutionary Computations ![In: Parallel Evolutionary Computations, pp. 71-93, 2006, Springer, 978-3-540-32837-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Leipo Yan, Thambipillai Srikanthan, Niu Gang |
Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006, pp. 182-188, 2006, ACM, 1-59593-362-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
CGRA, VLIW, hardware/software partitioning, delay estimation, area estimation |
21 | Didier Bourse, Karim El-Khazen, Al Lee, Dragan Boscovic |
Business Models of End-to-End Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTC Spring ![In: Proceedings of the 63rd IEEE Vehicular Technology Conference, VTC Spring 2006, 7-10 May 2006, Melbourne, Australia, pp. 57-61, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ying Yi, Ioannis Nousias, Mark Milward, Sami Khawam, Tughrul Arslan, Iain Lindsay |
System-level scheduling on instruction cell based reconfigurable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 381-386, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ying Wei 0002, Hua Tang, Alex Doboli |
Systematic methodology for designing reconfigurable Delta-Sigma modulator topologies for multimode communication systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 393-398, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Pao-Ann Hsiung, Chun-Hsian Huang, Chih-Feng Liao |
Perfecto: A Systemc-Based Performance Evaluation Framework for Dynamically Partially Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Arnaud Lagger, Andres Upegui, Eduardo Sanchez, Iván González |
Self-Reconfigurable Pervasive Platform for Cryptographic Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Hayden Kwok-Hay So, Robert W. Brodersen |
Improving Usability of FPGA-Based Reconfigurable Computers Through Operating System Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura |
Fault Tolerant Reconfigurable Device Based on Autonomous-Repair Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Romanelli Lodron Zuim, José T. de Sousa, Claudionor José Nunes Coelho Jr. |
A fast SAT solver algorithm best suited to reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 131-136, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
formal verification, SAT, CNF, DPLL |
21 | Milene Barbosa Carvalho, Luís F. W. Góes, Carlos Augusto Paiva da Silva Martins |
Dynamically reconfigurable cache architecture using adaptive block allocation policy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Sebastian Lange, Martin Middendorf |
Multi-level reconfigurable architectures in the switch model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Mohamed Taher, Tarek A. El-Ghazawi |
Exploiting processing locality through paging configurations in multitasked reconfigurable systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Farhad Mehdipour, Morteza Saheb Zamani, Hamid Reza Ahmadifar, Mehdi Sedighi, Kazuaki J. Murakami |
Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Minoru Watanabe, Mototsugu Miyano, Fuminori Kobayashi |
An optically differential reconfigurable gate array with a holographic memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Sascha Uhrig, Stefan Maier, Georgi Kuzmanov, Theo Ungerer |
Coupling of a reconfigurable architecture and a multithreaded processor core with integrated real-time scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Qin Wang 0004, Ang Li, Zhancai Li, Yong Wan |
A Design and Implementation of Reconfigurable Architecture for Neural Networks Based on Systolic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (2) ![In: Advances in Neural Networks - ISNN 2006, Third International Symposium on Neural Networks, Chengdu, China, May 28 - June 1, 2006, Proceedings, Part III, pp. 1328-1333, 2006, Springer, 3-540-34482-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | John H. Reif, Sam Slee |
Asymptotically Optimal Kinodynamic Motion Planning for Self-reconfigurable Robots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WAFR ![In: Algorithmic Foundation of Robotics VII, Selected Contributions of the Seventh International Workshop on the Algorithmic Foundations of Robotics, WAFR 2006, July 16-18, 2006, New York, NY, USA, pp. 457-472, 2006, Springer, 978-3-540-68404-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Björn Griese, Boris Kettelhoit, Mario Porrmann |
Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 214-219, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Kang Sun, Lingdi Ping, Jiebing Wang, Zugen Liu, Xuezeng Pan |
Design of a Reconfigurable Cryptographic Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 452-458, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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21 | Hanho Lee, Chang-Seok Choi |
Implementation of a FIR Filter on a Partial Reconfigurable Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES (3) ![In: Knowledge-Based Intelligent Information and Engineering Systems, 10th International Conference, KES 2006, Bournemouth, UK, October 9-11, 2006, Proceedings, Part III, pp. 108-115, 2006, Springer, 3-540-46542-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Rawat Siripokarpirom |
Platform Development for Run-Time Reconfigurable Co-Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece, pp. 179-185, 2006, IEEE Computer Society, 0-7695-2580-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Lukás Sekanina |
On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 221-228, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FPGA, evolutionary algorithms, dependability, evolvable hardware |
21 | Claudio Mucci, Massimo Bocchi, Mario Toma, Fabio Campi |
A case-study on multimedia applications for the XiRisc reconfigurable processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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21 | Evangelos F. Stefatos, I. Bravos, Tughrul Arslan |
Low-power implementation of FIR filters within an adaptive reconfigurable architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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21 | Franklin Bien, Youngsik Hur, Moonkyun Maeng, Hyoungsoo Kim, Edward Gebara, Joy Laskar |
A reconfigurable fully-integrated 0.18µm CMOS feed forward equalizer IC for 10-Gb/sec backplane links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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21 | Tughrul Arslan, Nakul Haridas, Erfu Yang, Ahmet T. Erdogan, Nick Barton, Anthony J. Walton, John S. Thompson, Adrian Stoica, Tanya Vladimirova, Klaus D. McDonald-Maier, W. Gareth J. Howells |
ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 15-18 June 2006, Istanbul, Turkey, pp. 323-329, 2006, IEEE Computer Society, 0-7695-2614-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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21 | Raphael Fonte Boa, Dulcinéia Oliveira da Penha, Alexandre Marques Amaral, Márcio Oliveira Soares de Souza, Carlos Augusto Paiva da Silva Martins, Petr Yakovlevitch Ekel |
RCMP: A Reconfigurable Chip-Multiprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA Workshops ![In: Frontiers of High Performance Computing and Networking - ISPA 2006 Workshops, ISPA 2006 International Workshops, FHPCN, XHPC, S-GRACE, GridGIS, HPC-GTP, PDCE, ParDMCom, WOMP, ISDF, and UPWN, Sorrento, Italy, December 4-7, 2006, Proceedings, pp. 94-103, 2006, Springer, 3-540-49860-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ambrose Chu, Mihai Sima |
Reconfigurable RSA Cryptography for Embedded Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1312-1315, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ryan Kastner |
Policy-Driven Memory Protection for Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESORICS ![In: Computer Security - ESORICS 2006, 11th European Symposium on Research in Computer Security, Hamburg, Germany, September 18-20, 2006, Proceedings, pp. 461-478, 2006, Springer, 3-540-44601-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Embedded Systems, Computer Security, Security Policies, Policy Languages, Reference Monitors, Separation Kernels |
21 | Kang Sun, Xuezeng Pan, Jiebing Wang, Jimin Wang |
Design of A Novel Asynchronous Reconfigurable Architecture for Cryptographic Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IMSCCS (2) ![In: Interdisciplinary and Multidisciplinary Research in Computer Science, IEEE CS Proceeding of the First International Multi-Symposium of Computer and Computational Sciences (IMSCCS|06), June 20-24, 2006, Zhejiang University, Hangzhou, China, Vol. 2, pp. 751-757, 2006, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Kentaro Oda, Hiroki Najima, Yoshihiro Yasutake, Takaichi Yoshida |
A Simple, Safe Reconfigurable Object Model with Loosely-Coupled Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 20th International Conference on Advanced Information Networking and Applications (AINA 2006), 18-20 April 2006, Vienna, Austria, pp. 413-418, 2006, IEEE Computer Society, 0-7695-2466-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Stefan Mohl |
Innovative technologies I - Using FPGAs in supercomputers: breaking with reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 251, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Tarek A. El-Ghazawi, Duncan A. Buell, Volodymyr V. Kindratenko, Kris Gaj |
M03 - Reconfigurable supercomputing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 217, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Ben Cordes, Miriam Leeser, Eric L. Miller 0001, Richard W. Linderman |
Poster reception - Improving the performance of parallel backprojection on a reconfigurable supercomputer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 149, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
21 | Nahri Moreano, Edson Borin, Cid C. de Souza, Guido Araujo |
Efficient datapath merging for partially reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(7), pp. 969-980, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Alberto La Rosa, Luciano Lavagno, Claudio Passerone |
Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1), pp. 100-106, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon |
Dynamic hardware multiplexing for coarse grain reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 270, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Michael Attig, John W. Lockwood |
A framework for rule processing in reconfigurable network systems (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 277, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Benoît Miramond, Jean-Marc Delosme |
Design Space Exploration for Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 366-371, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen |
SystemC-based Design Methodology for Reconfigurable System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 364-371, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Fredy Rivera, Milagros Fernández, Nader Bagherzadeh |
An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 396-402, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | John C. Gallagher, Sanjay K. Boddhu, Saranyan A. Vigraham |
A reconfigurable continuous time recurrent neural network for evolvable hardware applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2005, 2-4 September 2005, Edinburgh, UK, pp. 2461-2468, 2005, IEEE, 0-7803-9363-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Vivek Garg, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti 0001 |
A function generator-based reconfigurable system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 905-909, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Carles Riba Romeva, Roberto Pérez, A. Jorge L. Sánchez, María D. Domínguez, Joaquín Aca, G. Arturo Molina |
A Concurrent Approach to Design of Reconfigurable Machine Tools to Process Bamboo. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDVE ![In: Cooperative Design, Visualization, and Engineering, Second International Conference, CDVE 2005, Palma de Mallorca, Spain, September 18-21, 2005, Proceedings, pp. 210-217, 2005, Springer, 3-540-28948-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Bamboo, Reconfigurability, Machine Tool, Concurrent Design |
21 | Timothy O'Sullivan, Richard Studdert |
Handheld Medical Devices Negotiating for Reconfigurable Resources Using Agents. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CBMS ![In: 18th IEEE Symposium on Computer-Based Medical Systems (CBMS 2005), 23-24 June 2005, Dublin, Ireland, pp. 70-75, 2005, IEEE Computer Society, 0-7695-2355-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon |
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Evangelos F. Stefatos, Wei Han 0001, Tughrul Arslan, Robert Thomson 0003 |
Low-Power Reconfigurable VLSI Architecture for the Implementation of FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang |
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Remy Eskinazi Sant'Anna, Manoel Eusébio de Lima, Paulo Romero Martins Maciel, Carlos A. Valderrama, Abel Guilhermino Silva-Filho, Paulo Sérgio B. do Nascimento |
A Timed Petri Net Approach for Pre-Runtime Scheduling in Partial and Dynamic Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Imran Ahmed 0001, Tughrul Arslan, Sajid Baloch, Ian Underwood, Robin Woodburn |
Domain Specific Reconfigurable Architecture of Turbo Decoder Optimized for Short Distance Wireless Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Christiane V. Pousa, Luís F. W. Góes, Dulcinéia Oliveira da Penha, Carlos Augusto Paiva da Silva Martins |
Reconfigurable Sequential Consistency Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Pradeep Nalabalapu, Ron Sass |
Bandwidth Management with a Reconfigurable Data Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Christiane V. Pousa, Luís F. W. Góes, Carlos Augusto Paiva da Silva Martins |
Reconfigurable Object Consistency Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Makoto Okada, Tatsuo Hiramatsu, Hiroshi Nakajima, Makoto Ozone, Katsunori Hirase, Shinji Kimura |
A Reconfigurable Processor Based on ALU Array Architecture with Limitation on the Interconnection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Christophe Bobda |
Building Up a Course in Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: 2005 International Conference on Microelectronics Systems Education, MSE 2005, Anaheim, CA, USA, June 12-13, 2005, pp. 7-8, 2005, IEEE Computer Society, 0-7695-2374-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis |
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 301-302, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Chuan He, Wei Zhao 0001, Mi Lu |
Time Domain Numerical Simulation for Transient Waves on Reconfigurable Coprocessor Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 127-136, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Michael Attig, John W. Lockwood |
A Framework for Rule Processing in Reconfigurable Network Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 225-234, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Fang Wang, Zeng-Guang Hou, De Xu, Min Tan 0001 |
An Agent-Based Holonic Architecture for Reconfigurable Manufacturing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (3) ![In: Advances in Natural Computation, First International Conference, ICNC 2005, Changsha, China, August 27-29, 2005, Proceedings, Part III, pp. 622-627, 2005, Springer, 3-540-28320-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Ning Li, Jianchu Kang, Weifeng Lv |
A Hybrid Approach for Dynamic Business Process Mining Based On Reconfigurable Nets and Event Types. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEBE ![In: 2005 IEEE International Conference on e-Business Engineering (ICEBE 2005), 18-21 October 2005, Beijing, China, pp. 289-294, 2005, IEEE Computer Society, 0-7695-2430-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Chi-Sheng Shih 0001, Chia-Lin Yang, Mong-Kai Ku, Tei-Wei Kuo, Shao-Yi Chien, Yao-Wen Chang, Liang-Gee Chen |
Reconfigurable Platform for Content Science Research. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2005), 17-19 August 2005, Hong Kong, China, pp. 481-486, 2005, IEEE Computer Society, 0-7695-2346-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Jih-Ching Chiu, Ren-Bang Lin |
FMRPU: Design of Fine-Grain Multi-context Reconfigurable Processing Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 171-185, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Siew Kei Lam, Yun Deng, Thambipillai Srikanthan |
Morphable Structures for Reconfigurable Instruction Set Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 450-463, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Christiane V. Pousa, Luís F. W. Góes, Carlos Augusto Paiva da Silva Martins |
Reconfigurable consistency model for object-based software DSM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCGRID ![In: 5th International Symposium on Cluster Computing and the Grid (CCGrid 2005), 9-12 May, 2005, Cardiff, UK, pp. 937-944, 2005, IEEE Computer Society, 0-7803-9074-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Chris Sullivan, Alex Wilson, Stephen P. G. Chappell |
Deterministic Hardware Synthesis for Compiling High-Level Descriptions to Heterogeneous Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 38th Hawaii International Conference on System Sciences (HICSS-38 2005), CD-ROM / Abstracts Proceedings, 3-6 January 2005, Big Island, HI, USA, 2005, IEEE Computer Society, 0-7695-2268-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis |
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 161-168, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | Christiane V. Pousa, Luís F. W. Góes, Carlos Augusto Paiva da Silva Martins |
Reconfigurable Object Consistency Model for Distributed Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, Third International Symposium, ISPA 2005, Nanjing, China, November 2-5, 2005, Proceedings, pp. 132-138, 2005, Springer, 3-540-29769-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Ling Zhuo, Viktor K. Prasanna |
High Performance Linear Algebra Operations on Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, November 12-18, 2005, Seattle, WA, USA, CD-Rom, pp. 2, 2005, IEEE Computer Society, 1-59593-061-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | John C. Gallagher, Sanjay K. Boddhu, Saranyan A. Vigraham |
A Reconfigurable Continuous Time Recurrent Neural Network for Evolvable Hardware Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June - 1 July 2005, Washington, DC, USA, pp. 247-250, 2005, IEEE Computer Society, 0-7695-2399-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Lei Li, Zheng Cao, Mingyu Chen 0001, Jianping Fan 0002 |
A Reconfigurable Optical Interconnect System for DSAG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2005), 5-8 December 2005, Dalian, China, pp. 31-34, 2005, IEEE Computer Society, 0-7695-2405-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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21 | João M. P. Cardoso |
Self-loop Pipelining and Reconfigurable Dataflow Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings, pp. 234-243, 2004, Springer, 3-540-22377-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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21 | Paul White, K. Kopanski, Hod Lipson |
Stochastic Self-reconfigurable Cellular Robotics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: Proceedings of the 2004 IEEE International Conference on Robotics and Automation, ICRA 2004, April 26 - May 1, 2004, New Orleans, LA, USA, pp. 2888-2893, 2004, IEEE. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis |
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 252, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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21 | Sashisu Bajracharya, Chang Shu 0003, Kris Gaj, Tarek A. El-Ghazawi |
Implementation of elliptic curve cryptosystems over GF(2n) in optimal normal basis on a reconfigurable computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 259, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Magesh Sadasivam, Sangjin Hong |
Dynamically reconfigurable architecture for high-throughput processing of data centric applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 254, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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21 | Marcos R. Boschetti, Ivan Saraiva Silva, Sergio Bampi |
A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 242-247, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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21 | Miljan Vuletic, Ludovic Righetti, Laura Pozzi, Paolo Ienne |
Operating System Support for Interface Virtualisation of Reconfigurable Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 748, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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21 | Roberto Pérez, Joaquín Aca, Andrés Valverde T., Horacio Ahuett, Arturo Molina 0001, Carles Riba Romeva |
A Modularity Framework for Concurrent Design of Reconfigurable Machine Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDVE ![In: Cooperative Design, Visualization, and Engineering, First International Conference, CDVE 2004, Palma de Mallorca, Spain, September 19-22, 2004, Proceedings, pp. 87-95, 2004, Springer, 3-540-23149-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Modularity, Reconfigurability, Machine Tool, Concurrent Design |
21 | Ray C. C. Cheung |
A System on Chip Design Framework for Prime Number Validation Using Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 1186-1187, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
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