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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Yuji Sato |
Proposal for a field-evolvable hardware based on a microprocessor incorporated flash memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CEC ![In: Proceedings of the 2001 Congress on Evolutionary Computation, CEC 2001, COEX, Seoul, Korea, May 27-30, 2001, pp. 608-615, 2001, IEEE, 0-7803-6657-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Nabarun Bhattacharyya, A. Wang |
Automatic test generation for micro-architectural verification of configurable microprocessor cores with user extensions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001, pp. 14-15, 2001, IEEE Computer Society, 0-7695-1411-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Shuvendu K. Lahiri, Carl Pixley, Ken Albin |
Experience with term level modeling and verification of the M*CORE TM microprocessor core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HLDVT ![In: Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, Monterey, California, USA, November 7-9, 2001, pp. 109-114, 2001, IEEE Computer Society, 0-7695-1411-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
FPGA-Based Fault Injection for Microprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 304-, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Y. Lin, L. E. Turner, Martin P. Mintchev |
Design of a portable microprocessor-based stimulator for the recreation of impaired gastrointestinal motility. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001, pp. 1187-1190, 2001, IEEE, 0-7803-7057-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Mark D. Aagaard, Byron Cook, Nancy A. Day, Robert B. Jones |
A Framework for Microprocessor Correctness Statements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 11th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2001, Livingston, Scotland, UK, September 4-7, 2001, Proceedings, pp. 433-448, 2001, Springer, 3-540-42541-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Chia-Hung Kuo, Behnam S. Arad |
Design and Simulation of a Pipelined Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAINE ![In: Proceedings of the 14th International Conference on Computer Applications in Industry and Engineering, November 27-29, 2001, Las Vegas, Nevada, USA, pp. 5-8, 2001, ISCA, 1-880843-40-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP BibTeX RDF |
|
12 | Tamotsu Miyake, Takeo Yamashita, Norikatsu Asari, Hideki Sekisaka, Tom Sakai, Kazuhiro Matsuura, Atsushi Wakahara, Hideyuki Takahashi, Tom Hiyama, Kazuhisa Miyamoto, Kazutaka Mori |
Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001, pp. 275-278, 2001, IEEE, 0-7803-6591-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Howard H. Smith, Aline Deutsch, Sharad Mehrotra, David Widiger, Michael A. Bowen, Allan H. Dansky, Gerard V. Kopcsay, Byron Krauter |
R(f)L(f)C coupled noise evaluation of an S/390 microprocessor chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001, pp. 237-240, 2001, IEEE, 0-7803-6591-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Frank Vahid, Ann Gordon-Ross |
A self-optimizing embedded microprocessor using a loop table for low power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001, pp. 219-224, 2001, ACM, 1-58113-371-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
parameterized architectures, self-optimizing architecture, embedded systems, low-power, system-on-a-chip, platforms, cores, tuning |
12 | John Paul Shen |
Clear and Present Tensions in Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 19th International Conference on Computer Design (ICCD 2001), VLSI in Computers and Processors, 23-26 September 2001, Austin, TX, USA, Proceedings, pp. 4, 2001, IEEE Computer Society, 0-7695-1200-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger |
Static Energy Reduction Techniques for Microprocessor Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 19th International Conference on Computer Design (ICCD 2001), VLSI in Computers and Processors, 23-26 September 2001, Austin, TX, USA, Proceedings, pp. 276-283, 2001, IEEE Computer Society, 0-7695-1200-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Seongwoo Kim, Arun K. Somani |
On-Line Integrity Monitoring of Microprocessor Control Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 19th International Conference on Computer Design (ICCD 2001), VLSI in Computers and Processors, 23-26 September 2001, Austin, TX, USA, Proceedings, pp. 314-321, 2001, IEEE Computer Society, 0-7695-1200-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Mauro Olivieri, Alessandro Trifiletti |
An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 638-641, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Sergio L. Toral Marín, José M. Quero, Mar M. Elena Pérez, Leopoldo García Franquelo |
A microprocessor based system for ECG telemedicine and telecare. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 526-529, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Mauro Olivieri |
A genetic approach to the design space exploration of superscalar microprocessor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 69-72, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Ram Krishnamurthy 0001, Mark A. Anders 0001, Krishnamurthy Soumyanath, Shekhar Borkar |
Leakage control and tolerance challenges for sub-0.1µm microprocessor circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, West Lafayette, Indiana, USA, 2001, pp. 43-44, 2001, ACM, 1-58113-351-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Gilbert Vandling |
Modeling and testing the Gekko microprocessor, an IBM PowerPC derivative for Nintendo. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 593-599, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Mary P. Kusko, Bryan J. Robbins, Timothy J. Koprowski, William V. Huott |
99% AC test coverage using only LBIST on the 1 GHz IBM S/390 zSeries 900 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001, pp. 586-592, 2001, IEEE Computer Society, 0-7803-7169-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Sei Takahashi, Munehisa Taira, Hidetaka Saegusa, Takehiko Hoshino, Hideo Nakamura |
Development of a Fail-Safe Microprocessor LSI with Self-Diagnosis Mechanism Depending on an M-Sequence Code Signature. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 8th Pacific Rim International Symposium on Dependable Computing (PRDC 2001), 17-19 December 2001, Seoul, Korea, pp. 191-198, 2001, IEEE Computer Society, 0-7695-1414-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Rajagopalan Desikan, Doug Burger, Stephen W. Keckler |
Measuring Experimental Error in Microprocessor Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 28th Annual International Symposium on Computer Architecture, ISCA 2001, Göteborg, Sweden, June 30-July 4, 2001, pp. 266-277, 2001, ACM, 0-7695-1162-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Bob Bentley |
Validating the Intel Pentium 4 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001, pp. 244-248, 2001, ACM, 1-58113-297-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Richard Lee, Benjamin Tsien |
Pre-silicon Verification of the Alpha 21364 Microprocessor Error Handling System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001, pp. 822-827, 2001, ACM, 1-58113-297-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Gregory A. Northrop, Pong-Fei Lu |
A Semi-Custom Design Flow in High-Performance Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 2001, pp. 426-431, 2001, ACM, 1-58113-297-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
12 | Robert Müller 0002 |
Fingerprint verification with microprocessor security tokens. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2001 |
RDF |
|
12 | Ali El-Hajj, Karim Y. Kabalan, Maher N. Mneimneh, Feras Karablieh |
Microprocessor Simulation and Program Assembling Using Spreadsheets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Simul. ![In: Simul. 75(2), pp. 82-90, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Hee-Tae Ahn, David J. Allstot |
A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(3), pp. 450-454, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Simon Tam 0001, Stefan Rusu, Utpal Nagarji Desai, Robert Kim, Ji Zhang, Ian Young 0001 |
Clock generation and distribution for the first IA-64 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(11), pp. 1545-1552, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Takashi Okuda, Isao Naritake, Tadahiko Sugibayashi, Yuji Nakajima, Tatsunori Murotani |
A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(8), pp. 1153-1158, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Stefan Rusu, Gadi Singer |
The first IA-64 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(11), pp. 1539-1544, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Thomas D. Burd, Trevor Pering, Anthony J. Stratakos, Robert W. Brodersen |
A dynamic voltage scaled microprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(11), pp. 1571-1580, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You |
A third-generation SPARC V9 64-b microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(11), pp. 1526-1538, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | William C. Athas, Nestoras Tzartzanis, Weihua Mao, Lena Peterson, Rajat Lal, Kisup Chong, Joong-Seok Moon, Lars J. Svensson, Michael Bolotski |
The design and implementation of a low-power clock-powered microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(11), pp. 1561-1570, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | David H. Allen, Sang H. Dhong, H. Peter Hofstee, Jens Leenstra, Kevin J. Nowka, Daniel L. Stasiak, Dieter F. Wendel |
Custom circuit design as a driver of microprocessor performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 44(6), pp. 799-822, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Charles F. Webb |
S/390 microprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 44(6), pp. 899-908, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Todd M. Austin |
DIVA: A Dynamic Approach to Microprocessor Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Instr. Level Parallelism ![In: J. Instr. Level Parallelism 2, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
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12 | John N. Coleman, E. I. Chester, Christopher I. Softley, Jiri Kadlec |
Corrections to 'Arithmetic on the European Logarithmic Microprocessor'. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(10), pp. 1152, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Pantelis N. Botsaris, A. Polyhroniadis |
Microprocessor controlled exhaust gas lambda sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 24(3), pp. 121-127, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Eduardo Augusto Bezerra, Michael Paul Gough |
A guide to migrating from microprocessor to FPGA coping with the support tool limitations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 23(10), pp. 561-572, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | M. Watheq El-Kharashi, F. Elguibaly, Kin F. Li |
A quantitative study for Java microprocessor architectural requirements. Part I: Instruction set design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 24(5), pp. 225-236, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | M. Watheq El-Kharashi, F. Elguibaly, Kin F. Li |
A quantitative study for Java microprocessor architectural requirements. Part II: high-level language support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 24(5), pp. 237-250, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Takashi Ebihara, Yasushi Ishikawa, Yasuhisa Kisuki, Tadashi Sakamoto, Tomohiro Hase |
Speech synthesis software with a variable speaking rate and its implementation on a 32-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 46(3), pp. 887-895, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Go Sato, Takashi Asai, Tadashi Sakamoto, Tomohiro Hase |
Improvement of the positioning accuracy of a software-based GPS receiver using a 32-bit embedded microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 46(3), pp. 521-530, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Jae Wook Jeon |
A microprocessor course: designing and implementing personal microcomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Educ. ![In: IEEE Trans. Educ. 43(4), pp. 426-433, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Richard B. Brown, Ronald J. Lomax, Gordon A. Carichner, Alan J. Drake |
A microprocessor design project in an introductory VLSI course. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Educ. ![In: IEEE Trans. Educ. 43(3), pp. 353-361, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Keith A. Jenkins, James P. Eckhardt |
Measuring Jitter and Phase Error in Microprocessor Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(2), pp. 86-93, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Wei-Cheng Lai, Angela Krstic, Kwang-Ting (Tim) Cheng |
Functionally Testable Path Delay Faults on a Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(4), pp. 6-14, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham |
Validating PowerPC Microprocessor Custom Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(4), pp. 61-76, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Alfred L. Crouch, Michael Mateja, Teresa L. McLaurin, John C. Potter, Dat Tran |
Test Development for a Third-Version ColdFire Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(4), pp. 29-37, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Magdy S. Abadir, Sumit Dasgupta |
Guest Editors' Introduction: Microprocessor Test and Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(4), pp. 4-5, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
12 | Andrew Burdass, Gary Campbell, Richard Grisenthwaite, David Gwilt, Peter Harrod, Richard York |
Microprocessor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETW ![In: 5th European Test Workshop, ETW 2000, Cascais, Portugal, May 23-26, 2000, pp. 17-22, 2000, IEEE Computer Society, 0-7695-0701-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Jun Kikuchi, Tetsuo Sasaki, Tohru Hashimoto, Kazuhisa Miyamoto |
Delay-optimal wiring plan for the microprocessor of high performance computing machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, pp. 265-270, 2000, ACM, 0-7803-5974-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Naoki Nishimura, Takahiro Sasaki, Tetsuo Hironaka |
Prototype microprocessor LSI with scheduling support hardware for operating system on multiprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, pp. 29-30, 2000, ACM, 0-7803-5974-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Fujio Ishihara, Christian Klinger, Ken-ichi Agawa |
Clock design of 300MHz 128-bit 2-way superscalar microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, pp. 647-652, 2000, ACM, 0-7803-5974-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Norman Kojima, Yukiko Parameswar, Christian Klingner, Yukio Ohtaguro, Masataka Matsui, Shigeaki Iwasa, Tatsuo Teruyama, Takayoshi Shimazawa, Hideki Takeda, Kouji Hashizume, Haruyuki Tago, Masaaki Yamada |
Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, pp. 641-646, 2000, ACM, 0-7803-5974-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | David M. Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose |
Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACS ![In: Power-Aware Computer Systems, First International Workshop, PACS 2000, Cambridge, MA, USA, November 12, 2000, Revised Papers, pp. 126-136, 2000, Springer, 3-540-42329-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Sergej Sawitzki, Jens Schönherr, Rainer G. Spallek, Bernd Straube |
Formal Verification of a Reconfigurable Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 781-784, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Jess Rupley II, David C. Holloway |
Performance tradeoffs in sequencer design on a new G4 PowerPCTM microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2000 IEEE International Symposium on Performance Analysis of Systems and Software, April 24-35, 2000, Austin, Texas, USA, Proceedings, pp. 88-94, 2000, IEEE Computer Society, 0-7803-6418-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Tsvetozar Georgiev, Angel Smrikarov, Dimitar Stanchev |
Advanced microprocessor system for testing the dynamic properties of road vehicles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CompSysTech ![In: Proceedings of the Conference on Computer Systems and Technologies, CompSysTech 2000, Sofia, Bulgaria, 2000, pp. 5251-5255, 2000, ACM, 978-954-9641-17-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Wadih Zaatar, George E. Nasr |
An implementation scheme for a microprocessor emulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2000 7th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2000, Jounieh, Lebanon, December 17-20, 2000, pp. 169-172, 2000, IEEE, 0-7803-6542-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Rory McInerney, Kurt Leeper, Troy Hill, Heming Chan, Bulent Basaran, Lance McQuiddy |
Methodology for repeater insertion management in the RTL, layout, floorplan and fullchip timing databases of the Itanium microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 2000, pp. 99-104, 2000, ACM, 1-58113-191-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
RC delay, routing, timing, estimation, microprocessors, floorplan, repeaters |
12 | Lode Nachtergaele, Vivek Tiwari, Nikil D. Dutt |
System and Architecture-Level Power Reduction for Microprocessor-Based Communication and Multi-Media Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000, San Jose, California, USA, November 5-9, 2000, pp. 569-573, 2000, IEEE Computer Society, 0-7803-6448-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
A quick and inexpensive method to identify false critical paths using ATPG techniques: an experiment with a PowerPCTM microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000, pp. 71-74, 2000, IEEE, 0-7803-5809-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Trevor Pering, Thomas D. Burd, Robert W. Brodersen |
Voltage scheduling in the IpARM microprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000, Rapallo, Italy, July 25-27, 2000, pp. 96-101, 2000, ACM, 1-58113-190-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
low-power, energy-efficient, operating systems, RTOS |
12 | Yi-Kan Cheng, David Bearden, Kanti Suryadevara |
Application-Based, Transistor-Level Full-Chip Power Analysis for 700 MHz PowerPCTM Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 215-220, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Piotr Dudek, Peter J. Hicks |
A CMOS general-purpose sampled-data analogue microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings, pp. 417-420, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Christian Jacobi 0002, Daniel Kroening |
Proving the Correctness of a Complete Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GI Jahrestagung ![In: Informatik 2000, Neue Horizonte im neuen Jahrhundert 30. Jahrestagung der Gesellschaft für Informatik Berlin, 19.-22. September 2000., pp. 293-303, 2000, Springer, 978-3-540-67880-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Jayanta Batra, Magdy S. Abadir, Jacob A. Abraham |
A Quick and Inexpensive Method to Identify False Critical Paths Using ATPG Techniques: an Experiment with a PowerPC Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATW ![In: 1st Latin American Test Workshop, LATW 2000, Rio de Janeiro, RJ, Brazil, March 13-15, 2000., pp. 72-76, 2000, IEEE. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
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12 | Teresa L. McLaurin, Frank Frederick |
The testability features of the MCF5407 containing the 4th generation ColdFire(R) microprocessor core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 151-159, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Wei-Cheng Lai, Angela Krstic, Kwang-Ting Cheng |
Test program synthesis for path delay faults in microprocessor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 1080-1089, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Rajesh Raina, Robert Bailey, Dawit Belete, Vikram Khosa, Robert F. Molyneaux, Javier Prado, Ashutosh Razdan |
DFT advances in Motorola's Next-Generation 74xx PowerPCTM microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 131-140, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Teresa L. McLaurin, John C. Potter |
On-the-shelf core pattern methodology for ColdFire(R) microprocessor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 1100-1107, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Farideh Golshan |
Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARC-III microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 141-150, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Anjali Kinra, Hari Balachandran, Regy Thomas, John Carulli |
Logic mapping on a microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 701-710, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe |
Jitter measurements of a PowerPCTM microprocessor using an analytic signal method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 955-964, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Kevin Skadron |
A microprocessor survey course: exploring advanced computer architecture in practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: Proceedings of the 2000 workshop on Computer architecture education, WCAE@ISCA 2000, Vancouver, BC, Canada, June 10, 2000, pp. 3, 2000, ACM, 978-1-4503-4730-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Steven K. Reinhardt |
Integrating hardware and software concepts in a microprocessor-based system design lab. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: Proceedings of the 2000 workshop on Computer architecture education, WCAE@ISCA 2000, Vancouver, BC, Canada, June 10, 2000, pp. 10, 2000, ACM, 978-1-4503-4730-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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12 | Mark Oskin, Frederic T. Chong, Matthew K. Farrens |
HLS: combining statistical and symbolic simulation to guide microprocessor designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 27th International Symposium on Computer Architecture (ISCA 2000), June 10-14, 2000, Vancouver, BC, Canada, pp. 71-82, 2000, IEEE Computer Society, 978-1-58113-232-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Vikram Iyengar, Elizabeth M. Rudnick |
Microprocessor Design Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
The VLSI Handbook ![In: The VLSI Handbook., 1999, CRC Press, 978-0-8493-8593-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Tanay Karnik |
Microprocessor Layout Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
The VLSI Handbook ![In: The VLSI Handbook., 1999, CRC Press, 978-0-8493-8593-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Tzuen-Lih Chern, Jerome Chang, Chien-Hung Chen, Hann-Tzong Su |
Microprocessor-based modified discrete integral variable-structure control for UPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 46(2), pp. 340-348, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Michael Golden, Steve Hesley, Alisa Scherer, Matthew Crowley, Scott C. Johnson, Stephan Meier, Dirk Meyer, Jerry D. Moench, Stuart F. Oberman, Hamid Partovi, Fred Weber, Scott White, Tim Wood 0001, John Yong |
A seventh-generation x86 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1466-1477, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Ramesh Senthinathan, Stephen Fischer, Hamid Rangchi, Hadi Yazdanmehr |
A 650-MHz, IA-32 microprocessor with enhanced data streaming for graphics and video. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1454-1465, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Masakazu Suzuoki, Ken Kutaragi, Toshiyuki Hiroi, Hidetaka Magoshi, Shin'ichi Okamoto, Masaaki Oka, Akio Ohba, Yasuyuki Yamamoto, Makoto Furuhashi, Masayoshi Tanaka, Teiji Yutaka, Toyoshi Okada, Masato Nagamatsu, Yukihiro Urakawa, Masami Funyu, Atsushi Kunimatsu, Harutaka Goto, Kazuhiro Hashimoto, Nobuhiro Ide, Hiroaki Murakami, Yukio Ohtaguro, Akira Aono |
A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1608-1618, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Carmine Nicoletta, Jose Alvarez, Eric Barkin, Chai-Chin Chao, Brad R. Johnson, Franklin M. Lassandro, Paresh Patel, Douglas Reid, Hector Sanchez, Joshua Siegel, Michael Snyder, Steven Sullivan, Scott A. Taylor, Minh Vo |
A 450-MHz RISC microprocessor with enhanced instruction set and copper interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1478-1491, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Hiroyuki Mizuno, Koichiro Ishibashi, Takanori Shimura, Toshihiro Hattori, Susumu Narita, Kenji Shiozawa, Shuji Ikeda, Kunio Uchiyama |
An 18-μA standby current 1.8-V, 200-MHz microprocessor with self-substrate-biased data-retention mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1492-1500, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Sung Bae Park, Young Wug Kim, Young Gun Ko, Kwang Il Kim, Il Kwon Kim, Hee-Sung Kang, Jin Oh Yu, Kwang Pyuk Suh |
A 0.25-μm, 600-MHz, 1.5-V, fully depleted SOI CMOS 64-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1436-1445, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Anthony G. Aipperspach, David H. Allen, Dennis T. Cox, Nghia Phan, Salvatore N. Storino |
A 0.2-μm, 1.8-V, SOI, 550-MHZ, 64-b PowerPC microprocessor with copper interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 34(11), pp. 1430-1435, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Michael J. Flynn, Patrick Hung, Kevin W. Rudd |
Deep submicron microprocessor design issues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 19(4), pp. 11-22, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Timothy J. Slegel, Robert M. Averill III, Mark A. Check, Bruce C. Giamei, Barry Krumm, Christopher A. Krygowski, W. H. Li, John S. Liptay, John D. MacDougall, Thomas J. McPherson, Jennifer A. Navarro, Eric M. Schwarz, Chung-Lung Kevin Shum, Charles F. Webb |
IBM's S/390 G5 microprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 19(2), pp. 12-23, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Richard E. Kessler |
The Alpha 21264 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 19(2), pp. 24-36, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza Reorda |
Fault Injection for Embedded Microprocessor-based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Univers. Comput. Sci. ![In: J. Univers. Comput. Sci. 5(10), pp. 693-711, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Peilin Song, Franco Motika, Daniel R. Knebel, Richard F. Rizzolo, Mary P. Kusko |
S/390 G5 CMOS microprocessor diagnostics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 43(5), pp. 899-914, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Matt Reilly |
Designing an Alpha Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 32(7), pp. 27-34, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Douglas J. Leith, William E. Leithead |
On microprocessor-based arc voltage control for gas tungsten arc welding using gain scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Control. Syst. Technol. ![In: IEEE Trans. Control. Syst. Technol. 7(6), pp. 718-723, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Yasushi Ishikawa, Yasuhisa Kisuki, Tadashi Sakamoto, Tomohiro Hase |
Speech synthesis method based on application-specific synthesis units and its implementation on a 32-bit microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 45(3), pp. 980-985, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Yong Zhang, Kai-Kuang Ma, Qingdong Yao |
A software/hardware co-design methodology for embedded microprocessor core design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Consumer Electron. ![In: IEEE Trans. Consumer Electron. 45(4), pp. 1241-1246, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | Michael J. Flynn |
Basic issues in microprocessor architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 45(12-13), pp. 939-948, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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12 | David H. Albonesi, Israel Koren |
STATS: A framework for microprocessor and system-level design space exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 45(12-13), pp. 1097-1110, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Alessandro De Gloria |
Microprocessor design for embedded system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 45(12-13), pp. 1139-1149, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
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