Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
88 | Wolfgang Günther 0001, Rolf Drechsler |
Efficient manipulation algorithms for linearly transformed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 50-54, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
78 | Ulrich Kühne, Nicole Drechsler |
Finding Compact BDDs Using Genetic Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EvoWorkshops ![In: Applications of Evolutionary Computing, EvoWorkshops 2006: EvoBIO, EvoCOMNET, EvoHOT, EvoIASP, EvoINTERACTION, EvoMUSART, and EvoSTOC, Budapest, Hungary, April 10-12, 2006, Proceedings, pp. 308-319, 2006, Springer, 3-540-33237-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
78 | Marc Berndl, Ondrej Lhoták, Feng Qian, Laurie J. Hendren, Navindra Umanee |
Points-to analysis using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 2003, pp. 103-114, 2003, ACM, 1-58113-662-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
binary decision diagrams, points-to analysis |
78 | Anuchit Anuchitanukul, Zohar Manna, Tomás E. Uribe |
Differential BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer Science Today ![In: Computer Science Today: Recent Trends and Developments, pp. 218-233, 1995, Springer, 3-540-60105-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
78 | Aarti Gupta, Pranav Ashar |
Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 222-225, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
ATPG techniques, circuit similarity, formal verification, combinational circuits, Boolean satisfiability (SAT), combinational equivalence checking, Binary Decision Diagrams (BDDs) |
69 | Rüdiger Ebendt, Rolf Drechsler |
On the sensitivity of BDDs with respect to path-related objective functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
69 | In-Ho Moon, Carl Pixley |
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings, pp. 144-158, 2004, Springer, 3-540-23738-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
68 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Can BDDs compete with SAT solvers on bounded model checking? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 117-122, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
model checking, formal verification, SAT, BDDs |
59 | Graham D. Price, Manish Vachharajani |
Large program trace analysis and compression with ZDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010, pp. 32-41, 2010, ACM, 978-1-60558-635-9. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
parallel programming, trace compression |
59 | Andrei Rimsa, Luis E. Zárate, Mark A. J. Song |
Handling Large Formal Context Using BDD - Perspectives and Limitations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFCA ![In: Formal Concept Analysis, 7th International Conference, ICFCA 2009, Darmstadt, Germany, May 21-24, 2009, Proceedings, pp. 194-209, 2009, Springer, 978-3-642-01814-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept |
59 | Rolf Drechsler, Görschwin Fey, Sebastian Kinder |
An Integrated Approach for Combining BDD and SAT Provers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 237-242, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
59 | Rajeev K. Ranjan 0001, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Binary decision diagrams on network of workstation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 358-364, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
memory resources, breadth-first technique, verification, Boolean functions, synthesis, binary decision diagram, network of workstations |
59 | Graham D. Price, Manish Vachharajani |
A Case for Compressing Traces with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(2), 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
59 | Shin-ichi Minato, Hiroki Arimura |
Efficient Method of Combinatorial Item Set Analysis Based on Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WIRI ![In: 2005 International Workshop on Challenges in Web Information Retrieval and Integration (WIRI 2005), 8-9 April 2005, Tokyo, Japan, pp. 4-11, 2005, IEEE Computer Society, 0-7695-2414-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
59 | Jaco Geldenhuys, Antti Valmari |
Techniques for Smaller Intermediary BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONCUR ![In: CONCUR 2001 - Concurrency Theory, 12th International Conference, Aalborg, Denmark, August 20-25, 2001, Proceedings, pp. 233-247, 2001, Springer, 3-540-42497-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
59 | Jer-Sheng Chen, Prithviraj Banerjee |
Parallel construction algorithms for BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 318-322, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
59 | Reinhard Enders, Thomas Filkorn, Dirk Taubner |
Generating BDDs for Symbolic Model Checking in CCS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 3rd International Workshop, CAV '91, Aalborg, Denmark, July, 1-4, 1991, Proceedings, pp. 203-213, 1991, Springer, 3-540-55179-4. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
58 | Leomar S. da Rosa Jr., Felipe S. Marques 0001, Tiago Muller Gil Cardoso, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis |
Fast disjoint transistor networks from BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2006, Ouro Preto, MG, Brazil, August 28 - September 1, 2006, pp. 137-142, 2006, ACM. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
PTL, unateness, BDDs, switch theory, CMOS gates |
58 | Edmund M. Clarke, Somesh Jha, Yuan Lu 0004, Dong Wang |
Abstract BDDs: A Technique for Using Abstraction in Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings, pp. 172-186, 1999, Springer, 3-540-66559-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Abstract BDDs, Model checking and abstraction |
58 | Silvano Gai, Maurizio Rebaudengo, Matteo Sonza Reorda |
An improved data parallel algorithm for Boolean function manipulation using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), January 25-27, 1995, San Remo, Italy, pp. 33-41, 1995, IEEE Computer Society, 0-8186-7031-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Boolean function manipulation, parallel algorithms, parallel algorithm, Boolean functions, Binary Decision Diagrams, BDDs, SIMD architectures, CPU time, data parallel algorithm |
58 | Jawahar Jain, James R. Bitner, Magdy S. Abadir, Jacob A. Abraham, Donald S. Fussell |
Indexed BDDs: Algorithmic Advances in Techniques to Represent and Verify Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(11), pp. 1230-1245, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
free BDDs, IBDDs, verification, Boolean functions, satisfiability, BDDs, graph representations, OBDDs, canonical representations |
57 | Ingo Wegener |
Comments on "A Characterization of Binary Decision Diagrams". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(3), pp. 383-384, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
EXOR gates, NEXOR gates, free BDDs, ordered BDDs, repeated BDDs, computational complexity, complexity, Boolean functions, binary decision diagrams, decision tables, combinatorial circuits |
49 | Michael Glaß, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich |
Towards scalable system-level reliability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 234-239, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
SAT-assisted simulation, early quantification, reliability analysis |
49 | Ondrej Lhoták, Stephen Curial, José Nelson Amaral |
Using ZBDDs in Points-to Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 20th International Workshop, LCPC 2007, Urbana, IL, USA, October 11-13, 2007, Revised Selected Papers, pp. 338-352, 2007, Springer, 978-3-540-85260-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
49 | Frank Reffel |
BDD-Nodes Can Be More Expressive. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIAN ![In: Advances in Computing Science - ASIAN'99, 5th Asian Computing Science Conference, Phuket, Thailand, December 10-12, 1999, Proceedings, pp. 294-307, 1999, Springer, 3-540-66856-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Chia-Pin R. Liu, Jacob A. Abraham |
Transistor Level Synthesis for Static CMOS Combinational Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 4-6 March 1999, Ann Arbor, MI, USA, pp. 172-175, 1999, IEEE Computer Society, 0-7695-0104-4. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Nils Klarlund |
An n log n Algorithm for Online BDD Refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 9th International Conference, CAV '97, Haifa, Israel, June 22-25, 1997, Proceedings, pp. 107-118, 1997, Springer, 3-540-63166-6. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
49 | Taisuke Sato |
Statistical Learning of Probabilistic BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAGA ![In: Stochastic Algorithms: Foundations and Applications, 5th International Symposium, SAGA 2009, Sapporo, Japan, October 26-28, 2009. Proceedings, pp. 15, 2009, Springer, 978-3-642-04943-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
49 | Constantinos Bartzis, Tevfik Bultan |
Efficient BDDs for bounded arithmetic constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 8(1), pp. 26-36, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Model checking, BDD, Integer arithmetic, SMV |
49 | Rüdiger Ebendt, Wolfgang Günther 0001, Rolf Drechsler |
Minimization of the expected path length in BDDs based on local changes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 865-870, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
49 | Constantinos Bartzis, Tevfik Bultan |
Construction of Efficient BDDs for Bounded Arithmetic Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 9th International Conference, TACAS 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings, pp. 394-408, 2003, Springer, 3-540-00898-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
49 | Gianpiero Cabodi |
Meta-BDDs: A Decomposed Representation for Layered Symbolic Manipulation of Boolean Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 13th International Conference, CAV 2001, Paris, France, July 18-22, 2001, Proceedings, pp. 118-130, 2001, Springer, 3-540-42345-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
49 | Wolfgang Günther 0001, Andreas Hett, Bernd Becker 0001 |
Application of linearly transformed BDDs in sequential verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2001, Asia and South Pacific Design Automation Conference 2001, January 30-February 2, 2001, Yokohama, Japan, pp. 91-96, 2001, ACM, 0-7803-6634-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
49 | Armin Biere, Alessandro Cimatti, Edmund M. Clarke, Yunshan Zhu |
Symbolic Model Checking without BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for Construction and Analysis of Systems, 5th International Conference, TACAS '99, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS'99, Amsterdam, The Netherlands, March 22-28, 1999, Proceedings, pp. 193-207, 1999, Springer, 3-540-65703-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Justin E. Harlow III, Franc Brglez |
Mirror, mirror, on the wall...is the new release any different at all? [BDDs]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 452-455, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Srilatha Manne, Dirk Grunwald, Fabio Somenzi |
Remembrance of Things Past: Locality and Memory in BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 196-201, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
49 | Alan J. Hu, David L. Dill |
Efficient Verification with BDDs using Implicitly Conjoined Invariants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 5th International Conference, CAV '93, Elounda, Greece, June 28 - July 1, 1993, Proceedings, pp. 3-14, 1993, Springer, 3-540-56922-7. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
49 | Alan J. Hu, David L. Dill, Andreas J. Drexler, C. Han Yang |
Higher-Level Specification and Verification with BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, Fourth International Workshop, CAV '92, Montreal, Canada, June 29 - July 1, 1992, Proceedings, pp. 82-95, 1992, Springer, 3-540-56496-9. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
49 | Mats Per Erik Heimdahl, Barbara J. Czerny |
Using PVS to analyze hierarchical state-based requirements for completeness and consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASE ![In: 1st High-Assurance Systems Engineering Workshop (HASE '96), October 22, 1996, Niagara, Canada, Proceedings, pp. 252-262, 1996, IEEE Computer Society, 0-8186-7629-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
hierarchical state based requirements specifications, input sequence, analysis procedures, large real world requirements specification, hierarchical state based language, Requirements State Machine Language, Prototype Verification System, theorem proving component, spurious error reports, formal specifications, robustness, consistency, program verification, completeness, Binary Decision Diagrams, BDDs, PVS, interactive environment, formal proofs, RSML |
49 | Will Marrero |
Using BDDs to Decide CTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 11th International Conference, TACAS 2005, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2005, Edinburgh, UK, April 4-8, 2005, Proceedings, pp. 222-236, 2005, Springer, 3-540-25333-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
validity, satisfiability, BDDs, CTL, tableau |
39 | Ondrej Lhoták, Laurie J. Hendren |
Relations as an abstraction for BDD-based program analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 30(4), pp. 19:1-19:63, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Boolean formula satisfiability, physical domain assignment, Java, program analysis, Binary decision diagrams, language design, relations, points-to analysis |
39 | Gianpiero Cabodi, Marco Murciano |
BDD-Based Hardware Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SFM ![In: Formal Methods for Hardware Verification, 6th International School on Formal Methods for the Design of Computer, Communication, and Software Systems, SFM 2006, Bertinoro, Italy, May 22-27, 2006, Advanced Lectures, pp. 78-107, 2006, Springer, 978-3-540-34304-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Viresh Paruthi, Christian Jacobi 0002, Kai Weber 0001 |
Efficient Symbolic Simulation via Dynamic Scheduling, Don't Caring, and Case Splitting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 13th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings, pp. 114-128, 2005, Springer, 3-540-29105-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Jean-Michel Couvreur |
A BDD-Like Implementation of an Automata Package. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIAA ![In: Implementation and Application of Automata, 9th International Conference, CIAA 2004, Kingston, Canada, July 22-24, 2004, Revised Selected Papers, pp. 310-311, 2004, Springer, 3-540-24318-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
39 | Ondrej Lhoták, Laurie J. Hendren |
Jedd: a BDD-based relational extension of Java. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, Washington, DC, USA, June 9-11, 2004, pp. 158-169, 2004, ACM, 1-58113-807-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
boolean formula satisfiability, Java, program analysis, binary decision diagrams, language design, relations |
39 | Rolf Drechsler, Detlef Sieling |
Binary decision diagrams in theory and practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 3(2), pp. 112-136, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
data structure, Boolean function, Binary decision diagram, VLSI CAD, Branching program |
39 | Jan Friso Groote, Hans Zantema |
Resolution and Binary Decision Diagrams Cannot Simulate Each Other Polynomially. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ershov Memorial Conference ![In: Perspectives of System Informatics, 4th International Andrei Ershov Memorial Conference, PSI 2001, Akademgorodok, Novosibirsk, Russia, July 2-6, 2001, Revised Papers, pp. 33-38, 2001, Springer, 3-540-43075-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
Sibling-substitution-based BDD minimization using don't cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(1), pp. 44-55, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Aarti Gupta, Zijiang Yang 0006, Pranav Ashar, Anubhav Gupta 0001 |
SAT-Based Image Computation with Application in Reachability Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings, pp. 354-371, 2000, Springer, 3-540-41219-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Per Bjesse, Koen Claessen |
SAT-Based Verification without State Space Traversal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings, pp. 372-389, 2000, Springer, 3-540-41219-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan |
Safe BDD Minimization Using Don't Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 208-213, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
39 | Mikko Tiusanen |
Symbolic, Symmetry, and Stubborn Set Searches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Application and Theory of Petri Nets ![In: Application and Theory of Petri Nets 1994, 15th International Conference, Zaragoza, Spain, June 20-24, 1994, Proceedings, pp. 511-530, 1994, Springer, 3-540-58152-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
39 | Markus Behle |
On threshold BDDs and the optimal variable ordering problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comb. Optim. ![In: J. Comb. Optim. 16(2), pp. 107-118, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Threshold BDD, 0/1 integer programming, Optimal variable ordering, Variable ordering spectrum, Binary decision diagram, Knapsack |
39 | Shin-ichi Minato |
A Theoretical Study on Variable Ordering of Zero-Suppressed BDDs for Representing Frequent Itemsets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discovery Science ![In: Discovery Science, 10th International Conference, DS 2007, Sendai, Japan, October 1-4, 2007, Proceedings, pp. 139-150, 2007, Springer, 978-3-540-75487-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Markus Behle |
On Threshold BDDs and the Optimal Variable Ordering Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COCOA ![In: Combinatorial Optimization and Applications, First International Conference, COCOA 2007, Xi'an, China, August 14-16, 2007, Proceedings, pp. 124-135, 2007, Springer, 978-3-540-73555-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Roberto Cavada, Alessandro Cimatti, Anders Franzén, Krishnamani Kalyanasundaram, Marco Roveri, R. K. Shyamasundar |
Computing Predicate Abstractions by Integrating BDDs and SMT Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, 7th International Conference, FMCAD 2007, Austin, Texas, USA, November 11-14, 2007, Proceedings, pp. 69-76, 2007, IEEE Computer Society, 0-7695-3023-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Görschwin Fey, Rolf Drechsler |
Minimizing the number of paths in BDDs: Theory and algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1), pp. 4-11, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Shin-ichi Minato |
Symmetric Item Set Mining Based on Zero-Suppressed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Discovery Science ![In: Discovery Science, 9th International Conference, DS 2006, Barcelona, Spain, October 7-10, 2006, Proceedings, pp. 321-326, 2006, Springer, 3-540-46491-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Carsten Sinz, Armin Biere |
Extended Resolution Proofs for Conjoining BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSR ![In: Computer Science - Theory and Applications, First International Symposium on Computer Science in Russia, CSR 2006, St. Petersburg, Russia, June 8-12, 2006, Proceedings, pp. 600-611, 2006, Springer, 3-540-34166-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Bernd Becker 0001, Markus Behle, Friedrich Eisenbrand, Ralf Wimmer 0001 |
BDDs in a Branch and Cut Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WEA ![In: Experimental and Efficient Algorithms, 4th InternationalWorkshop, WEA 2005, Santorini Island, Greece, May 10-13, 2005, Proceedings, pp. 452-463, 2005, Springer, 3-540-25920-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
39 | Renato E. B. Poli, Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis |
Unified Theory to Build Cell-Level Transistor Networks from BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2003, Sao Paulo, Brazil, September 8-11, 2003, pp. 199-204, 2003, IEEE Computer Society, 0-7695-2009-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
39 | Robert F. Damiano, James H. Kukula |
Checking satisfiability of a conjunction of BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 818-823, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
satisfiability, BDD |
39 | Pascal Fontaine, E. Pascal Gribomont |
Using BDDs with Combinations of Theories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming, Artificial Intelligence, and Reasoning, 9th International Conference, LPAR 2002, Tbilisi, Georgia, October 14-18, 2002, Proceedings, pp. 190-201, 2002, Springer, 3-540-00010-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
39 | Henrik Brosenne, Matthias Homeister, Stephan Waack |
Graph-Driven Free Parity BDDs: Algorithms and Lower Bounds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2001, 26th International Symposium, MFCS 2001 Marianske Lazne, Czech Republic, August 27-31, 2001, Proceedings, pp. 212-223, 2001, Springer, 3-540-42496-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Wolfgang Günther 0001, Rolf Drechsler |
Implementation of Read- k-times BDDs on Top of Standard BDD Packages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 14th International Conference on VLSI Design (VLSI Design 2001), 3-7 January 2001, Bangalore, India, pp. 173-178, 2001, IEEE Computer Society, 0-7695-0831-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Martin Sauerhoff |
An Improved Hierarchy Result for Partitioned BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Comput. Syst. ![In: Theory Comput. Syst. 33(4), pp. 313-329, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Kumar Neeraj Verma, Jean Goubault-Larrecq, Sanjiva Prasad, S. Arun-Kumar |
Reflecting BDDs in Coq. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIAN ![In: Advances in Computing Science - ASIAN 2000, 6th Asian Computing Science Conference, Penang, Malaysia, November 25-27, 2000, Proceedings, pp. 162-181, 2000, Springer, 3-540-41428-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
39 | Wolfgang Günther 0001, Rolf Drechsler |
Minimization of Free BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 323-326, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
39 | Jun Yuan 0007, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz |
Modeling design constraints and biasing in simulation using BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 584-590, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
39 | Jean Goubault, Joachim Posegga |
BDDs and Automated Deduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMIS ![In: Methodologies for Intelligent Systems, 8th International Symposium, ISMIS '94, Charlotte, North Carolina, USA, October 16-19, 1994, Proceedings, pp. 541-550, 1994, Springer, 3-540-58495-1. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
39 | Detlef Sieling, Ingo Wegener |
A Comparison of Free BDDs and Transformed BDDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 19(3), pp. 223-236, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | Tomohiro Yoneda, Hideyuki Hatori, Atsushi Takahara, Shin-ichi Minato |
BDDs vs. Zero-Suppressed BDDs: for CTL Symbolic Model Checking of Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, First International Conference, FMCAD '96, Palo Alto, California, USA, November 6-8, 1996, Proceedings, pp. 435-449, 1996, Springer, 3-540-61937-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
39 | Dirk Beyer 0001 |
Improvements in BDD-Based Reachability Analysis of Timed Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FME ![In: FME 2001: Formal Methods for Increasing Software Productivity, International Symposium of Formal Methods Europe, Berlin, Germany, March 12-16, 2001, Proceedings, pp. 318-343, 2001, Springer, 3-540-41791-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Real-time systems, Formal verification, Timed automata, BDDs, Discretization |
39 | Enric Pastor, Jordi Cortadella |
Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 790-795, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Petri nets, BDDs, symbolic analysis |
39 | Aarti Gupta, Malay K. Ganai, Chao Wang 0001, Zijiang Yang 0006, Pranav Ashar |
Learning from BDDs in SAT-based bounded model checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 824-829, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
BDD learning, learning, SAT, BDDs, bounded model checking, boolean satisfiability, SAT solvers, property checking |
39 | Malay K. Ganai, Adnan Aziz, Andreas Kuehlmann |
Enhancing Simulation with BDDs and ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999., pp. 385-390, 1999, ACM Press. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
simulation, formal verification, coverage, ATPG, BDDs |
29 | Daniel Král |
Polynomial-Size Binary Decision Diagrams for the Exactly Half-d-Hyperclique Problem Reading Each Input Bit Twice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Comput. Syst. ![In: Theory Comput. Syst. 45(1), pp. 27-42, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Free binary decision diagrams, Binary decision diagrams |
29 | Andrei Rimsa, Luis E. Zárate, Mark A. J. Song |
Evaluation of Different BDD Libraries to Extract Concepts in FCA - Perspectives and Limitations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2009, 9th International Conference, Baton Rouge, LA, USA, May 25-27, 2009, Proceedings, Part I, pp. 367-376, 2009, Springer, 978-3-642-01969-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Zero-Supressed Binary Decision Diagrams, Formal Concept Analysis, Binary Decision Diagrams, Formal Context, Formal Concept |
29 | Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown |
Scalable Synthesis and Clustering Techniques Using Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(3), pp. 423-435, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Guoqing Xu 0001, Atanas Rountev |
Merging equivalent contexts for scalable heap-cloning-based context-sensitive points-to analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the ACM/SIGSOFT International Symposium on Software Testing and Analysis, ISSTA 2008, Seattle, WA, USA, July 20-24, 2008, pp. 225-236, 2008, ACM, 978-1-60558-050-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
pointer analysis, context sensitivity, points-to analysis |
29 | Richard Mark Downing |
Evolving Binary Decision Diagrams with Emergent Variable Orderings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPSN ![In: Parallel Problem Solving from Nature - PPSN IX, 9th International Conference, Reykjavik, Iceland, September 9-13, 2006, Procedings, pp. 798-807, 2006, Springer, 3-540-38990-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Koen Claessen, Jan-Willem Roorda |
An Introduction to Symbolic Trajectory Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SFM ![In: Formal Methods for Hardware Verification, 6th International School on Formal Methods for the Design of Computer, Communication, and Software Systems, SFM 2006, Bertinoro, Italy, May 22-27, 2006, Advanced Lectures, pp. 56-77, 2006, Springer, 978-3-540-34304-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Toni Jussila, Carsten Sinz, Armin Biere |
Extended Resolution Proofs for Symbolic SAT Solving with Quantification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT ![In: Theory and Applications of Satisfiability Testing - SAT 2006, 9th International Conference, Seattle, WA, USA, August 12-15, 2006, Proceedings, pp. 54-60, 2006, Springer, 3-540-37206-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Jaco van de Pol, Olga Tveretina |
A BDD-Representation for the Logic of Equality and Uninterpreted Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCS ![In: Mathematical Foundations of Computer Science 2005, 30th International Symposium, MFCS 2005, Gdansk, Poland, August 29 - September 2, 2005, Proceedings, pp. 769-780, 2005, Springer, 3-540-28702-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Marta Z. Kwiatkowska, Gethin Norman, David Parker 0001 |
Probabilistic symbolic model checking with PRISM: a hybrid approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 6(2), pp. 128-142, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Binary decision diagrams, Symbolic model checking, Probabilistic model checking |
29 | HoonSang Jin, Fabio Somenzi |
CirCUs: A Hybrid Satisfiability Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAT (Selected Papers ![In: Theory and Applications of Satisfiability Testing, 7th International Conference, SAT 2004, Vancouver, BC, Canada, May 10-13, 2004, Revised Selected Papers, pp. 211-223, 2004, Springer, 3-540-27829-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Jinbo Huang, Adnan Darwiche |
Toward Good Elimination Orders for Symbolic SAT Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI ![In: 16th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2004), 15-17 November 2004, Boca Raton, FL, USA, pp. 566-573, 2004, IEEE Computer Society, 0-7695-2236-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Maitrali Marik, Ajit Pal |
Energy-aware Logic Synthesis and Technology Mapping for MUX-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 73-78, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Mark G. Karpovsky, Radomir S. Stankovic, Jaakko Astola |
Reduction of Sizes of Decision Diagrams by Autocorrelation Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(5), pp. 592-606, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Logic synthesis, decision diagrams, linear transforms, autocorrelation functions, spectral techniques |
29 | Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, Malay K. Ganai |
Robust Boolean reasoning for equivalence checking and functional property verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(12), pp. 1377-1394, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Per Bjesse |
Industrial Model Checking Based on Satisfiability Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking of Software, 9th International SPIN Workshop, Grenoble, France, April 11-13, 2002, Proceedings, pp. 240, 2002, Springer, 3-540-43477-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Marta Z. Kwiatkowska, Gethin Norman, David Parker 0001 |
Probabilistic Symbolic Model Checking with PRISM: A Hybrid Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 8th International Conference, TACAS 2002, Held as Part of the Joint European Conference on Theory and Practice of Software, ETAPS 2002, Grenoble, France, April 8-12, 2002, Proceedings, pp. 52-66, 2002, Springer, 3-540-43419-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Jan Friso Groote, Jaco van de Pol |
Equational Binary Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LPAR ![In: Logic for Programming and Automated Reasoning, 7th International Conference, LPAR 2000, Reunion Island, France, November 11-12, 2000, Proceedings, pp. 161-178, 2000, Springer. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Christoph Meinel, Harald Sack, Arno Wagner |
WWW.BDD-Portal.ORG: An Experimentation Platform for Binary Decision Diagram Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Experimental Algorithmics ![In: Experimental Algorithmics, From Algorithm Design to Robust and Efficient Software [Dagstuhl seminar, September 2000], pp. 127-138, 2000, Springer, 3-540-00346-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Frank Schmiedle, Wolfgang Günther 0001, Rolf Drechsler |
Dynamic Re-Encoding During MDD Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 239-244, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
variable grouping, MDD, BDD, sifting |
29 | Frank Reffel, Stefan Edelkamp |
Error Detection with Directed Symbolic Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
World Congress on Formal Methods ![In: FM'99 - Formal Methods, World Congress on Formal Methods in the Development of Computing Systems, Toulouse, France, September 20-24, 1999, Proceedings, Volume I, pp. 195-211, 1999, Springer, 3-540-66587-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Marius Bozga, Oded Maler, Stavros Tripakis |
Efficient Verification of Timed Automata Using Dense and Discrete Time Semantics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHARME ![In: Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings, pp. 125-141, 1999, Springer, 3-540-66559-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Kavita Ravi, Fabio Somenzi |
Efficient Fixpoint Computation for Invariant Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 467-, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
Logic synthesis for large pass transistor circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 663-670, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
logic synthesis, BDD, Pass transistor logic |
29 | Ramin Hojati, Sriram C. Krishnan, Robert K. Brayton |
Early Quantification and Partitioned Transition Relations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 12-19, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|