|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 7 occurrences of 7 keywords
|
|
|
Results
Found 23 publication records. Showing 23 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
113 | Xudong Niu, Yan Song, Bo Li, Wei Bian, Yadong Tao, Feng Liu, Jinhua Hu, Yu Chen, Frank He |
Tests on Symmetry and Continuity between BSIM4 and BSIM5. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 263-268, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
BSIM4, BSIM5, CMOS circuit design, symmetry, continuity, compact model |
89 | Simeon Realov, William F. McLaughlin, Kenneth L. Shepard |
On-chip transistor characterization arrays with digital interfaces for variability characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 167-171, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
44 | Domenik Helms, Marko Hoyer, Wolfgang Nebel |
Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 56-65, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | S. Sridharan, Sripriya R. Bandi, Clyde Washburn, Ponnathpur R. Mukund, Jan Kolnik, Ken Paradis, Steve Howard, Jeff Burleson |
A universal common-source and common-drain model for 1-20GHz frequency range. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Ilho Myeong, Juhyun Kim, Hyungwoo Ko, Ickhyun Song, Yongseok Kim, Hyungcheol Shin |
A Simple and Accurate Modeling Method of Channel Thermal Noise Using BSIM4 Noise Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12), pp. 4351-4358, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
32 | Dusan N. Grujic, Mihajlo Bozovic, Milan Savic |
BSIM4 to PSP Model Conversion: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 25(3), pp. 1640011:1-1640011:17, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
32 | Chika Tanaka, Masumi Saitoh, Kensuke Ota, Takayuki Ishikawa, Toshinori Numata |
BSIM4 parameter extraction for tri-gate Si nanowire transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 47, pp. 1-6, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
32 | Dusan N. Grujic, Mihajlo Bozovic, Milan Savic |
BSIM4 to PSP Model Conversion for Passive Mixer IM3 Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 137-142, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
32 | Negin Moezi, Daryoosh Dideban, Binjie Cheng, Scott Roy, Asen Asenov |
Impact of statistical parameter set selection on the statistical compact model accuracy: BSIM4 and PSP case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 44(1), pp. 7-14, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
32 | Fabrizio Ramundo, Paolo Nenzi, Mauro Olivieri |
First integration of MOSFET band-to-band-tunneling current in BSIM4. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 44(1), pp. 26-32, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
32 | Kjell O. Jeppson |
A learning tool MOSFET model: A stepping-stone from the square-law model to BSIM4. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Karlsruhe, Germany, September 9-11, 2013, pp. 39-44, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
32 | Weidong Liu 0002, Chenming Hu |
BSIM4 and MOSFET Modeling For IC Simulation ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2011 |
DOI RDF |
|
32 | Binjie Cheng, Daryoosh Dideban, Negin Moezi, Campbell Millar, Gareth Roy, Xingsheng Wang, Scott Roy, Asen Asenov |
Statistical-Variability Compact-Modeling Strategies for BSIM4 and PSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 27(2), pp. 26-35, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
statistical variability, statistical compact modeling, design and test, MOSFET, mismatch |
32 | Ming-Ta Yang, Yang Du, Charles Teng, Tony Chang, Eugene Worley, Ken Liao, You-Wen Yau, Geoffrey Yeap |
BSIM4-based lateral diode model for LNA co-designed with ESD protection circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 11th International Symposium on Quality of Electronic Design (ISQED 2010), 22-24 March 2010, San Jose, CA, USA, pp. 87-91, 2010, IEEE, 978-1-4244-6455-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
32 | Thomas Noulis, Stilianos Siskos, Gérard Sarrabayrouse |
Analysis and selection criteria of BSIM4 flicker noise simulation models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 36(7), pp. 813-823, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
32 | Thomas Noulis, Stylianos Siskos, Gérard Sarrabayrouse |
Comparison between BSIM4.X and HSPICE flicker noise models in NMOS and PMOS transistors in all operating regions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(8), pp. 1222-1227, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Eric Karl, Dennis Sylvester, David T. Blaauw |
Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 391-395, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Bo Hu, C.-J. Richard Shi |
Improved automatic differentiation method for efficient model compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B. Patil |
Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 188-193, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Chuen M. Tan, Masud H. Chowdhury |
Simultaneous Analysis of Capacitive Coupling and Leakage Noise in Nanometer Scale Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 2004-2007, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Ilia Polian, Sandip Kundu, Jean-Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker 0001 |
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA, pp. 343-348, 2005, IEEE Computer Society, 0-7695-2314-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Deep submicron technology modeling, Resistive bridging faults |
22 | Ge Yang 0004, Zhongda Wang, Sung-Mo Kang |
Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 222-227, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
22 | M. Lee, R. B. Anna, Jui-Chu Lee, Scott M. Parker, Kim M. Newton |
A scalable BSIM3v3 RF model for multi-finger NMOSFETs with ring substrate contact. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 221-224, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #23 of 23 (100 per page; Change: )
|
|