|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 5 occurrences of 5 keywords
|
|
|
|
|
Results
Found 7 publication records. Showing 7 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 173 | Ciji Isen, Lizy K. John, Eugene John |
A Tale of Two Processors: Revisiting the RISC-CISC Debate.  |
SPEC Benchmark Workshop  |
2009 |
DBLP DOI BibTeX RDF |
|
| 141 | You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong-Min Kyung |
Customization of a CISC Processor Core for Low-Power Applications. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
CISC-processor, Complex-instruction, ROM-compile, Low-power-design, Microcode |
| 60 | Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith 0001 |
An approach for implementing efficient superscalar CISC processors. |
HPCA |
2006 |
DBLP DOI BibTeX RDF |
|
| 33 | J. P. C. F. H. Smeets, Willem J. Withagen, M. P. J. Stevens |
Pipelining a memory based CISC processor. |
Microprocessing and Microprogramming |
1990 |
DBLP DOI BibTeX RDF |
|
| 19 | Shail Aditya, Scott A. Mahlke, B. Ramakrishna Rau |
Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats. |
ACM Trans. Design Autom. Electr. Syst. |
2000 |
DBLP DOI BibTeX RDF |
code size minimization, custom templates, instruction format design, noop compression, retargetable assembly, VLIW, design automation, EPIC |
| 19 | Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski |
The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures. |
IEEE Symposium on Computer Arithmetic |
1999 |
DBLP DOI BibTeX RDF |
|
| 19 | Michael Franz |
Technological Steps toward a Software Component Industry. |
Programming Languages and System Architectures |
1994 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #7 of 7 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")
data released under the ODC-BY 1.0 license