|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 519 occurrences of 353 keywords
|
|
|
Results
Found 3879 publication records. Showing 3878 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
97 | David A. Parker, Keshab K. Parhi |
Low-Area/Power Parallel FIR Digital Filter Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 17(1), pp. 75-92, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
89 | David A. Parker, Keshab K. Parhi |
Area-Efficient Parallel FIR Digital Filter Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1996 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '96), August 19-23, 1996, Chicago, IL , USA, pp. 93-111, 1996, IEEE Computer Society, 0-8186-7542-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
84 | Vassilis Paliouras, Thanos Stouraitis |
Area-time performance of VLSI FIR filter architectures based on residue arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 576-583, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
area-time performance optimization, VLSI FIR filter architectures, FIR processors, moduli bases, binary-to-residue conversion complexity, residue-to-binary conversion complexity, multiply-by-constant units, binary structures, performance models, Chinese remainder theorem, residue number system, FIR filters, residue arithmetic |
82 | Pyung-Soo Kim, Myung-Eui Lee |
A New FIR Filter for State Estimation and Its Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 22(5), pp. 779-784, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FIR (finite impulse response) filter, forgetting factor, Kalman filter, least squares, state estimation |
68 | Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh 0001 |
Synthesis of multiplier-less FIR filters with minimum number of additions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1995, San Jose, California, USA, November 5-9, 1995, pp. 668-671, 1995, IEEE Computer Society / ACM, 0-8186-7213-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
MCM based structures, iterative elimination, low pass FIR filters, circuit CAD, FIR filters, network synthesis, optimizing transformations, binary representations |
67 | Pavel Zahradnik, Miroslav Vlcek |
Fast Design of 2-D Narrow Bandstop FIR Filters for Image Enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES ![In: Knowledge-Based Intelligent Information and Engineering Systems, 8th International Conference, KES 2004, Wellington, New Zealand, September 20-25, 2004. Proceedings. Part III, pp. 726-732, 2004, Springer, 3-540-23205-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
bandstop filter, Zolotarev polynomial, equiripple approximation, FIR filter, two-dimensional |
67 | Jongsun Park 0001, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi-Meimand, Yongtao Wang, Kaushik Roy 0001 |
High performance and low power FIR filter design based on sharing multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 295-300, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FIR filter design, computation sharing, conditional capture flip-flop, high performance and low power carry select adder |
66 | Jianping Zhou, Minh N. Do |
Multidimensional Multichannel FIR Deconvolution Using Gröbner Bases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 15(10), pp. 2998-3007, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
66 | Li-Hsun Chen, Oscal T.-C. Chen |
A low-complexity and high-speed Booth-algorithm FIR architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 338-341, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
66 | An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy, Shang-Chieh Liu |
Parallel programmable video co-processor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995, pp. 61-64, 1995, IEEE Computer Society, 0-8186-7310-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
quadrature mirror filters, parallel programmable video co-processor design, computationally intensive data processing, very high data rate, subband filtering, discrete orthogonal transforms, computational speed, multirate FIR/IIR/DT operations, low-power implementation, QMF, parallel architectures, transforms, high-performance, adaptive filters, adaptive filtering, FIR filters, FIR filtering, video signal processing, digital signal processing chips, low-cost, IIR filters, IIR filtering, hardware overhead, video applications, processing speed |
60 | Naushik Sankarayya, Kaushik Roy 0001, Debashis Bhattacharya |
Algorithms for Low Power FIR Filter Realization Using Differential Coefficients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 174-178, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
low power FIR filter realization, differential coefficients, computational reduction, convolution, FIR filters |
60 | Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh 0001 |
Low power realization of FIR filters using multirate architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 370-375, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
low power realization, multirate architectures, computationally efficient implementations, power dissipation reduction, dedicated ASIC implementation, TMS320C2x/C5x programmable DSP, computational complexity, computational complexity, application specific integrated circuits, power analysis, digital filters, FIR filters, FIR filters, digital signal processing chips |
59 | Pavel Zahradnik, Miroslav Vlcek |
Fast Design of Optimal Comb FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES ![In: Knowledge-Based Intelligent Information and Engineering Systems, 8th International Conference, KES 2004, Wellington, New Zealand, September 20-25, 2004. Proceedings. Part III, pp. 733-739, 2004, Springer, 3-540-23205-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
comb filter, narrow band, equiripple approximation, analytical design, recursive algorithm, optimal filter, FIR |
58 | Man-Wai Kwan, Chi-Wah Kok |
FIR zero-forcing equalizer for ISI MIMO channels using space-time modulated codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 5(1), pp. 123-132, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
58 | Jiajia Chen 0002, Chip-Hong Chang, A. Prasad Vinod 0001 |
Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 756-759, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
58 | Imad Barhumi, Geert Leus, Marc Moonen |
Time-varying FIR equalization for doubly selective channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 4(1), pp. 202-214, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
58 | Jerry C.-Y. Kao, C.-F. Su, Allen C.-H. Wu |
High-performance FIR generation based on a timing-driven architecture and component selection method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 759-762, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
58 | Félix Castro, Àngela Nebot, Francisco Mugica |
A soft computing decision support framework to improve the e-learning experience. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SpringSim ![In: Proceedings of the 2008 Spring Simulation Multiconference, SpringSim 2008, Ottawa, Canada, April 14-17, 2008, pp. 781-788, 2008, SCS/ACM, 1-56555-319-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CR-FIR, LR-FIR, fuzzy logic, e-learning, decision support system, soft computing |
52 | Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin |
Design tradeoffs in high speed multipliers and FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 29-32, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
high speed multipliers, high speed FIR filters, modified Booth recoding, pipeline granularity, transistor count, activity factor reduction, guarded evaluation, gate-level pipelining, half-bit level pipelining, bit-level pipelining, delay, clocking, digital filters, FIR filters, multiplying circuits, power dissipation, design tradeoffs, pipeline arithmetic, operation speed |
52 | Jasnau Caeiro, Moisés Piedade |
Errors in the estimation of gradient direction using IIR and FIR implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995, pp. 137-140, 1995, IEEE Computer Society, 0-8186-7310-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
gradient direction filters, digital image gradient direction estimators, noise conditions, edge direction, edge detection, error analysis, FIR filters, FIR filter, IIR filters, IIR filter, estimation errors |
51 | Pavel Zahradnik, Boris Simák, Miroslav Vlcek |
Fast and Robust Analytical Design of Equiripple Comb FIR Filters for Communication Purposes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICN ![In: Seventh International Conference on Networking (ICN 2008), 13-18 April 2008, Cancun, Mexico, pp. 588-593, 2008, IEEE Computer Society, 978-0-7695-3106-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
comb, digital filters, FIR |
51 | Te-Jen Su, Chun-Hsiang Kuo, Wen-Pin Tsai, Cheng-Chih Hou |
A Hybrid of Clonal Selection Algorithm and Frequency Sampling Method for Designing a 2-D FIR Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 274-278, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Clonal Selection Algorithm (CSA), Finite-impulse response (FIR) filters, Frequency Sampling Method (FSM) |
51 | Kayvan Najarian |
A Fixed-Distribution PAC Learning Theory for Neural FIR Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Inf. Syst. ![In: J. Intell. Inf. Syst. 25(3), pp. 275-291, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
nonlinear FIR model, multi-layer feedforward neural networks, m-dependency, PAC learning |
51 | Wanping Huang, Lifang Zhou, Jixin Qian, Longhua Ma |
FIR Frequency Sampling Filters Design Based on Adaptive Particle Swarm Optimization Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (3) ![In: Advances in Natural Computation, First International Conference, ICNC 2005, Changsha, China, August 27-29, 2005, Proceedings, Part III, pp. 289-298, 2005, Springer, 3-540-28320-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
adaptive capacity, frequency sampling filter, evolutionary computation, particle swarm optimization, FIR filter |
51 | Mahesh Mehendale, Somdipta Basu Roy, Sunil D. Sherlekar, G. Venkatesh 0001 |
Coefficient Transformations for Area-Efficient Implementation of Multiplier-less FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 110-115, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
High Level Synthesis-Transformations, FIR Filters |
51 | Mahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh 0001 |
Algorithmic and Architectural Transformations for Low Power Realization of FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 12-17, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Hardware/Software High Level Synthesis, Low Power Design, FIR Filters |
51 | Naushik Sankarayya, Kaushik Roy 0001, Debashis Bhattacharya |
Optimizing computations in a transposed direct form realization of floating-point LTI-FIR systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 120-125, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Differential Coefficients, Sorted Recursive Differences, low-power, filters, DSP, multiplication, FIR |
50 | Qingtang Jiang |
FIR Filter Banks for Hexagonal Data Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 17(9), pp. 1512-1521, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
50 | Angela Sara Cacciapuoti, Giacinto Gelli, Francesco Verde |
FIR Zero-Forcing Multiuser Detection and Code Designs for Downlink MC-CDMA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 55(10), pp. 4737-4751, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
50 | Gorn Tepvorachai, Christos A. Papachristou |
A Configurable FIR Filter Scheme based on an Adaptive Multilayer Network Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 176-183, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
50 | Andre Tkacenko, P. P. Vaidyanathan |
Iterative greedy algorithm for solving the FIR paraunitary approximation problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 54(1), pp. 146-160, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | A. Vijaya Krishna, K. V. S. Hari |
Filter Bank precoding for FIR equalization in high-rate MIMO communications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 54(5), pp. 1645-1652, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Chao Cheng, Keshab K. Parhi |
Further complexity reduction of parallel FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1835-1838, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Jongsun Park 0001, Khurram Muhammad, Kaushik Roy 0001 |
High-performance FIR filter design based on sharing multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(2), pp. 244-253, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Naoyuki Aikawa, Masamitsu Sato |
A design method of low delay lowpass FIR filters with maximally flat characteristics in the passband and the transmission zeros in the stopband. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 405-408, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Gopal Harikumar, Yoram Bresler |
Exact image deconvolution from multiple FIR blurs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Image Process. ![In: IEEE Trans. Image Process. 8(6), pp. 846-862, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
50 | Tak Keung Yeung, Sze-Fong Yau |
A multi-input multi-output adaptive FIR filter with guaranteed convergence for feedforward ANC system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 17-20, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
49 | Liangkung Lin, G. Robert Redinbo |
Efficient fault protection of block gradient-based adaptive filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 359-, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
fault protection, block gradient-based adaptive filters, block processing techniques, sequential implementations, finite word length, fault-tolerant techniques, block adaptive filtering algorithms, fine-grained approach, computational complexity, complexity, fault tolerant computing, signal processing, encoding, adaptive filters, FIR filters, FIR filters, computational power, checksums, encoding scheme, digital signal processing applications |
47 | R. Mahesh 0001, A. Prasad Vinod 0001 |
A New Common Subexpression Elimination Algorithm for Realizing Low-Complexity Higher Order Digital Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2), pp. 217-229, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
47 | Xiaoyan Lu, Xinde Li, Chuanfei Hu, Fir Dunkin, Heqing Li, Shuzhi Sam Ge |
Siamese Transformer for Group Re-Identification via Multiscale Feature Transform and Joint Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 73, pp. 1-10, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
47 | Heqing Li, Xinde Li, Zhentong Zhang, Chuanfei Hu, Fir Dunkin, Shuzhi Sam Ge |
ESUAV-NI: Endogenous Security Framework for UAV Perception System Based on Neural Immunity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Informatics ![In: IEEE Trans. Ind. Informatics 20(1), pp. 732-743, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
47 | Hairui Fang, Jialin An, Bo Sun, Dongsheng Chen, Jingyu Bai, Han Liu, Jiawei Xiang, Wenjie Bai, Dong Wang, Siyuan Fan, Chuanfei Hu, Fir Dunkin, Yingjie Wu |
Empowering intelligent manufacturing with edge computing: A portable diagnosis and distance localization approach for bearing faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Adv. Eng. Informatics ![In: Adv. Eng. Informatics 59, pp. 102246, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
43 | Emmanuel Boutillon, Christian Roland, Marc Sevaux |
Probability-Driven Simulated Annealing for Optimizing Digital FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Adaptive and Multilevel Metaheuristics ![In: Adaptive and Multilevel Metaheuristics, pp. 77-93, 2008, Springer, 978-3-540-79437-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
temperature regulation, simulated annealing, multiobjective optimization, feedback loop, Filter design, FIR |
43 | Biswajit Mishra, Bashir M. Al-Hashimi |
Subthreshold FIR Filter Architecture for Ultra Low Power Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers, pp. 1-10, 2008, Springer, 978-3-540-95947-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Subthreshold design, Minimum Energy Point, Ultra Low Power Design, Leakage, FIR |
43 | Umar Farooq 0009, Muhammad Saleem, Habibullah Jamal |
Parameterized FIR Filtering IP Cores for Reusable SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Third International Conference on Information Technology: New Generations (ITNG 2006), 10-12 April 2006, Las Vegas, Nevada, USA, pp. 554-559, 2006, IEEE Computer Society, 0-7695-2497-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Finite Impulse Response (FIR) filter, Unfolded Direct Form (UDF), Folded Direct Form (FDF), Parameterized, SoC design, IP Core, Synthesis tools |
43 | Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi |
A New Low Latency Parallel FIR Filter Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 39(3), pp. 313-322, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
FIR filters, array multipliers |
43 | F. Aeschlimann, Emmanuel Allier, Laurent Fesquet, Marc Renaudin |
Asynchronous FIR Filters: Towards a New Digital Processing Chain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 19-23 April 2004, Crete, Greece, pp. 198-206, 2004, IEEE Computer Society, 0-7695-2133-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Level-crossing sampling, FIR filter, Speech processing, Asynchronous design, Irregular sampling |
43 | Vagner S. Rosa, Eduardo A. C. da Costa, José C. Monteiro 0001, Sergio Bampi |
An improved synthesis method for low power hardwired FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2004, Pernambuco, Brazil, September 7-11, 2004, pp. 237-241, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA synthesis, parallel FIR filter, power-of-two, common subexpression elimination |
43 | A. Chorevas, Dionysios I. Reisis |
Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 35(2), pp. 179-186, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
VLSI, FIR filter, systolic architectures, QAM |
43 | Nilanjan Mukherjee 0001, Janusz Rajski, Jerzy Tyszer |
Testing Schemes for FIR Filter Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(7), pp. 674-688, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Complex multipliers, sign-extended adders, trees of adders, design for testability, FIR filters, pseudoexhaustive testing, state coverage, cell fault model |
43 | Jason Jianjun Gu, Max Q.-H. Meng, Albert Cook, M. Gary Faulkner |
Analysis of eye tracking movements using FIR median hybrid filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETRA ![In: Proceedings of the Eye Tracking Research & Application Symposium, ETRA 2000, Palm Beach Gardens, Florida, USA, November 6-8, 2000, pp. 65-69, 2000, ACM, 1-58113-280-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
FIR median hybrid filter, electrooculogram, eye movement, eye blink |
42 | HaiQuan Zhao, Jiashu Zhang |
Neural FIR adaptive Laguerre equalizer with a gradient adaptive amplitude for nonlinear channel in communication systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 52(10), pp. 1881-1890, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
decision feedback, nonlinear channel, adaptive equalizer, Laguerre filter, neural network |
42 | Qingtang Jiang |
Orthogonal and Biorthogonal FIR Hexagonal Filter Banks With Sixfold Symmetry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(12), pp. 5861-5873, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
42 | Pramod Kumar Meher, Shrutisagar Chandrasekaran, Abbes Amira |
FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(7-1), pp. 3009-3017, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
42 | Richard Conway 0001 |
Efficient residue arithmetic based parallel fixed coefficient FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1484-1487, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
42 | Anthony G. Constantinides, Wenmin Li |
An Algebraic Approach to the Estimation of the Order of FIR Filters From Complete and Partial Magnitude and Phase Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 55(4), pp. 1213-1222, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Chang-Seok Choi, Hanho Lee |
A Partial Self-Reconfigurable Adaptive FIR Filter System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SiPS ![In: Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China, pp. 204-209, 2007, IEEE, 1-4244-1222-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Da-Zheng Feng, Wei Xing Zheng 0001 |
An Efficient Identification Algorithm for FIR Filtering with Noisy Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 829-832, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Jiaqing Qiao, Ping Fu, Shengwei Meng |
A Combined Optimization Method of Finite Wordlength FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICIC (3) ![In: First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August - 1 September 2006, Beijing, China, pp. 103-106, 2006, IEEE Computer Society, 0-7695-2616-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Yeong-Jae Oh, Hanho Lee, Chong Ho Lee |
Dynamic Partial Reconfigurable FIR Filter Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers, pp. 30-35, 2006, Springer. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Hanho Lee, Chang-Seok Choi |
Implementation of a FIR Filter on a Partial Reconfigurable Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES (3) ![In: Knowledge-Based Intelligent Information and Engineering Systems, 10th International Conference, KES 2006, Bournemouth, UK, October 9-11, 2006, Proceedings, Part III, pp. 108-115, 2006, Springer, 3-540-46542-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Jacek Izydorczyk |
An algorithm for optimal terms allocation for fixed point coefficients of FIR filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Fei Xu, Chip-Hong Chang, Ching-Chuen Jong |
A new integrated approach to the design of low-complexity FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | S. S. Yin, S. C. Chan 0001, Xuemei Xie |
On the theory and design of a class of recombination nonuniform filter banks with low-delay FIR and IIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Ashkan Olyaei, Roman Genov |
Algorithmic Delta-Sigma-modulated FIR filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Yu-Ting Kuo, Tay-Jyi Lin, Yi Cho, Chih-Wei Liu, Chein-Wei Jen |
Programmable FIR filter with adder-based computing engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Gorn Tepvorachai, Christos A. Papachristou |
Self-Configurable Neural Network Processor for FIR Filter Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 15-18 June 2006, Istanbul, Turkey, pp. 114-121, 2006, IEEE Computer Society, 0-7695-2614-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Yongzhi Liu, Zhiping Lin 0001 |
Design of Arbitrary FIR Digital Filters with Group Delay Constraint. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 53-56, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Qiu-Zhong Wu, Yi-He Sun |
An Integrated CAD Tool for ASIC Implementation of Multiplierless FIR Filters with Common Sub-expression Elimination Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESTIMedia ![In: Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, ESTIMedia 2005, September 22-23, 2005, New York Metropolitan Area, USA, pp. 67-72, 2005, IEEE Computer Society, 0-7803-9347-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Sami Karvonen, Juha Kostamovaara |
Charge-domain FIR sampler with programmable filtering coefficients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4425-4428, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Yongzhi Liu, Zhiping Lin 0001 |
Design of complex FIR filters using the frequency-response masking approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2024-2027, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Li-Hsun Chen, Oscal T.-C. Chen |
A hardware-efficient FIR architecture with input-data and tap folding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 544-547, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Markus Hofbauer |
On the FIR Inversion of an Acoustical Convolutive Mixing System: Properties and Limitations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA ![In: Independent Component Analysis and Blind Signal Separation, Fifth International Conference, ICA 2004, Granada, Spain, September 22-24, 2004, Proceedings, pp. 643-651, 2004, Springer, 3-540-23056-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Pavel Zahradnik, Miroslav Vlcek |
Analytical Design of 2-D Narrow Bandstop FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2004, 4th International Conference, Kraków, Poland, June 6-9, 2004, Proceedings, Part IV, pp. 56-63, 2004, Springer, 3-540-22129-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Wei Xing Zheng 0001 |
A least-squares based algorithm for FIR filtering with noisy data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 444-447, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
42 | Xiaojun Wu 0003, Qinye Yin 0001, Jianguo Zhang |
Subspace-based estimation method of uplink FIR channel in MC-CDMA system without cyclic prefix over frequency-selective fading channel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 213-216, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | Shou-Sheu Lin, Wen-Rong Wu |
A low complexity adaptive interpolated FIR echo canceller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 438-441, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
42 | Fathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider |
A programmable low voltage switched-current FIR filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 472-475, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
42 | Sung-Ho Baik, Kyung-Nam Han, E. Yoon |
A 230 MHz 8 tap programmable FIR filter using redundant binary number system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 415-418, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
42 | Tien-Toan Do, Holger Kropp, Carsten Reuter, Peter Pirsch |
A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, pp. 441-445, 1998, Springer, 3-540-64948-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
41 | Trygve Randen, John Håkon Husøy |
Optimal Filter-Bank Design for Multiple Texture Discrimination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (2) ![In: Proceedings 1997 International Conference on Image Processing, ICIP '97, Santa Barbara, California, USA, October 26-29, 1997, pp. 215-218, 1997, IEEE Computer Society, 0-8186-8183-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multiple texture discrimination, optimal filter-bank design, filter response energy measure, texture filtering, multi-texture optimal filter bank design, free parameters, finite impulse response, closed form optimal solution, feature extraction, FIR filters, FIR filters, texture features |
41 | Kei-Yong Khoo, Alan N. Willson Jr. |
Single-transistor transparent-latch clocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 331-341, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
transparent-latch clocking, single-phase clocking scheme, CMOS VLSI designs, single NMOS transistor, allowable width, clock driver, dynamic buffer, architecture-driven voltage scaling, pipelining latches, latch-intensive architectures, filter structures, transposed-form FIR filter, VLSI, flip-flops, clocks, integrated circuit design, digital filters, FIR filters, power dissipation, CMOS digital integrated circuits |
39 | Chengjin Zhang, Robert R. Bitmead |
MIMO Equalization With State-Space Channel Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(10-2), pp. 5222-5231, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
39 | Sai Mohan Kilambi, Behrouz Nowrouzian |
A Diversity Controlled Genetic Algorithm for Optimization of FRM Digital Filters over DBNS Multiplier Coefficient Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2331-2334, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
39 | Riccardo Bernardini, Roberto Rinaldo |
Oversampled filter banks from extended perfect reconstruction filter banks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 54(7), pp. 2625-2635, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Shailesh B. Nerurkar, Khalid H. Abed |
Low-power decimator design using approximated linear-phase N-band IIR filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 54(4), pp. 1550-1553, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
39 | Hyungju Park |
2-D non-separable paraunitary matrices and Grobner bases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 441-444, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Yuriy S. Shmaliy |
An unbiased p-step predictive FIR filter for a class of noise-free discrete-time models with independently observed states. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Signal Image Video Process. ![In: Signal Image Video Process. 3(2), pp. 127-135, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Predictive finite impulse response (FIR) filter, Noise power gain, Synchronization, State estimation |
35 | Xiao-Hua Wang, Yi-Gang He, Tian-Zan Li |
Neural Network Algorithm for Designing FIR Filters Utilizing Frequency-Response Masking Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 24(3), pp. 463-471, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
frequency-response masking, FIR digital filter, neural network, optimal design |
35 | Li-Juan Jia, Ran Tao 0003, Yue Wang 0001, Kiyoshi Wada |
Forward/backward prediction solution for adaptive noisy FIR filtering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 52(6), pp. 1007-1014, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adaptive FIR filtering, bias compensation, forward prediction, backward prediction, recursive least squares algorithm |
35 | Oscar Gustafsson, Saeeid Tahmasbi Oskuii, Kenny Johansson, Per Gunnar Kjeldsberg |
Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings, pp. 526-535, 2007, Springer, 978-3-540-74441-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
dual bit type, coefficient reordering, MAC, FIR filter, switching activity |
35 | Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy 0001 |
A process variation aware low power synthesis methodology for fixed-point FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007, Portland, OR, USA, August 27-29, 2007, pp. 147-152, 2007, ACM, 978-1-59593-709-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fixed-point FIR filters, variation aware, low-power, synthesis |
35 | José A. Tierno, Sergey V. Rylov, Alexander V. Rylyakov, Montek Singh, Steven M. Nowick |
An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 9-11 April 2002, Manchester, UK, pp. 84-95, 2002, IEEE Computer Society, 0-7695-1540-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
PRML read channel, magnetic recording, asynchronous pipeline, digital arithmetic, FIR filter, dynamic logic, high-throughput, low-latency, distributed arithmetic, mixed timing |
35 | M. N. Mahesh, Mahesh Mehendale |
Low Power Realization of Residue Number System Based FIR Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 30-33, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Low power implementation, DSP, Residue Number System(RNS), FIR filters |
35 | Amit Sinha, Mahesh Mehendale |
mproving Area Efficiency of FIR Filters Implemented Using Distributed Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 11th International Conference on VLSI Design (VLSI Design 1991), 4-7 January 1998, Chennai, India, pp. 104-109, 1998, IEEE Computer Society, 0-8186-8224-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
FIR Filters, Distributed Arithmetic, Area Estimation |
34 | Yuriy S. Shmaliy |
Unbiased FIR Filtering of Discrete-Time Polynomial State-Space Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 57(4), pp. 1241-1249, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | David Bowling, Gregory P. Starr |
FIR position profiles using an infinitely continuous kernel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2009 IEEE International Conference on Robotics and Automation, ICRA 2009, Kobe, Japan, May 12-17, 2009, pp. 2836-2843, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Levent Aksoy, Diego Jaccottet, Eduardo Costa 0001 |
Design of low complexity digital FIR filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
low-level synthesis, multiple constant multiplications, multiplierless filter design, high-level synthesis, array multipliers |
34 | Holger Boche, Volker Pohl |
Robustness of the Inner-Outer Factorization and of the Spectral Factorization for FIR Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(1), pp. 274-283, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Runyi Yu 0001, Aryaz Baradarani |
Sampled-Data Design of FIR Dual Filter Banks for Dual-Tree Complex Wavelet Transforms via LMI Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(7-2), pp. 3369-3375, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #100 of 3878 (100 per page; Change: ) Pages: [ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ >>] |
|