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1983-1987 (19) 1988-1990 (29) 1991-1993 (26) 1995 (20) 1996-1997 (23) 1998 (18) 1999 (20) 2000 (27) 2001 (16) 2002 (30) 2003 (22) 2004 (46) 2005 (40) 2006 (50) 2007 (56) 2008 (43) 2009 (28) 2010 (21) 2011 (19) 2012-2013 (55) 2014 (42) 2015 (30) 2016 (27) 2017 (29) 2018 (22) 2019 (15) 2020 (17) 2021 (18) 2022-2023 (27) 2024 (1)
Publication types (Num. hits)
article(245) incollection(4) inproceedings(575) phdthesis(12)
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Found 836 publication records. Showing 836 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
144Sirish A. Kondi, Yoginder S. Dandass Scanning workstation memory for malicious codes using dedicated coprocessors. Search on Bibsonomy ACM Southeast Regional Conference The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FPGA, intrusion detection, coprocessor, signature matching
92Christian Mandl, Adolfo Fucci A fast FPGA based coprocessor supporting hard real-time search. Search on Bibsonomy EUROMICRO The full citation details ... 1997 DBLP  DOI  BibTeX  RDF fast FPGA based coprocessor, hard real time search, dual port memories, programmable message driven multi port memories, sequential requests, data acquisition systems, hard real time requirements, DAC systems, coprocessor architectures, file descriptor table, implementation costs, TI DSP C40, hardware strategy, dual port memory, generic searching coprocessor, field programmable gate arrays, hardware implementation, computer systems, high throughput, searching strategy, design approach, DPMs
90James T. Canning, Richard A. Miner A Parallel Pipelined Data Flow Coprocessor. Search on Bibsonomy ACM Conference on Computer Science The full citation details ... 1989 DBLP  DOI  BibTeX  RDF IBM PC
87Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis Speedups in embedded systems with a high-performance coprocessor datapath. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF coprocessor datapath, synthesis, kernels, Performance improvements, design flow, chaining
87Souichi Okada, Naoya Torii, Kouichi Itoh, Masahiko Takenaka Implementation of Elliptic Curve Cryptographic Coprocessor over GF(2m) on an FPGA. Search on Bibsonomy CHES The full citation details ... 2000 DBLP  DOI  BibTeX  RDF elliptic scalar multiplication over tex2html_wrap_inline100, IEEE P1363, Elliptic curve cryptography (ECC), multiplier, coprocessor, Koblitz curve
79Kris Tiri, David D. Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF security IC, encryption, smart card, side-channel attack, differential power analysis, countermeasure
76Chen-Yong Cher, Michael Gschwind Cell GC: using the cell synergistic processor as a garbage collection coprocessor. Search on Bibsonomy VEE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF BDW, SPU, explicitly managed memory hierarchies, local store, garbage collection, accelerator, SPE, coprocessor, cell, mark-sweep
76Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. Search on Bibsonomy J. Supercomput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Coprocessor data-path, Template units, Performance, Synthesis, Kernels, Design flow, Chaining
76Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede Superscalar Coprocessor for High-Speed Curve-Based Cryptography. Search on Bibsonomy CHES The full citation details ... 2006 DBLP  DOI  BibTeX  RDF curve-based cryptography, HECC, ECC, instruction-level parallelism, scalar multiplication, Superscalar, coprocessor
76Michael J. Schulte, Earl E. Swartzlander Jr. Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1995 DBLP  DOI  BibTeX  RDF arithmetic algorithms, computer arithmetic, hardware, Interval arithmetic, precision, coprocessor, numerical computations
74Chen Huang 0005, Frank Vahid Transmuting coprocessors: dynamic loading of FPGA coprocessors. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF coprocessing, FPGAs, online algorithms, dynamic optimization, acceleration, runtime configuration
71Seng Lin Shee, Sri Parameswaran, Newton Cheung Novel architecture for loop acceleration: a case study. Search on Bibsonomy CODES+ISSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF tightly coupled, architecture, ASIP, hardware/software partitioning, coprocessor, loop optimization, latency hiding, loop pipelining, loop acceleration
69Chen Huang 0005, Frank Vahid Server-side coprocessor updating for mobile devices with FPGAs. Search on Bibsonomy FPGA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF coprocessing, fpgas, dynamic optimization, acceleration
69Ernesto Martins, José Alberto Fonseca Traffic Scheduling Coprocessor with Schedulability Analysis Capability. Search on Bibsonomy DSD The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
69Wayne P. Burleson, Jason Ko, Douglas Niehaus, Krithi Ramamritham, John A. Stankovic, Gary Wallace, Charles C. Weems The spring scheduling coprocessor: a scheduling accelerator. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
66Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. Search on Bibsonomy J. Signal Process. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF coprocessor data-path, template units, kernels, performance improvements, design flow, energy reductions, architectural synthesis
66Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF coprocessor data-path, synthesis, energy savings, performance improvements, design flow
66Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede Microcoded coprocessor for embedded secure biometric authentication systems. Search on Bibsonomy CODES+ISSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF cryptographic biometrics, fingerprint verification., fuzzy vault scheme, microcoded coprocessor
66Wieland Fischer, Jean-Pierre Seifert Increasing the Bitlength of a Crypto-Coprocessor. Search on Bibsonomy CHES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Arithmetical coprocessor, Hardware/Software codesign, Modular multiplication, Hardware architecture
66S. Ramanathan, S. K. Nandy 0001, V. Visvanathan Reconfigurable Filter Coprocessor Architecture for DSP Applications. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF reconfigurable coprocessors, filter coprocessor architecture, systolic architectures and digital signal processing, pipelined architectures, low-power architectures
66Emeka Mosanya, Christof Teuscher, Héctor Fabio Restrepo, Patrick Galley, Eduardo Sanchez CryptoBooster: A Reconfigurable and Modular Cryptographic Coprocessor. Search on Bibsonomy CHES The full citation details ... 1999 DBLP  DOI  BibTeX  RDF FPGA, Cryptography, Reconfiguration, Coprocessor, IDEA
66Michael J. Schulte, Earl E. Swartzlander Jr. A coprocessor for accurate and reliable numerical computations. Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF reliable numerical computations, direct hardware support, logic design, digital arithmetic, interval arithmetic, hardware design, coprocessors, coprocessor, numerical computations
66Anders Kugler, Roger D. Hersch A Scalable Halftoning Coprocessor Architecture. Search on Bibsonomy ASAP The full citation details ... 1995 DBLP  DOI  BibTeX  RDF parallel dithering, coprocessor architecture, Halftoning
63Nathan Woods Integrating FPGAs in high-performance computing: the architecture and implementation perspective. Search on Bibsonomy FPGA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF compute acceleration, high-performance computinghigh-performance computing, reconfigurable computing, co-processor
63Takashi Miyamori, Kunle Olukotun A Quantitative Analysis of Reconfigurable Coprocessors for Multimedia Applications. Search on Bibsonomy FCCM The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
63Emilio Luque, Joan Sorribes, Ana Ripoll Tuning architecture at run-time. Search on Bibsonomy MICRO The full citation details ... 1987 DBLP  DOI  BibTeX  RDF
63Nalini K. Ratha, Anil K. Jain 0001, Diane T. Rover FPGA-Based Coprocessor for Text String Extraction. Search on Bibsonomy CAMP The full citation details ... 2000 DBLP  DOI  BibTeX  RDF FPGA-based coprocessor, text string extraction, image morphology based algorithms, high-performance coprocessor, Splash 2, Sun hosts, VHDL behavioral modeling, SPARC station 20, design patterns, coprocessors, document understanding, visual effects
58Almudena Lindoso, Luis Entrena, Juan Izquierdo, Judith Liu-Jimenez Coarse-grain dynamically reconfigurable coprocessor for image processing in SOPC. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
58Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing. Search on Bibsonomy SAMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
58Ming-che Lai, Kui Dai, Lu Hong-yi, Zhiying Wang 0003 A Novel Data-Parallel Coprocessor for Multimedia Signal Processing. Search on Bibsonomy ICME The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
58Christian Hinkelbein, Andrei Khomich, Andreas Kugel, Reinhard Männer, Matthias Müller 0006 Using of FPGA Coprocessor for Improving the Execution Speed of the Pattern Recognition Algorithm for ATLAS - High Energy Physics Experiment. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
58Miljan Vuletic, Laura Pozzi, Paolo Ienne Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor. Search on Bibsonomy FCCM The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
58Jens Hildebrandt, Dirk Timmermann An FPFA Based Scheduling Coprocessor for Dynamic Priority Scheduling in Hard-Time Systems. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
55Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, Seung-Jae Jeong, Hong-Kyu Kim, Yang-Ho Kim, Bong-Young Chung, Hyung-Lae Roh, H. S. Yang CalmRISCTM: A Low Power Microcontroller with Efficient Coprocessor Interface. Search on Bibsonomy ICCD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF low-power, microcontroller, coprocessor
55Christoph Baumhof A New VLSI Vector Arithmetic Coprocessor for the PC. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1995 DBLP  DOI  BibTeX  RDF accurate dot product, vector arithmetic coprocessor, Long Accumulator
53Yijun Liu, Pinghua Chen, Guobo Xie, Guangcong Liu, Zhenkun Li Evaluating a Low-Power Dual-Core Architecture. Search on Bibsonomy APPT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
50Holger Blume, Hans-Martin Blüthgen, Christiane Henning, Patrick Osterloh, Tobias G. Noll Embedding of Dedicated High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF heterogeneous reconfigurable systems, dedicated ASICs, coprocessor board, CardBus, multimedia applications, text search
50Klaus E. Schauser, Chris J. Scheiman, J. Mitchell Ferguson, Paul Z. Kolano Exploiting the Capabilities of Communications Co-Processors. Search on Bibsonomy IPPS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF inter-computer links, communications coprocessor architecture, dedicated hardware support, user-level message handlers, Split-C, message handling code, Meiko CS-2 platform, synchronization, parallel architectures, local area networks, synchronisation, flexibility, coprocessors, computational power, massively parallel processors, workstation networks, active messages, electronic messaging
50Umakishore Ramachandran, Marvin H. Solomon, Mary K. Vernon Hardware Support for Interprocess Communication. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1990 DBLP  DOI  BibTeX  RDF special-purpose coprocessor, message-based operating system, shared queues, special-purpose smart bus, smart shared memory, generalized timed Petri nets, performance evaluation, Petri nets, protocols, distributed processing, message passing, analytical modeling, interprocess communication, hardware support
48Xu Guo 0001, Patrick Schaumont Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform. Search on Bibsonomy ARC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
48Xu Guo 0001, Junfeng Fan, Patrick Schaumont, Ingrid Verbauwhede Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security. Search on Bibsonomy CHES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
48Jean-Luc Beuchat, Nicolas Brisebarre, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto A Coprocessor for the Final Exponentiation of the eta T Pairing in Characteristic Three. Search on Bibsonomy WAIFI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF final exponentiation, FPGA, hardware accelerator, ? T pairing, characteristic three
48John H. Kelm, Isaac Gelado, Mark J. Murphy, Nacho Navarro, Steven S. Lumetta, Wen-mei W. Hwu CIGAR: Application Partitioning for a CPU/Coprocessor Architecture. Search on Bibsonomy PACT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
48Volker Hampel, Peter Sobe, Erik Maehle Experiences with a FPGA-based Reed/Solomon Encoding Coprocessor. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
48Silvia Franchini, Antonio Gentile, M. Grimaudo, C. A. Hung, Sandro Impastato, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile A Sliced Coprocessor for Native Clifford Algebra Operations. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
48Syed Sajjad Rizvi, Syed N. Hyder, Aasia Riasat Performance Model for a Reconfigurable Coprocessor. Search on Bibsonomy SCSS (1) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
48Yuan-man Tong, Zhiying Wang 0003, Kui Dai, Hongyi Lu Designing Power Analysis Resistant and High Performance Block Cipher Coprocessor Using WDDL and Wave-Pipelining. Search on Bibsonomy Inscrypt The full citation details ... 2006 DBLP  DOI  BibTeX  RDF WDDL, power analysis resistant, block cipher, design flow, Wave-pipelining
48Yijun Liu, Stephen B. Furber A Low Power Embedded Dataflow Coprocessor. Search on Bibsonomy ISVLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
48Hamid Safizadeh, Hamid Noori, Mehdi Sedighi, Ali Jahanian 0001, Neda Zolfaghari Efficient Host-Independent Coprocessor Architecture for Speech Coding Algorithms. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
48Christian Hinkelbein, Andrei Khomich, Andreas Kugel, Reinhard Männer, Matthias Müller 0006 Using an FPGA coprocessor for improving execution speed of TRT-LUT: one of the feature extraction algorithms for ATLAS LVL2 trigger. Search on Bibsonomy FPGA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Feihui Li, Mahmut T. Kandemir Improving Performance of Java Applications Using a Coprocessor. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48He Chuan, Mi Lu, Chuanwen Sun Accelerating Seismic Migration Using FPGA-Based Coprocessor Platform. Search on Bibsonomy FCCM The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
48Romain Kamdem, Alain Fonkoua Coprocessor Synthesis of Multirate System Using Static Scheduling Theory. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2000 DBLP  DOI  BibTeX  RDF scheduling, real time, Codesign, codesign, hardware/software partitioning, target architecture
48Patricia J. Teller, Michael E. Maxwell, Ann Q. Gates Towards the design of a snoopy coprocessor for dynamic software-fault detection. Search on Bibsonomy IPCCC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
48Giuliano Donzellini, Stefano Nervi, Domenico Ponta, Sergio Rossi, Stefano Rovetta Object Oriented ARM7 Coprocessor. Search on Bibsonomy HICSS (3) The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
45Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF FPGA, Elliptic curve cryptography, Reconfigurable hardware, Scalar multiplication, Galois field, Coprocessor
45Tudor Jebelean Design of a systolic coprocessor for rational addition. Search on Bibsonomy ASAP The full citation details ... 1995 DBLP  DOI  BibTeX  RDF systolic coprocessor, rational addition, exact division, field programmable gate arrays, parallel architectures, systolic arrays, digital arithmetic, multiplication, addition, subtraction, rational numbers, GCD
42Arnaud Lagger, Andres Upegui, Eduardo Sanchez, Iván González Self-Reconfigurable Pervasive Platform for Cryptographic Application. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
42Sean W. Smith Outbound authentication for programmable secure coprocessors. Search on Bibsonomy Int. J. Inf. Sec. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Secure coprocessors, Authentication, Trust, Attestation
42Sean W. Smith Outbound Authentication for Programmable Secure Coprocessors. Search on Bibsonomy ESORICS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
42Harald Simmler, L. Levinson, Reinhard Männer Multitasking on FPGA Coprocessors. Search on Bibsonomy FPL The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
39Sébastien Bilavarn, Eric Debes, Pierre Vandergheynst, Jean-Philippe Diguet Processor Enhancements for Media Streaming Applications. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF reconfigurable coprocessor, hardware design space exploration, video coding, codesign, multimedia processing, matching pursuit, software profiling
39Martin Seysen Using an RSA Accelerator for Modular Inversion. Search on Bibsonomy CHES The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Smart card coprocessor, Euclidean algorithm, modular inversion
39Holger Blume, Hans-Martin Blüthgen, Christiane Henning, Patrick Osterloh Integration of High-Performance ASICs into Reconfigurable Systems Providing Additional Multimedia Functionality. Search on Bibsonomy ASAP The full citation details ... 2000 DBLP  DOI  BibTeX  RDF reconfigurable coprocessor board, multimedia, VLSI, DSP, digital signal processing, ASIC, CMOS
39Lijun Gao, Sarvesh Shrivastava, Gerald E. Sobelman Elliptic Curve Scalar Multiplier Design Using FPGAs. Search on Bibsonomy CHES The full citation details ... 1999 DBLP  DOI  BibTeX  RDF FPGA, public-key cryptography, elliptic curves, reconfigurable hardware, scalar multiplication, Galois field, coprocessor
39Robert R. Jueneman A High Speed Manipulation Detection Code. Search on Bibsonomy CRYPTO The full citation details ... 1986 DBLP  DOI  BibTeX  RDF Manipulation Detection Code (MDC), birthday problem attacks, numeric data processor chip, math coprocessor chip, 8087, 80287, authentication, cryptography, digital signature, encryption, Message Authentication Code (MAC), IBM PC, checksums
37Virgil E. Petcu, Alexandru Amaricai, Mircea Vladutiu A Dual-Threaded Architecture for Interval Arithmetic Coprocessor with Shared Floating Point Units. Search on Bibsonomy DDECS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Xia Hong 0002, Ning Hui-ming, Yan Jiang-yu The Realization and Optimization of Secure Hash Algorithm (SHA-1) Based on LEON2 Coprocessor. Search on Bibsonomy CSSE (3) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Jalaj Jain A Scalable and Reconfigurable Coprocessor for Image Composition. Search on Bibsonomy VLSI Design The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Giovanni Busonera, Stefano Carucci, Danilo Pani, Luigi Raffo Self-Organization on Silicon: System Integration of a Fixed-Point Swarm Coprocessor. Search on Bibsonomy NICSO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications. Search on Bibsonomy ICSAMOS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Ying Chen, Simon Y. Chen Cost-Driven Hybrid Configuration Prefetching for Partial Reconfigurable Coprocessor. Search on Bibsonomy IPDPS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Henrik Svensson, Thomas Lenart, Viktor Öwall Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Yijun Liu, Steve B. Furber, Zhenkun Li The Design of a Dataflow Coprocessor for Low Power Embedded Hierarchical Processing. Search on Bibsonomy PATMOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Mariano López-García, Enrique F. Cantó-Navarro FPGA Implementation of a Ridge Extraction Fingerprint Algorithm Based on Microblaze and Hardware Coprocessor. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Nele Mentens, Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede, Bart Preneel Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Guido Bertoni, Luca Breveglieri, Matteo Venturi Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. Search on Bibsonomy PerCom Workshops The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Chuan He, Wei Zhao 0001, Mi Lu Time Domain Numerical Simulation for Transient Waves on Reconfigurable Coprocessor Platform. Search on Bibsonomy FCCM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Matthias Meyer An On-Chip Garbage Collection Coprocessor for Embedded Real-Time Systems. Search on Bibsonomy RTCSA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. Search on Bibsonomy ITCC (2) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF genus 2, parallelism, embedded processor, hardware architecture, hyperelliptic curve, co-processor
37Alireza Hodjat, Patrick Schaumont, Ingrid Verbauwhede Architectural Design Features of a Programmable High Throughput AES Coprocessor. Search on Bibsonomy ITCC (2) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
37Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Meier, Johannes Schemmel, Felix Schürmann Speeding up Hardware Evolution: A Coprocessor for Evolutionary Algorithms. Search on Bibsonomy ICES The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Andrea Pacifici, C. Vendetti, Fabrizio Frescura, Saverio Cacopardi A reconfigurable channel codec coprocessor for software radio multimedia applications. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37Nigel Boston, T. Charles Clancy, Y. Liow, Jonathan E. Webster Genus Two Hyperelliptic Curve Coprocessor. Search on Bibsonomy CHES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Joan G. Dyer, Mark Lindemann, Ronald Perez, Reiner Sailer, Leendert van Doorn, Sean W. Smith, Steve H. Weingart Building the IBM 4758 Secure Coprocessor. Search on Bibsonomy Computer The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Takehiko Kato, Satoru Ito, Jun Anzai, Natsume Matsuzaki A Design for Modular Exponentiation Coprocessor in Mobile Telecommunication Terminals. Search on Bibsonomy CHES The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
37Jens Hildebrandt, Frank Golatowski, Dirk Timmermann Scheduling coprocessor for enhanced least-laxity-first scheduling in hard real-time systems. Search on Bibsonomy ECRTS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
37F. Battini, P. L. Mantovani, Marco Mattavelli Evaluation of a SPARC Board Equipped with the Ada Tasking Coprocessor (ATAC). Search on Bibsonomy Ada-Europe The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
37Joachim Roos Designing a Real-Time Coprocessor for Ada Tasking. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
37Lars Lundberg A Coprocessor for High Performance Multiprocessor Ada Tasking. Search on Bibsonomy Ada-Europe The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
37Joel Boney Goals and tradeoffs in the design of the MC68881 floating point coprocessor. Search on Bibsonomy AFIPS National Computer Conference The full citation details ... 1984 DBLP  DOI  BibTeX  RDF
34Masayuki Yoshino, Katsuyuki Okeya, Camille Vuillaume Unbridle the Bit-Length of a Crypto-coprocessor with Montgomery Multiplication. Search on Bibsonomy Selected Areas in Cryptography The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RSA, smartcard, Montgomery multiplication, crypto-coprocessor
34Gerald Friedl, Marco Platzner, Bernhard Rinner A Special-purpose Coprocessor for Qualitative Simulation. Search on Bibsonomy Euro-Par The full citation details ... 1995 DBLP  DOI  BibTeX  RDF specialized coprocessor, qualitative simulator QSim, FPGA
34Israel Koren, Ofra Zinaty Evaluating Elementary Functions in a Numerical Coprocessor Based on Rational Approximations. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1990 DBLP  DOI  BibTeX  RDF high-precision floating-point numbers, extended double precision format, IEEE standard P754, floating-point numeric coprocessor, fast adder, digital arithmetic, execution time, microprocessor chips, approximation theory, elementary functions, function evaluation, rational approximations, silicon area, fast multiplier
32Pranav S. Vaidya, John Jaehwan Lee, Vijay S. Pai, Miyoung Lee, Sung Jin Hur Symbiote Coprocessor Unit - A Streaming Coprocessor for Data Stream Acceleration. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
32Patrick Schaumont, Doris Ching, Ingrid Verbauwhede An interactive codesign environment for domain-specific coprocessors. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF hardware description language, hardware-software codesign, Cosimulation
32Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. Search on Bibsonomy ICSAMOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik Maehle An adaptive system-on-chip for network applications. Search on Bibsonomy IPDPS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
32Mun-Kyu Lee, Keon Tae Kim, Howon Kim 0001, Dong Kyue Kim Efficient Hardware Implementation of Elliptic Curve Cryptography over GF(pm). Search on Bibsonomy WISA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
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