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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 883 occurrences of 557 keywords
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Results
Found 1206 publication records. Showing 1206 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
118 | Bart Vermeulen, Kees Goossens, Siddharth Umrani |
Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings, pp. 3-12, 2008, IEEE Computer Society, 978-0-7695-3098-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
communication-centric debug, debug, network-on-chip, design for debug |
99 | Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller |
A reconfigurable design-for-debug infrastructure for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 7-12, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
assertion-based debug, at-speed debug, what-if experiments, silicon debug |
95 | Shan Tang, Qiang Xu 0001 |
A multi-core debug platform for NoC-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 870-875, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
91 | Sandeep Kumar Goel, Bart Vermeulen |
Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(4), pp. 407-416, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
scan-based debug, Design-for-Debug (DfD), clock gating, silicon debug, multiple-clock domains |
86 | Kees Goossens, Bart Vermeulen, Remco van Steeden, Martijn T. Bennebroek |
Transaction-Based Communication-Centric Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 95-106, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
83 | Harald P. E. Vranken |
Debug Facilities in the TriMedia CPU64 Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(3), pp. 301-308, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
application debug, VLIW processor, design-for-debug |
82 | Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan |
Online cache state dumping for processor debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 358-363, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cache compression, processor debug, silicon debug, design for debug, post-silicon validation |
78 | Bart Vermeulen, Neal Stollon, Rolf Kühnis, Gary Swoboda, Jeff Rearick |
Overview of Debug Standardization Activities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 258-267, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
78 | Shan Tang, Qiang Xu 0001 |
In-band Cross-Trigger Event Transmission for Transaction-Based Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 414-419, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
78 | Bart Vermeulen, Tom Waayers, Sjaak Bakker |
EEE 1149.1-Compliant Access Architecture for Multiple Core Debug on Digital System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 55-63, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
77 | Mohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya |
Debugging HW/SW interface for MPSoC: video encoder system design case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 908-913, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
hardware-dependant software, hardware-software interface, debug, multiprocessor system-on-chip |
76 | Ehab Anis, Nicola Nicolici |
Interactive presentation: Low cost debug architecture using lossy compression for silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 225-230, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
76 | Desta Tadesse, R. Iris Bahar, Joel Grodstein |
Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 339-344, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Microprocessor Diagnosis, Pass/Fail Region, Maximum Likelihood Estimation, Silicon Debug |
75 | Doug Josephson |
The good, the bad, and the ugly of silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 3-6, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
design for test and debug, debug, validation, characterization |
69 | Todd J. Foster, Dennis L. Lastor, Padmaraj Singh |
First Silicon Functional Validation and Debug of Multicore Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(5), pp. 495-504, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
69 | Klaus D. Maier 0001 |
On-chip debug support for embedded Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 565-568, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
69 | Mustafa M. Tikir, Jeffrey K. Hollingsworth, Guei-Yuan Lueh |
Recompilation for debugging support in a JIT-compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PASTE ![In: Proceedings of the 2002 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, PASTE'02, Charleston, South Carolina, USA, November 18-19, 2002, pp. 10-17, 2002, ACM. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Java virtual machine debugger interface, debug information, dynamic recompilation, field access watch, Java, just-in-time compilation |
67 | Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai Chang |
Visibility enhancement for silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 13-18, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
silicon validation, functional verification, silicon debug |
67 | Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers |
Design-For-Debug in Hardware/Software Co-Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 35-39, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
system integration and test, hardware/software co-design, design validation, design-for-debug |
67 | Ruo Ando, Yoshiyasu Takefuji |
Self Debugging Mode for Patch-Independent Nullification of Unknown Remote Process Infection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANS ![In: Cryptology and Network Security, 4th International Conference, CANS 2005, Xiamen, China, December 14-16, 2005, Proceedings, pp. 85-95, 2005, Springer, 3-540-30849-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
self-debugging mode, real-time nullification, debug register, improved debug exception handler, branchIP recorder |
60 | Ho Fai Ko, Nicola Nicolici |
Algorithms for State Restoration and Trace-Signal Selection for Data Acquisition in Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(2), pp. 285-297, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
60 | Rob Aitken, Erik Jan Marinissen |
Guest Editors' Introduction: Addressing the Challenges of Debug and Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 206-207, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
60 | Bart Vermeulen |
Functional Debug Techniques for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 208-215, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
60 | Andrew B. T. Hopkins, Klaus D. McDonald-Maier |
Debug Support for Hybrid SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 195-202, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
60 | Andrew B. T. Hopkins, Klaus D. McDonald-Maier |
Debug Support Strategy for Systems-on-Chips with Multiple Processor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(2), pp. 174-184, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
multiprocessor systems, System architectures, real-time and embedded systems, debugging aids, integration and modeling |
60 | Jianmin Zhang, Ming Yan 0003, Sikun Li |
Debug Support for Scalable System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 83-87, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
59 | Lian Yu, Changzhu Kong, Lei Xu, Jingtao Zhao, HuiHui Zhang |
Mining Bug Classifier and Debug Strategy Association Rules for Web-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ADMA ![In: Advanced Data Mining and Applications, 4th International Conference, ADMA 2008, Chengdu, China, October 8-10, 2008. Proceedings, pp. 427-434, 2008, Springer, 978-3-540-88191-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
bug mining, bug classification, debug strategy, Chi-square algorithm, SVM, association rule |
59 | Zheng Liang, Juha Plosila, Lu Yan, Kaisa Sere |
On-chip Debug for an Asynchronous Java Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Sixth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2005), 5-8 December 2005, Dalian, China, pp. 312-315, 2005, IEEE Computer Society, 0-7695-2405-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Java, Debug, Embedded, Asynchronous, Co-design |
59 | Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham |
On-chip delay measurement for silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 145-148, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
design for testability, delay fault testing, silicon debug |
57 | Ming-Chang Hsieh, Chih-Tsun Huang |
An embedded infrastructure of debug and trace interface for the DSP platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 866-871, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
embedded debug and trace, compression, embedded processors, digital signal processors, design for debug |
57 | Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel |
Automatic generation of breakpoint hardware for silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 514-517, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
hardware-breakpoints, design-flow, silicon-debug, design-for-debug |
51 | Kwang-Ting (Tim) Cheng |
Effective silicon debug is key for time to money. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 204, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Shan Tang, Qiang Xu 0001 |
A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 416-421, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Joon-Sung Yang, Nur A. Touba |
Enhancing Silicon Debug via Periodic Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 125-133, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
51 | Andrew B. T. Hopkins, Klaus D. McDonald-Maier |
Debug support for embedded processor reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
51 | Xiao Hu, Pengyong Ma, Shuming Chen, Yang Guo, Xing Fang |
TraceDo: An On-Chip Trace System for Real-Time Debug and Optimization in Multiprocessor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, 4th International Symposium, ISPA 2006, Sorrento, Italy, December 4-6, 2006, Proceedings, pp. 806-817, 2006, Springer, 3-540-68067-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
51 | Hari Balachandran, Kenneth M. Butler, Neil Simpson |
Facilitating Rapid First Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 628-637, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Carol Pyron, Rekha Bangalore, Dawit Belete, Jason Goertz, Ashutosh Razdan, Denise Younger |
Silicon Symptoms to Solutions: Applying Design for Debug Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 664-672, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar |
System level design and debug of high-performance embedded media systems (tutorial). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 461, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
50 | Joon-Sung Yang, Nur A. Touba |
Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 345-351, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Trace Buffer Observation Window, Two-Dimensional (2-D) Compaction, Cycling Register, Silicon Debug, MISR |
50 | Stefan Holst, Hans-Joachim Wunderlich |
Adaptive Debug and Diagnosis without Fault Dictionaries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 12th European Test Symposium, ETS 2007, Freiburg, Germany, May 20, 2007, pp. 7-12, 2007, IEEE Computer Society, 978-0-7695-2827-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
VLSI, Test, Debug, Diagnosis |
42 | Yibin Chen, Sean Safarpour, Andreas G. Veneris, João Marques-Silva 0001 |
Spatial and temporal design debug using partial MaxSAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 345-350, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
maximum satisfiability, design debugging |
42 | Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin |
Design, Debug, Deploy: The Creation of Configurable Computing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 53(1-2), pp. 187-196, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CAD for configurable computing, FPGA, design environments, configurable computing |
42 | Tzi-cker Chiueh |
Fast Bounds Checking Using Debug Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 99-113, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
42 | Marc Boule, Jean-Samuel Chenard, Zeljko Zilic |
Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 613-620, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
42 | Mario García-Valderas, Eduardo de la Torre, F. Ariza, Teresa Riesgo |
Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 1057-1061, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Bart Vermeulen, Tom Waayers, Sandeep Kumar Goel |
Core-Based Scan Architecture for Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 638-647, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | Don Douglas Josephson |
The Manic Depression of Microprocessor Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 657-663, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | Sandeep Kumar Goel, Bart Vermeulen |
Hierarchical Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 1103-1110, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | Bulent I. Dervisoglu |
Application of scan hardware and software for debug and diagnostics in a workstation environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(6), pp. 612-620, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
42 | Narasimhaiah Gorla, Alan C. Benander, Barbara A. Benander |
Debugging Effort Estimation Using Software Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(2), pp. 223-231, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
debugging effort estimation, quadratic regressions, style characteristics, V(g), VARS, PARS, Cobol programs, program analyzer, statistical procedures, SAS, statistical analysis system, GOTO usage, IF-ELSE construct, level 88 item usage, paragraph invocation pattern, data name length, debug times, DEST, software metrics, statistical analysis, program testing, program debugging, linear regressions, multiple regressions, LOC |
41 | Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu |
A General Failure Candidate Ranking Framework for Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 352-358, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Silicon Debug |
41 | Matthew W. Heath, Wayne P. Burleson, Ian G. Harris |
Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(12), pp. 1532-1546, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
test, debug, SoC, nondeterminism, GALS, globally asynchronous locally synchronous |
41 | Sung-Boem Park, Subhasish Mitra |
IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 373-378, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
verification, debug, validation, design for debug |
41 | Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu |
Diagnosing Silicon Failures Based on Functional Test Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 94-98, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fault diagnosis, Silicon debug, design for debug |
35 | Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara |
Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 15(7), pp. 790-800, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Borislav Nikolik |
Convergence debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AADEBUG ![In: Proceedings of the Sixth International Workshop on Automated Debugging, AADEBUG 2005, Monterey, California, USA, September 19-21, 2005, pp. 89-98, 2005, ACM, 1-59593-050-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
convergence hypothesis, test dispersion, test diversity, testing, debugging, convergence |
35 | Yukio Okuda |
Panel Synopsis - Diagnosis Meets Physical Failure Analysis: How Long Can We Succeed? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1438, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
35 | Glenn Ammons, David Mandelin, Rastislav Bodík, James R. Larus |
Debugging temporal specifications with concept analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 2003, pp. 182-195, 2003, ACM, 1-58113-662-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
specification debuggers, hierarchical clustering, concept analysis, temporal specifications |
35 | Phyllis G. Frankl, Richard G. Hamlet, Bev Littlewood, Lorenzo Strigini |
Evaluating Testing Methods by Delivered Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 24(8), pp. 586-601, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
statistical testing theory, Reliability, software testing, debugging |
35 | Mansur H. Samadzadeh, Winai Wichaipanitch |
An Interactive Debugging Tool for C Based on Dynamic Slicing and Dicing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the ACM 21th Conference on Computer Science, CSC '93, Indianapolis, IN, USA, February 16-18, 1993, pp. 30-37, 1993, ACM, 0-89791-558-5. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
C |
34 | Miron Abramovici |
In-System Silicon Validation and Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 216-223, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Daniel Stein, Marcus Vetter, Ivo Wolf, Hans-Peter Meinzer |
Konzept und Realisierung eines Zustandsmaschinen-Editors für Interaktionen medizinischer Bildverarbeitung mit Debug-Funktionalität. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Bildverarbeitung für die Medizin ![In: Bildverarbeitung für die Medizin 2008, Algorithmen, Systeme, Anwendungen, Proceedings des Workshops vom 6. bis 8. April 2008 in Berlin, pp. 422-426, 2008, Springer, 978-3-540-78639-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Atanu Chattopadhyay, Zeljko Zilic |
Built-in Clock Skew System for On-line Debug and Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 248-251, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steven J. E. Wilton, Jin Yang 0006 |
BackSpace: Formal Analysis for Post-Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMCAD ![In: Formal Methods in Computer-Aided Design, FMCAD 2008, Portland, Oregon, USA, 17-20 November 2008, pp. 1-10, 2008, IEEE, 978-1-4244-2735-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | K. Schultz, Ketan Paranjape |
SOC Debug Challenges and Tools. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 385-390, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Dmitry Akselrod, Asaf Ashkenazi, Yossi Amon |
Platform independent debug port controller architecture with security protection for multi-processor system-on-chip ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 30-35, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda |
Exploiting an I-IP for both Test and Silicon Debug of Microprocessor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA, pp. 55-62, 2005, IEEE Computer Society, 0-7695-2627-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Albrecht Mayer, Harry Siebert, Klaus D. McDonald-Maier |
Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 148-152, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Baodong Yu, Xuecheng Zou |
The Software/Hardware Co-Debug Environment with Emulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 20-24 July 2004, Banff, Alberta, Canada, pp. 34-38, 2005, IEEE Computer Society, 0-7695-2403-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Charles Njinda |
A Hierarchical DFT Architecture for Chip, Board and System Test/Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1061-1071, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Tim Price, Cameron Patterson |
Reconfigurable Breakpoints for Co-debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings, pp. 473-482, 2001, Springer, 3-540-42499-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
34 | Yiorgos Makris, Alex Orailoglu |
A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings, pp. 339-347, 1999, IEEE Computer Society, 0-7695-0325-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Young-Jun Kwon, Ben Mathew, Hong Hao |
FakeFault: a silicon debug software tool for microprocessor embedded memory arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 727-732, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
34 | Xiao Liu 0011, Qiang Xu 0001 |
Interconnection fabric design for tracing signals in post-silicon validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 352-357, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
trace-based debug, post-silicon validation |
34 | Guillermo Vigueras, Jorge J. Gómez-Sanz, Juan A. Botía Blaya, Juan Pavón |
Using Semantic Causality Graphs to Validate MAS Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innovations in Hybrid Intelligent Systems ![In: Innovations in Hybrid Intelligent Systems, pp. 9-16, 2008, Springer, 978-3-540-74971-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Intelligent agent-based systems, MAS debug, MAS validation |
34 | Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Shing Tsai |
Advanced techniques for RTL debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 362-367, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
simulation, visualization, verification, debug, reasoning |
32 | Jimin Lee, Jae Min Kim, Junho Huh, Jungwoo Kim 0001 |
Software-driven Debug Framework for Embedded RISC-V, that Transparently Emulates the Industry Standard Debug Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2023, Las Vegas, NV, USA, January 6-8, 2023, pp. 1-4, 2023, IEEE, 978-1-6654-9130-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
32 | Inhyuk Choi, Hyunggoy Oh, Young-Woo Lee, Sungho Kang 0001 |
Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 67(12), pp. 1835-1839, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
32 | Pankaj Shanker |
Spatial Debug & Debug Without Re-programming in FPGAs: On-Chip debugging in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, USA, February 21-23, 2016, pp. 3, 2016, ACM, 978-1-4503-3856-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
32 | Kees Goossens, Bart Vermeulen, Ashkan Beyranvand Nejad |
A high-level debug environment for communication-centric debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009, pp. 202-207, 2009, IEEE, 978-1-4244-3781-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
32 | Marc Boule, Jean-Samuel Chenard, Zeljko Zilic |
Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 24th International Conference on Computer Design (ICCD 2006), 1-4 October 2006, San Jose, CA, USA, pp. 294-299, 2006, IEEE, 978-0-7803-9707-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Jorge Luis Lagos-Benites, Michelangelo Grosso, Luca Sterpone, Matteo Sonza Reorda, G. Audisio, M. Pipponzi, Marco Sabatini |
A Low-Cost Emulation System for Fast Co-verification and Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 16th European Test Symposium, ETS 2011, Trondheim, Norway, May 23-27, 2011, pp. 212, 2011, IEEE Computer Society, 978-0-7695-4433-5. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
FPGA, debug, System-on-Chip, co-verification |
32 | Eddie Hung, Steven J. E. Wilton |
Speculative Debug Insertion for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 524-531, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
fpga debug, trace buffer |
32 | Yousef Iskander, Cameron D. Patterson, Stephen D. Craven |
Improved Abstractions and Turnaround Time for FPGA Design Validation and Debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 518-523, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
FPGA, debug, validation |
32 | Steven J. E. Wilton, Chun Hok Ho, Bradley R. Quinton, Philip Heng Wai Leong, Wayne Luk |
A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 1(1), pp. 7:1-7:25, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Field programmable gate array, system-on-chip, integrated circuit, silicon debug |
32 | Stefan Holst, Hans-Joachim Wunderlich |
Adaptive Debug and Diagnosis without Fault Dictionaries. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 13th European Test Symposium, ETS 2008, Verbania, Italy, May 25-29, 2008, pp. 199-204, 2008, IEEE Computer Society, 978-0-7695-3150-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
VLSI, Test, Debug, Diagnosis |
32 | Bart Vermeulen, Tom Waayers, Sjaak Bakker |
Multi-TAP Controller Architecture for Digital System Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(4), pp. 417-424, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
system-chips, IEEE-1149.1, software-debug, design-for-debug, multi-TAP |
26 | Erik Jan Marinissen |
Bugs, moths, grasshoppers, and whales. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 25(3), pp. 288, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Hugo Venturini, Frédéric Riss, Jean-Claude Fernandez, Miguel Santana |
A fully-non-transparent approach to the code location problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 11th International Workshop on Software and Compilers for Embedded Systems, Munich, Germany, March 13-14, 2008, pp. 61-68, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Shantanu Gupta, Florin Sultan, Srihari Cadambi, Franjo Ivancic, Martin Rötteler |
RaceTM: detecting data races using transactional memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 14-16, 2008, pp. 104-106, 2008, ACM, 978-1-59593-973-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
transactional memory, data race detection |
26 | Mi-Young Park, Nguyen Cao Truong Hai, Yong-Kee Jun, Hyuk-Ro Park |
Visualization of Message Races in MPI Parallel Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Seventh International Conference on Computer and Information Technology (CIT 2007), October 16-19, 2007, University of Aizu, Fukushima, Japan, pp. 316-321, 2007, IEEE Computer Society, 978-0-7695-2983-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Katalin Popovici, Xavier Guerin, Frédéric Rousseau 0001, Pier Stanislao Paolucci, Ahmed Amine Jerraya |
Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 28-30 May 2007, Porto Alegre, RS, Brazil, pp. 113-122, 2007, IEEE Computer Society, 978-0-7695-2834-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Brent E. Nelson |
The Mythical CCM: In Search of Usable (and Resuable) FPGA-Based General Computing Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 5-14, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Winai Wichaipanitch, Mansur H. Samadzadeh, Songsri Tangsripairoj |
Development and Evaluation of a Slicing-Based C++ Debugger. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (2) ![In: International Symposium on Information Technology: Coding and Computing (ITCC 2005), Volume 2, 4-6 April 2005, Las Vegas, Nevada, USA, pp. 473-478, 2005, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Slicing and Dicing, Evaluation, Algorithms, Debugging, Dynamic Slicing |
26 | Jonathan Noel Tombs, Miguel Angel Aguirre Echánove, Fernando Muñoz 0001, Vicente Baena Lecuyer, Antonio Jesús Torralba Silgado, A. Fernandez-León, Francisco Tortosa |
The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 1062-1066, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
26 | Kwangyong Lee, Chaedeok Lim, Kisok Kong, Heung-Nam Kim |
A Design and Implementation of a Remote Debugging Environment for Embedded Internet Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Languages, Compilers, and Tools for Embedded Systems, ACM SIGPLAN Workshop LCTES 2000, Vancouver, BC, Canada, June 18, 2000, Proceedings, pp. 199-203, 2000, Springer, 3-540-41781-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
26 | Le-Chun Wu, Rajiv Mirani, Harish Patil, Bruce Olsen, Wen-mei W. Hwu |
A New Framework for Debugging Globally Optimized Code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 1999 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, May 1-4, 1999, pp. 181-191, 1999, ACM, 1-58113-094-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
26 | Ronald Stence |
A New Development Tool with the IEEE-ISTO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 499-502, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
25 | Myoungkyu Song, Eli Tilevich |
The anti-goldilocks debugger: helping the average bear debug transparently transformed programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OOPSLA Companion ![In: Companion to the 24th Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications, OOPSLA 2009, October 25-29, 2009, Orlando, Florida, USA, pp. 811-812, 2009, ACM, 978-1-60558-768-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
bytecode enhancement, debugging, program transformation |
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