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Searching for phrase Design-for-Debug (changed automatically) with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1995-2006 (17) 2007-2013 (15) 2014-2019 (5)
Publication types (Num. hits)
article(7) inproceedings(29) phdthesis(1)
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Found 37 publication records. Showing 37 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
80Shan Tang, Qiang Xu 0001 A multi-core debug platform for NoC-based systems. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
79Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers Design-For-Debug in Hardware/Software Co-Design. Search on Bibsonomy CODES The full citation details ... 1997 DBLP  DOI  BibTeX  RDF system integration and test, hardware/software co-design, design validation, design-for-debug
62Shan Tang, Qiang Xu 0001 In-band Cross-Trigger Event Transmission for Transaction-Based Debug. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
54Miron Abramovici, Paul Bradley, Kumar N. Dwarakanath, Peter Levin, Gérard Memmi, Dave Miller A reconfigurable design-for-debug infrastructure for SoCs. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF assertion-based debug, at-speed debug, what-if experiments, silicon debug
54Carol Pyron, Rekha Bangalore, Dawit Belete, Jason Goertz, Ashutosh Razdan, Denise Younger Silicon Symptoms to Solutions: Applying Design for Debug Techniques. Search on Bibsonomy ITC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
46Bart Vermeulen Functional Debug Techniques for Embedded Systems. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
40Rolf Ernst, Kees A. Vissers, Pieter van der Wolf, Gert-Jan van Rootselaar System level design and debug of high-performance embedded media systems (tutorial). Search on Bibsonomy ICCAD The full citation details ... 1999 DBLP  BibTeX  RDF
38Yiorgos Makris, Alex Orailoglu A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths. Search on Bibsonomy DFT The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
36Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai Chang Visibility enhancement for silicon debug. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF silicon validation, functional verification, silicon debug
20Bart Vermeulen, Sandeep Kumar Goel Design for Debug: Catching Design Errors in Digital Chips. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
20Gustavo R. Alves, José Manuel Martins Ferreira From Design-for-Test to Design-for-Debug-and-Test: Analysis of Requirements and Limitations for 1149.1. Search on Bibsonomy VTS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
19Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan Online cache state dumping for processor debug. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF cache compression, processor debug, silicon debug, design for debug, post-silicon validation
19Bart Vermeulen, Kees Goossens, Siddharth Umrani Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip. Search on Bibsonomy NOCS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF communication-centric debug, debug, network-on-chip, design for debug
19Sung-Boem Park, Subhasish Mitra IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF verification, debug, validation, design for debug
19Ming-Chang Hsieh, Chih-Tsun Huang An embedded infrastructure of debug and trace interface for the DSP platform. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF embedded debug and trace, compression, embedded processors, digital signal processors, design for debug
19Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu Diagnosing Silicon Failures Based on Functional Test Patterns. Search on Bibsonomy MTV The full citation details ... 2006 DBLP  DOI  BibTeX  RDF fault diagnosis, Silicon debug, design for debug
19Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel Automatic generation of breakpoint hardware for silicon debug. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF hardware-breakpoints, design-flow, silicon-debug, design-for-debug
19Sandeep Kumar Goel, Bart Vermeulen Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. Search on Bibsonomy J. Electron. Test. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF scan-based debug, Design-for-Debug (DfD), clock gating, silicon debug, multiple-clock domains
19Bart Vermeulen, Tom Waayers, Sjaak Bakker Multi-TAP Controller Architecture for Digital System Chips. Search on Bibsonomy J. Electron. Test. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF system-chips, IEEE-1149.1, software-debug, design-for-debug, multi-TAP
19Harald P. E. Vranken Debug Facilities in the TriMedia CPU64 Architecture. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF application debug, VLIW processor, design-for-debug
19Jayabrata Ghosh-Dastidar, Nur A. Touba A Rapid and Scalable Diagnosis Scheme for BIST Environments with a Large Number of Scan Chains. Search on Bibsonomy VTS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF built-in self-test Scan Chains, Design-for-Diagnosis, Multi-Input Signature Register, Design-for-Testability, LFSR, Integrated Circuits, Integrated Circuits, Digital Testing, Design-for-Debug
18Neetu Jindal, Sandeep Chandran, Preeti Ranjan Panda, Sanjiva Prasad, Abhay Mitra, Kunal Singhal, Shubham Gupta, Shikhar Tuli DHOOM: Reusing Design-for-Debug Hardware for Online Monitoring. Search on Bibsonomy DAC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
18Sabyasachi Deyati Scalable algorithms and design for debug hardware for test, validation and security of mixed signal/rf circuits and systems. Search on Bibsonomy 2017   RDF
18Abhishek Basak, Swarup Bhunia, Sandip Ray Exploiting design-for-debug for flexible SoC security architecture. Search on Bibsonomy DAC The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
18Jerry Backer, David Hély, Ramesh Karri Secure design-for-debug for Systems-on-Chip. Search on Bibsonomy ITC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
18Chia-Yi Lee, Tai-Hung Li, Tai-Chen Chen Design-for-debug routing for FIB probing. Search on Bibsonomy DATE The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
18John Giacobbe Physical design for debug: insurance policy for IC's. Search on Bibsonomy ISPD The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
18Ho Fai Ko, Adam B. Kinsman, Nicola Nicolici Design-for-Debug Architecture for Distributed Embedded Logic Analysis. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Kuo-An Chen, Tsung-Wei Chang, Meng-Chen Wu, Mango Chia-Tso Chao, Jing-Yang Jou, Sonair Chen Design-for-debug layout adjustment for FIB probing and circuit editing. Search on Bibsonomy ITC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
18Nicola Nicolici, Ho Fai Ko Design-for-debug for post-silicon validation: Can high-level descriptions help? Search on Bibsonomy HLDVT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
18Hyunbean Yi, Sungju Park, Sandip Kundu A Design-for-Debug (DfD) for NoC-Based SoC Debugging via NoC. Search on Bibsonomy ATS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
18Prawat Nagvajara, Baris Taskin Design-for-Debug: A Vital Aspect in Education. Search on Bibsonomy MSE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Hong Hao, Rick Avra Structured Design-for-Debug - The SuperSPARCTM II Methodology and Implementation. Search on Bibsonomy ITC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
18Young-Jun Kwon, Ben Mathew, Hong Hao FakeFault: a silicon debug software tool for microprocessor embedded memory arrays. Search on Bibsonomy ITC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
11Jaehoon Song, Hyunbean Yi, Juhee Han, Sungju Park An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips. Search on Bibsonomy Asia-Pacific Computer Systems Architecture Conference The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Embedded System, Wrapper, Boundary Scan, Test Access Mechanism, SoC Testing
11Ming Zhang 0017, Subhasish Mitra, T. M. Mak, Norbert Seifert, Nicholas J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel Sequential Element Design With Built-In Soft Error Resilience. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
9David Castells-Rufas, Jordi Carrabina Jumble: A Hardware-in-the-Loop Simulation System for JHDL. Search on Bibsonomy FCCM The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
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