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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 30 occurrences of 25 keywords
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Results
Found 10 publication records. Showing 9 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
224 | C. P. Ravikumar, Gurjeet S. Saund, Nidhi Agrawal |
A STAFAN-like functional testability measure for register-level circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 192-198, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
functional testability measure, register-level circuits, testability analysis programs, SCOAP, gate-level digital circuits, testability-driven synthesis, busses, F-STAFAN, Sun/SPARC workstation, performance evaluation, fault diagnosis, logic testing, high-level synthesis, statistical analysis, design for testability, fault simulation, fault coverage, circuit analysis computing, adders, multipliers, multiplexers, digital circuit, shift registers, logic gates, reliability theory, stuck-at fault model |
58 | Zaifu Zhang, Robert D. McLeod, Gregory E. Bridges |
Statistical estimation of delay fault detectabilities and fault grading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 184-187, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
delay fault detectabilities, fault grading, STAFAN, transition observabilities, fanout stems, fanout free region, gate line transition controllabilities, VLSI, fault diagnosis, logic testing, logic testing, statistical analysis, fault coverage, benchmark circuits, statistical estimation |
51 | Masahisa Nakazawa, Susumu Nitta, Kanji Hirabayashi |
Probabilistic fault grading based on activation checking and observability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 1(3), pp. 235-238, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
activation checking, fault-free simulation, fault grading, statistical fault analysis, controllability, observability, detectability |
51 | Michael Brühan, Reinhold Kröger, Stafan Ruppert |
Monitoring verteilter CORBA-Anwendungen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MMB (Kurzbeiträge) ![In: MMB '97, Messung, Modellierung und Bewertung von Rechen- und Kommunikationssystemen, 9. ITG/GI-Fachtagung, 17.-19. September 1997, Freiberg, Germany, Kurzbeiträge und Toolbeschreibungen, pp. 43-50, 1997, TU Bergakademie Freiberg, 3-86012-045-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP BibTeX RDF |
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39 | Joan Villoldo, Prathima Agrawal, Vishwani D. Agrawal |
Stafan Algorithms for MOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD '91, Cambridge, MA, USA, October 14-16, 1991, pp. 56-59, 1991, IEEE Computer Society, 0-8186-2270-9. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
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39 | Vishwani D. Agrawal |
STAFAN Takes a Middle Course. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings International Test Conference 1985, Philadelphia, PA, USA, November 1985, pp. 796, 1985, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP BibTeX RDF |
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39 | Sunil K. Jain, Vishwani D. Agrawal |
STAFAN: An alternative to fault simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 21st Design Automation Conference, DAC '84, Albuquerque, New Mexico, June 25-27, 1984, pp. 18-23, 1984, ACM/IEEE, 0-8186-0542-1. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP BibTeX RDF |
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25 | Zaifu Zhang, Robert D. McLeod, Gregory E. Bridges |
Statistical estimation of delay fault detectabilities and fault grading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(1), pp. 47-60, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
transition delay and path delay faults, statistical delay fault analysis, fault detectabilities, fault coverage, random patterns |
25 | Peter Odryna, Kevin Nazareth, Carl Christensen |
A workstation-mixed model circuit simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 186-192, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
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