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Publication years (Num. hits)
1995-2003 (26) 2004 (22) 2005 (36) 2006 (34) 2007 (28) 2008 (20) 2009 (26) 2010 (27) 2011 (17) 2012 (16) 2013 (18) 2014-2015 (22) 2016-2018 (18) 2019-2022 (74) 2023 (66)
Publication types (Num. hits)
article(69) inproceedings(371) phdthesis(8) proceedings(2)
Venues (Conferences, Journals, ...)
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The graphs summarize 197 occurrences of 123 keywords

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Found 450 publication records. Showing 450 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
140Milos Krstic, Eckhard Grass, Frank K. Gürkaynak, Pascal Vivet Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF asynchronous/synchronous operation, VLSI, interfaces, GALS
114Xin Jia, Ranga Vemuri Using GALS architecture to reduce the impact of long wire delay on FPGA performance. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
100Ari Kulmala, Timo D. Hämäläinen, Marko Hännikäinen Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA. Search on Bibsonomy DSD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
87Michael Kishinevsky, Sandeep K. Shukla, Ken S. Stevens Guest Editors' Introduction: GALS Design and Validation. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF design, synchronous, validation, asynchronous
87Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner GALS at ETH Zurich: Success or Failure. Search on Bibsonomy ASYNC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
87Milos Krstic, Eckhard Grass, Christian Stahl Request-Driven GALS Technique for Wireless Communication System. Search on Bibsonomy ASYNC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
81Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only). Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
81Mehrdad Najibi, Kamran Saleh, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
79Paul Teehan, Mark R. Greenstreet, Guy G. Lemieux A Survey and Taxonomy of GALS Design Styles. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF globally asynchronous, locally synchronous (GALS), clock domains, pausible clocks, loosely synchronous, synchronization, asynchronous
79Matthew W. Heath, Wayne P. Burleson, Ian G. Harris Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2005 DBLP  DOI  BibTeX  RDF test, debug, SoC, nondeterminism, GALS, globally asynchronous locally synchronous
74Eckhard Grass, Frank Winkler 0001, Milos Krstic, Alexandra Julius, Christian Stahl, Maxim Piz Enhanced GALS Techniques for Datapath Applications. Search on Bibsonomy PATMOS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
73Kamran Saleh, Mehrdad Najibi, Mohsen Naderi, Hossein Pedram, Mehdi Sedighi A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF on-chip clock generation, FPGA, GALS
73Diana Marculescu, Emil Talpes Variability and energy awareness: a microarchitecture-level perspective. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF GALS design, power consumption, variability
73Alain Girault, Clément Ménier Automatic Production of Globally Asynchronous Locally Synchronous Systems. Search on Bibsonomy EMSOFT The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Globally synchronous-locally asynchronous (GALS), asynchronous communications, hardware/software codesign, distributed architectures, synchronous circuits, automatic distribution
67Anoop Iyer, Diana Marculescu Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors. Search on Bibsonomy ISCA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
66Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC. Search on Bibsonomy NOCS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Pausable clock, Vdd Hopping, Network-on-Chip, power, DVFS, GALS
60Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou High Rate Data Synchronization in GALS SoCs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
60Sandeep K. Shukla, Michael Theobald Special issue on formal methods for globally asynchronous and locally synchronous (GALS) systems. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
60Ari Kulmala, Timo D. Hämäläinen, Marko Hännikäinen Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA. Search on Bibsonomy FPL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
60Milos Krstic, Eckhard Grass BIST Technique for GALS Systems. Search on Bibsonomy DSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
59Avinash Malik, Zoran A. Salcic, Alain Girault, Adam Walker, Sung Chul Lee A customizable multiprocessor for Globally Asynchronous Locally Synchronous execution. Search on Bibsonomy JTRES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF synchronous and asynchronous concurrency, multiprocessor, GALS, reactivity
59Adhir Upadhyay, Syed Rafay Hasan, Mohamed Nekili Optimal partitioning of globally asychronous locally synchronous processor arrays. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF VLSI, partitioning, power optimization, GALS
54Zhiyi Yu, Bevan M. Baas Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems. Search on Bibsonomy ISVLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
54Matthew W. Heath, Wayne P. Burleson, Ian G. Harris Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
52Luis A. Plana, Stephen B. Furber, Steve Temple, Muhammad Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang A GALS Infrastructure for a Massively Parallel Multiprocessor. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF massively parallel multiprocessor, Spinnaker, self-timed interconnect, GALS, neural modeling
52Carlos Fernández, Rajkumar K. Raval, Chris J. Bleakley GALS SoC interconnect bus for wireless sensor network processor platforms. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF SoC bus, application specific bus, system on chip bus, WSN, wireless sensor network, low power, GALS
52Supratik Chakraborty, Joycee Mekie, Dinesh K. Sharma Reasoning about synchronization in GALS systems. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Symbolic timing analysis, GALS systems, Multi-clocked systems, Symbolic delay constraints, Synchronization constraints, Sequencing constraints
52Grigorios Magklis, Pedro Chaparro, José González 0002, Antonio González 0001 Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF MCD, energy efficiency, DVS, microarchitecture, GALS
47Nicolas Coste, Holger Hermanns, Etienne Lantreibecq, Wendelin Serwe Towards Performance Prediction of Compositional Models in Industrial GALS Designs. Search on Bibsonomy CAV The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
47Hubert Garavel, Damien Thivolle Verification of GALS Systems by Combining Synchronous Languages and Process Calculi. Search on Bibsonomy SPIN The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
47Abbas Sheibanyrad, Alain Greiner, Ivan Miro Panades Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
47Ryo Watanabe, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura, Takashi Nanya Interactive presentation: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
47Hiroshi Sasaki 0001, Masaaki Kondo, Hiroshi Nakamura Dynamic Instruction Cascading on GALS Microprocessors. Search on Bibsonomy PATMOS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
47Jerome Quartana, Laurent Fesquet, Marc Renaudin Modular Asynchronous Network-on-Chip: Application to GALS Systems Rapid Prototyping. Search on Bibsonomy VLSI-SoC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
47Christian Stahl, Wolfgang Reisig, Milos Krstic Hazard Detection in a GALS Wrapper: A Case Study. Search on Bibsonomy ACSD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
47S. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi A Toolset for Modelling and Verification of GALS Systems. Search on Bibsonomy CAV The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
47Sonia López, Oscar Garnica, José Manuel Colmenar Enhancing GALS Processor Performance Using Data Classification Based on Data Latency. Search on Bibsonomy PATMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
47Steven G. Dropsho, Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott Dynamically Trading Frequency for Complexity in a GALS Microprocessor. Search on Bibsonomy MICRO The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
47Milos Krstic, Eckhard Grass New GALS Technique for Datapath Architectures. Search on Bibsonomy PATMOS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
46Jean-Michel Chabloz, Ahmed Hemani Distributed DVFS using rationally-related frequencies and discrete voltage levels. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF GRLS, DVFS, GALS
46Tomi Westerlund, Juha Plosila Time Aware Modelling and Analysis of Multiclocked VLSI Systems. Search on Bibsonomy ICFEM The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Timed Action Systems, formal methods, time, GALS
46Venkata Syam P. Rapaka, Diana Marculescu A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF issue window design, mixed-clock circuits, GALS
46Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters, Paul Wielage Clock Synchronization through Handshake Signalling. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF GALS systems, pausible clocks, asynchronous crossbar/bus, processor/memory architectures
40Avinash Malik, Zoran A. Salcic, Partha S. Roop SystemJ compilation using the tandem virtual machine approach. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF SystemJ, compilation, virtual machines, System-level design, esterel
40Kwang-Ting (Tim) Cheng Combining synchronous and asynchronous timing schemes for high-performance systems. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF high-performance systems, synchronous, asynchronous, DAC, ITC
40Daniele Mangano, G. Falconeri, Carlo Pistritto, Alberto Scandurra Effective full-duplex Mesochronous Link Architecture for Network-on-Chip Data-Link layer. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Julian J. H. Pontes, Rafael Soares, Ewerson Carvalho, Fernando Moraes 0001, Ney Calazans SCAFFI: An intrachip FPGA asynchronous interface based on hard macros. Search on Bibsonomy ICCD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
40Milos Krstic, Eckhard Grass GALSification of IEEE 802.11a Baseband Processor. Search on Bibsonomy PATMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
40Chia-Chih Kuo, Kuan-Yu Chen GALs: 基於對抗式學習之整列式摘要法 (GALs: A GAN-based Listwise Summarizer). Search on Bibsonomy ROCLING The full citation details ... 2019 DBLP  BibTeX  RDF
40Lina Marsso On Model-based Testing of GALS Systems. (Etude de génération de tests à partir d'un modèle pour les systèmes GALS). Search on Bibsonomy 2019   RDF
40Muhammad Nadeem, HeeJong Park 0001, Zhenmin Li, Morteza Biglari-Abhari, Zoran Salcic GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems. Search on Bibsonomy ARCS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
40Wei-Tsun Sun, Zoran Salcic GALS-Designer: A design framework for GALS software systems. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
40Muhammad Nadeem, Morteza Biglari-Abhari, Zoran Salcic GALS-JOP: A Java Embedded Processor for GALS Reactive Programs. Search on Bibsonomy DASC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
40Nicolas Coste Towards Performance Prediction of Compositional Models in GALS Designs. (Vers la prédiction de performance de modèles compositionnels dans les architectures GALS). Search on Bibsonomy 2010   RDF
40Yue Ma 0004 Compositional modeling of globally asynchronous locally synchronous (GALS) architectures in a polychronous model of compotation. (Modélisation compositionnelle d'architectures globalement asynchrones - localement synchrones (GALS) dans un modèle de calcul polychrone). Search on Bibsonomy 2010   RDF
39Rafael Iankowski Soares, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Philippe Maurine, Lionel Torres A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF cryptography attacks, DPA, asynchronous, SCA, GALS, design and test, DEMA
39Peter Zipf, Heiko Hinkelmann, Adeel Ashraf, Manfred Glesner A switch architecture and signal synchronization for GALS system-on-chips. Search on Bibsonomy SBCCI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF NoC switch, clock stretching, synchronization, GALS
33Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla A Trace-Based Framework for Verifiable GALS Composition of IPs. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
33Artur L. Sobczyk, Arkadiusz W. Luczyk, Witold A. Pleskacz Controllable Local Clock Signal Generator for Deep Submicron GALS Architectures. Search on Bibsonomy DDECS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
33Prashant Dubey, Akhil Garg 0001, Sravan Kumar Bhaskarani GALS Based Shared Test Architecture for Embedded Memories. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Ümit Y. Ogras, Radu Marculescu, Puru Choudhary, Diana Marculescu Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Abbas Sheibanyrad, Alain Greiner Two Efficient Synchronous Û Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures. Search on Bibsonomy PATMOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Edith Beigné, Pascal Vivet Design of On-chip and Off-chip Interfaces for a GALS NoC Architecture. Search on Bibsonomy ASYNC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma, Girish Venkataramani, P. S. Thiagarajan Interface Design for Rationally Clocked GALS Systems. Search on Bibsonomy ASYNC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Xin Jia, Ranga Vemuri Studying a GALS FPGA architecture using a parameterized automatic design flow. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Yongkang Zhu, David H. Albonesi Synergistic temperature and energy management in GALS processor architectures. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF dynamic temperature management (DTM), dynamic voltage scaling (DVS)
33Swarup Bhunia, Animesh Datta, Nilanjan Banerjee, Kaushik Roy 0001 GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Asynchronous/synchronous operations, fault tolerance, energy-aware systems, algorithms implemented in hardware
33Animesh Datta, Swarup Bhunia, Nilanjan Banerjee, Kaushik Roy 0001 A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks. Search on Bibsonomy ISQED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
33Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou Data Synchronization Issues in GALS SoCs. Search on Bibsonomy ASYNC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott, Steven G. Dropsho, Sandhya Dwarkadas Hiding Synchronization Delays in a GALS Processor Microarchitecture. Search on Bibsonomy ASYNC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33George S. Taylor, Simon W. Moore, Robert D. Mullins, Peter Robinson 0001 Point to Point GALS Interconnect. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
32Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, Omar Sattari, Michael A. Lai, Jeremy W. Webb, Eric W. Work, Tinoosh Mohsenin, Bevan M. Baas Architecture and Evaluation of an Asynchronous Array of Simple Processors. Search on Bibsonomy J. Signal Process. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF programmable DSP, digital signal processing, DSP, multi-core, array processor, GALS, many-core, chip multi-processor, globally asynchronous locally synchronous
32Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF multiple outstanding transactions, in-order/out-of-order transaction completion, asynchronous on-chip bus, GALS
32Dumitru Potop-Butucaru, Benoît Caillaud, Albert Benveniste Concurrency in Synchronous Systems. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Globally asynchronous locally synchronous (GALS), Concurrency, Synchronous, Distribution, Desynchronization, Trace theory
32Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli A Framework for Modeling the Distributed Deployment of Synchronous Designs. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Distributed systems, GALS, Desynchronization, Latency-insensitive design
32Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Sun Jhang, Jeong-A Lee, Dong-Soo Har High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF asynchronous on-chip bus, in-order completion, multiple issue, out-of-order completion, SoC, GALS
27Sanghamitra Bandyopadhyay, Sriparna Saha 0001 A New Principal Axis Based Line Symmetry Measurement and Its Application to Clustering. Search on Bibsonomy ICONIP (2) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
27Xin Wang, Tapani Ahonen, Jari Nurmi Applying CDMA Technique to Network-on-Chip. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Cedric Koch-Hofer, Marc Renaudin, Yvain Thonnart, Pascal Vivet ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC. Search on Bibsonomy NOCS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Jhao-Ji Ye, You-Gang Chen, I-Chyn Wey, An-Yeu Wu Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. Search on Bibsonomy HiPEAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Mahdi Nazm Bojnordi, Nariman Moezzi Madani, Mehdi Semsarzadeh, Ali Afzali-Kusha An Efficient Clocking Scheme for On-Chip Communications. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27Andrew Royal, Peter Y. K. Cheung Globally Asynchronous Locally Synchronous FPGA Architectures. Search on Bibsonomy FPL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Anoop Iyer, Diana Marculescu Power efficiency of voltage scaling in multiple clock, multiple voltage cores. Search on Bibsonomy ICCAD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
20Weiyi Zhang 0003, Zoran Salcic, Avinash Malik Designing, Modeling and Analysis of GALS Software Systems. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Hitesh Ahuja, Rajkumar Kubendran High-resolution Extreme-throughput Event-based Cameras using GALS Data-scanning Architecture. Search on Bibsonomy ICONS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Dalta Imam Maulana, Wanyeong Jung An Energy-Efficient Delay Insensitive Asynchronous Interface for Globally Asynchronous Locally Synchronous (GALS) System. Search on Bibsonomy ISCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Alberto Abelló, Panos Vassiliadis, Oscar Romero 0001, Robert Wrembel, Francesca Bugiotti, Johann Gamper, Genoveva Vargas-Solar, Ester Zumpano (eds.) New Trends in Database and Information Systems - ADBIS 2023 Short Papers, Doctoral Consortium and Workshops: AIDMA, DOING, K-Gals, MADEISD, PeRS, Barcelona, Spain, September 4-7, 2023, Proceedings Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Alexandros Karakasidis 0001, Georgia Koloniari Exploring Biases for Privacy-Preserving Phonetic Matching. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Mariella Bonomo, Francesco Ippolito, Salvatore Morfea A Knowledge Graph to Analyze Clinical Patient Data. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Sandro Bimonte, Patrick Marcel, Stefano Rizzi Be High on Emotion: Coping with Emotions and Emotional Intelligence when Querying Data. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Elodie Escriva, Emmanuel Doumard, Jean-Baptiste Excoffier, Julien Aligon, Paul Monsarrat, Chantal Soulé-Dupuy Data Exploration Based on Local Attribution Explanation: A Medical Use Case. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Heloisa Fernanda Rocha, Lorena Silva Nascimento, Leonardo Camargo, Mauricio Noernberg, Carmem S. Hara Labeling Portuguese Man-of-War Posts Collected from Instagram. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Hacene Belhadef, Hala Benchiheb, Lynda Lebdjiri Exploring the Capabilities and Limitations of VQC and QSVC for Sentiment Analysis on Real-World and Synthetic Datasets. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Quim Motger, Xavier Franch, Jordi Marco Mobile Feature-Oriented Knowledge Base Generation Using Knowledge Graphs. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Yousra Bouakba, Hacene Belhadef Ensemble Learning Based Quantum Text Classifiers. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Joakim Lindén, Håkan Forsberg, Masoud Daneshtalab, Ingemar Söderquist Evaluating the Robustness of ML Models to Out-of-Distribution Data Through Similarity Analysis. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
20Søren Kejser Jensen, Christian Thomsen 0001 Holistic Analytics of Sensor Data from Renewable Energy Sources: A Vision Paper. Search on Bibsonomy ADBIS (Short Papers) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
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