|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 24 occurrences of 23 keywords
|
|
|
Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
237 | Kwangok Jeong, Andrew B. Kahng, Kambiz Samadi |
Quantified Impacts of Guardband Reduction on Design Process Outcomes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 790-797, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Guardband, chip size, yield, runtime, wirelength, design iterations |
84 | Chin-Te Kao, Sam Wu, Jwu E. Chen |
A case study of failure analysis and guardband determination for a 64M-bit DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 447-, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
guardband determination, prevention strategy, test derivation, test cost, 64 Mbit, integrated circuit testing, yield, DRAM, failure analysis, failure analysis, test selection, DRAM chips, product quality, integrated circuit yield, integrated circuit economics |
73 | Mill-Jer Wang, R.-L. Jiang, J.-W. Hsia, Chih-Hu Wang, Jwu E. Chen |
Guardband Determination for the Detection of Off-State and Junction Leakages in DRAM Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 151-156, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
65 | Taniya Siddiqua, Sudhanva Gurumurthi |
A multi-level approach to reduce the impact of NBTI on processor functional units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 67-72, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
reliability, NBTI |
44 | Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Paolo A. Aseron, Muhammad M. Khellah, Arijit Raychowdhury, Bibiche M. Geuskens, Carlos Tokunaga, Chris Wilkerson, Tanay Karnik, Vivek De |
Resilient microprocessor design for high performance & energy efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010, pp. 355-356, 2010, ACM, 978-1-4503-0146-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
resilient design |
30 | Natalia Lylina, Stefan Holst, Hanieh Jafarzadeh, Alexandra Kourfali, Hans-Joachim Wunderlich |
Guardband Optimization for the Preconditioned Conjugate Gradient Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN-W ![In: 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2023 - Workshops, Porto, Portugal, June 27-30, 2023, pp. 195-198, 2023, IEEE, 979-8-3503-2543-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
30 | Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu 0001 |
Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Technology and Circuits ![In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023, pp. 1-2, 2023, IEEE, 978-4-86348-806-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
30 | Johannes W. Farias, Diego V. Cirilo do Nascimento, Tiago Barros, Samuel Xavier de Souza |
Speculative guardband: exploiting critical-delay variations across cached instructions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022, pp. 1-2, 2022, IEEE, 978-1-6654-9005-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
30 | Heba Khdr, Hussam Amrouch, Jörg Henkel |
Dynamic Guardband Selection: Thermal-Aware Optimization for Unreliable Multi-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 68(1), pp. 53-66, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
30 | Andres F. Gomez, Víctor H. Champac |
An Efficient Metric-Guided Gate Sizing Methodology for Guardband Reduction Under Process Variations and Aging Effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 35(1), pp. 87-100, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
30 | Ioannis Stratakos, Konstantinos Maragos 0001, George Lentaris |
Voltage Scaling and Guardband Customization of Multiple Constituent Components in SoC-FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: 29th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2019, Rhodes, Greece, July 1-3, 2019, pp. 75-80, 2019, IEEE, 978-1-7281-2103-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
30 | Hyungjin Kim, Seong Chul Cho, Youngha Lee |
Interference Analysis of Guardband NB-IoT System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTC ![In: International Conference on Information and Communication Technology Convergence, ICTC 2018, Jeju Island, Korea (South), October 17-19, 2018, pp. 1370-1372, 2018, IEEE, 978-1-5386-5041-7. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
30 | Andres F. Gomez, Roberto Gómez 0001, Víctor H. Champac |
A metric-guided gate-sizing methodology for aging guardband reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 19th IEEE Latin-American Test Symposium, LATS 2018, Sao Paulo, Brazil, March 12-14, 2018, pp. 1-6, 2018, IEEE, 978-1-5386-1472-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
30 | Hitoshi Takeshita, Takefumi Oguma, Shinsuke Fujisawa, Baku Yatabe, Yuta Suzuki, Akio Tajima, Emmanuel Le Taillandier de Gabory |
Optical Node with Passband Overlapped Filter and Impairment Aware Least Slot Count Path First Algorithm for Guardband-Less Elastic Optical Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECOC ![In: European Conference on Optical Communication, ECOC 2017, Gothenburg, Sweden, September 17-21, 2017, pp. 1-3, 2017, IEEE, 978-1-5386-5624-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
30 | Po-Hao Wang, Wei-Chung Cheng, Yung-Hui Yu, Tang-Chieh Kao, Chi-Lun Tsai, Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen |
Zero-Counting and Adaptive-Latency Cache Using a Voltage-Guardband Breakthrough for Energy-Efficient Operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 63-II(10), pp. 969-973, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
30 | Samantak Gangopadhyay, Saad Bin Nasir, A. Subramanian, Visvesh Sathe 0001, Arijit Raychowdhury |
UVFR: A Unified Voltage and Frequency Regulator with 500MHz/0.84V to 100KHz/0.27V operating range, 99.4% current efficiency and 27% supply guardband reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, pp. 321-324, 2016, IEEE, 978-1-5090-2972-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
30 | Jiansong Zhang, Jin Zhang 0001, Kun Tan, Lin Yang 0009, Qian Zhang 0001, Yongguang Zhang |
Turning Waste into Wealth: Enabling Communication in Guardband Whitespace. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MobiHoc ![In: Proceedings of the 16th ACM International Symposium on Mobile Ad Hoc Networking and Computing, MobiHoc 2015, Hangzhou, China, June 22-25, 2015, pp. 37-46, 2015, ACM, 978-1-4503-3489-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Yazhou Zu, Charles R. Lefurgy, Jingwen Leng, Matthew Halpern, Michael S. Floyd, Vijay Janapa Reddi |
Adaptive guardband scheduling to improve system-level efficiency of the POWER7+. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 48th International Symposium on Microarchitecture, MICRO 2015, Waikiki, HI, USA, December 5-9, 2015, pp. 308-321, 2015, ACM, 978-1-4503-4034-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Mohammad Saber Golanbari, Saman Kiamehr, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori |
Aging guardband reduction through selective flip-flop optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 20th IEEE European Test Symposium, ETS 2015, Cluj-Napoca, Romania, 25-29 May, 2015, pp. 1-6, 2015, IEEE, 978-1-4799-7603-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
30 | Jian Luo 0001, Andreas Kortke, Wilhelm Keusgen |
Guardband Optimization for Cellular Systems Applying Raised Cosine Windowed OFDM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 78(2), pp. 1375-1390, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
30 | Charles Lefurgy, Alan J. Drake, Michael S. Floyd, Malcolm Allen-Ware, Bishop Brock, José A. Tierno, John B. Carter, Robert W. Berry |
Active Guardband Management in Power7+ to Save Energy and Maintain Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 33(4), pp. 35-45, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
30 | Charles Lefurgy, Alan J. Drake, Michael S. Floyd, Malcolm Allen-Ware, Bishop Brock, José A. Tierno, John B. Carter |
Active management of timing guardband to save energy in POWER7. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, Porto Alegre, Brazil, December 3-7, 2011, pp. 1-11, 2011, ACM, 978-1-4503-1053-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
30 | Michitarou Yabuuchi, Kazutoshi Kobayashi |
Evaluation of FPGA design guardband caused by inhomogeneous NBTI degradation considering process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPT ![In: Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China, pp. 417-420, 2010, IEEE, 978-1-4244-8981-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
30 | Jian Luo 0001, Wilhelm Keusgen, Andreas Kortke |
Optimization of Time Domain Windowing and Guardband Size for Cellular OFDM Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTC Fall ![In: Proceedings of the 68th IEEE Vehicular Technology Conference, VTC Fall 2008, 21-24 September 2008, Calgary, Alberta, Canada, pp. 1-5, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Henry H. Y. Chan, Zeljko Zilic |
A practical substrate modeling algorithm with active guardband macromodel for mixed-signal substrate coupling verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001, pp. 1455-1460, 2001, IEEE, 0-7803-7057-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Richard H. Williams, Charles F. Hawkins |
The Economics of Guardband Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October 17-21, 1993, pp. 218-225, 1993, IEEE Computer Society, 0-7803-1430-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
22 | Kwangok Jeong, Andrew B. Kahng |
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 486-491, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Wei Hou, Lei Yang 0020, Lin Zhang 0001, Xiuming Shan, Heather Zheng |
Understanding cross-band interference in unsynchronized spectrum access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRoNet@MobiCom ![In: Proceedings of the 2009 ACM Workshop on Cognitive Radio Networks, CoRoNet 2009, Beijing, China, September 21, 2009, pp. 19-24, 2009, ACM, 978-1-60558-738-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
spectrum access, interference, cognitive radios |
22 | Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar |
Circuit techniques for dynamic variation tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 4-7, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
dynamic variations, error-detection sequential, replica paths, resilient circuits, variation sensors, variation-tolerant circuits, error detection, error correction, error recovery, parameter variations, timing errors |
22 | Andrew B. Kahng |
How to get real mad. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008, pp. 69, 2008, ACM, 978-1-60558-048-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
design-aware manufacturing, integrated circuit physical design, manufacturing-aware design, performance analysis, design for manufacturability |
22 | Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao 0001 |
An efficient method to identify critical gates under circuit aging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 735-740, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De |
Comparative Analysis of Conventional and Statistical Design Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 238-243, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Kenta Yamada, Noriaki Oda |
Statistical corner conditions of interconnect delay (corner LPE specifications). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 706-711, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #33 of 33 (100 per page; Change: )
|
|