Search results for "HBM"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
154	Jahanshah Kabudian, Mohammad Mehdi Homayounpour, Seyed Mohammad Ahadi	Time-inhomogeneous hidden Bernoulli model: An alternative to hidden Markov model for automatic speech recognition.	ICASSP	2008	DBLP DOI BibTeX RDF
115	Reza Hoseinnezhad, Alireza Bab-Hadiashar	Fast Estimation of Epipolar Geometry Using High Breakdown M-estimators.	DICTA	2007	DBLP DOI BibTeX RDF
115	Patrice Godefroid, Robert S. Hanmer, Lalita Jategaonkar Jagadeesan	Model Checking Without a Model: An Analysis of the Heart-Beat Monitor of a Telephone Switch Using VeriSoft.	ISSTA	1998	DBLP DOI BibTeX RDF
96	Caroline Pearson, Susan J. Simmons, Karl Ricanek, Edward L. Boone	Comparative Analysis of a Hierarchical Bayesian Method for Quantitative Trait Loci Analysis for the Arabidopsis Thaliana.	PRIB	2007	DBLP DOI BibTeX RDF	Quantitative Trait Loci (QTL) Analysis, Arabidopsis, Interval Mapping, Hierarchical Bayesian Model
62	Ayman El-Sayed, Vincent Roca	On robustness in application-level multicast: the case of HBM.	ISCC	2004	DBLP DOI BibTeX RDF
58	Jia Ni, Chuang Lin 0002, Zhen Chen 0001, Peter D. Ungsunan	A Fast Multi-pattern Matching Algorithm for Deep Packet Inspection on a Network Processor.	ICPP	2007	DBLP DOI BibTeX RDF
53	A. Aydin Alatan, Ertem Tuncel, Levent Onural	A Rule-Based Method for Object Segmentation in Video Sequences.	ICIP (2)	1997	DBLP DOI BibTeX RDF	rule-based method, region level, rule-based region processing unit, accumulated previous segmentation data, true boundaries, recursive-shortest-spanning-tree algorithm, RSST algorithm, hierarchical-block-matching, HBM, tracking, standardization, color, MPEG-4, MPEG-7, frame, information fusion, video sequences, image colour analysis, object segmentation, motion information
47	Johannes Knödtel, Hector Gerardo Muñoz Hernandez, Alexander Lehnert, Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Marc Reichenbach	TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs.	ARC	2023	DBLP DOI BibTeX RDF
47	Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong	HBM Connect: High-Performance HLS Interconnect for FPGA HBM.	FPGA	2021	DBLP DOI BibTeX RDF
47	Jon Barth, John Richner	Correlation considerations: Real HBM to TLP and HBM testers.	Microelectron. Reliab.	2002	DBLP DOI BibTeX RDF
43	Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, Rafal Dlugosz, Adam Dabrowski	3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
38	Yaohui Jin, Yan Wang, Wei Guo 0003, Weiqiang Sun, Weisheng Hu	Communication Contention Reduction in Joint Scheduling for Optical Grid Computing.	GridNets	2008	DBLP DOI BibTeX RDF	Communication Contention, DAG, Optical Grid
38	Tai-Xiang Lai, Ming-Dou Ker	Method to Evaluate Cable Discharge Event (CDE) Reliability of Integrated Circuits in CMOS Technology.	ISQED	2006	DBLP DOI BibTeX RDF
38	Hsin-Chyh Hsu, Ming-Dou Ker	Dummy-Gate Structure to Improve ESD Robustness in a Fully-Salicided 130-nm CMOS Technology without Using Extra Salicide-Blocking Mask.	ISQED	2006	DBLP DOI BibTeX RDF
38	Paul C. F. Tong, Ping-Ping Xu, Wensong Chen, John Hui, Patty Z. Q. Liu	A novel substrate-triggered ESD protection structure for a bus switch IC with on-chip substrate-pump.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
34	Sabeur Elkosantini, Denis Gien	Human behavior and social network simulation: fuzzy sets/logic and agents-based approach.	SpringSim (2)	2007	DBLP BibTeX RDF	HBM, human behavior simulation, social networks, multi-agent, fuzzy inference system
24	Qizhe Wu, Letian Zhao, Yuchen Gui, Huawen Liang, Xiaotian Wang, Xi Jin 0002	Efficient Message Passing Architecture for GCN Training on HBM-based FPGAs with Orthogonal Topology On-Chip Networks.	FPGA	2024	DBLP DOI BibTeX RDF
24	Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong	TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs.	ASPLOS (3)	2024	DBLP DOI BibTeX RDF
24	Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung	An Energy-Efficient Design of TSV I/O for HBM With a Data Rate up to 10 Gb/s.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
24	Kenneth Liu, Alec Lu, Kartik Samtani, Zhenman Fang, Licheng Guo	CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
24	Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang	SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
24	Youngkwang Lee, Donghyun Han, Sungho Kang 0001	TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
24	Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong	TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs.	IEEE Trans. Emerg. Top. Comput.	2023	DBLP DOI BibTeX RDF
24	Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong	TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs.	CoRR	2023	DBLP DOI BibTeX RDF
24	Shuang Xue, Huawei Liang, Qizhe Wu, Xi Jin 0002	Scheduling Memory Access Optimization for HBM Based on CLOS.	ICACT	2023	DBLP DOI BibTeX RDF
24	Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers	Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms.	FPGA	2023	DBLP DOI BibTeX RDF
24	Sungmock Ha, S. Lee, G. H. Bae, D. S. Lee, S. H. Kim, B. W. Woo, N.-H. Lee, Y. S. Lee, S. Pae	Reliability Characterization of HBM featuring $\text{HK}+\text{MG}$ Logic Chip with Multi-stacked DRAMs.	IRPS	2023	DBLP DOI BibTeX RDF
24	Veronia Iskandar, Mohamed A. Abd El Ghany, Diana Goehringer	Auto-DOK: Compiler-Assisted Automatic Detection of Offload Kernels for FPGA-HBM Architectures.	DSD	2023	DBLP DOI BibTeX RDF
24	John D. McCalpin	Bandwidth Limits in the Intel Xeon Max (Sapphire Rapids with HBM) Processors.	ISC Workshops	2023	DBLP DOI BibTeX RDF
24	Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung	A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
24	Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart	Accelerating GNN-Based SAR Automatic Target Recognition on HBM-Enabled FPGA.	HPEC	2023	DBLP DOI BibTeX RDF
24	Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso	Exploiting HBM on FPGAs for Data Processing.	ACM Trans. Reconfigurable Technol. Syst.	2022	DBLP DOI BibTeX RDF
24	Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang	SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs.	CoRR	2022	DBLP DOI BibTeX RDF
24	Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong	TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs.	CoRR	2022	DBLP DOI BibTeX RDF
24	Xinyu Chen 0001, Yao Chen 0008, Feng Cheng, Hongshi Tan, Bingsheng He, Weng-Fai Wong	ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines.	CoRR	2022	DBLP DOI BibTeX RDF
24	Galen M. Shipman, Sriram Swaminarayan, Gary Grider, Jim Lujan, R. Joseph Zerr	Early Performance Results on 4th Gen Intel(R) Xeon (R) Scalable Processors with DDR and Intel(R) Xeon(R) processors, codenamed Sapphire Rapids with HBM.	CoRR	2022	DBLP DOI BibTeX RDF
24	HyunWook Park, Minsu Kim, Seongguk Kim, Keunwoo Kim, Haeyeon Kim, Taein Shin, Keeyoung Son, Boogyo Sim, Subin Kim, Seungtaek Jeong, Chulsoon Hwang, Joungho Kim	Transformer Network-based Reinforcement Learning Method for Power Distribution Network (PDN) Optimization of High Bandwidth Memory (HBM).	CoRR	2022	DBLP DOI BibTeX RDF
24	Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers	CycloneNTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms.	IACR Cryptol. ePrint Arch.	2022	DBLP BibTeX RDF
24	Man The Nguyen, Anh Giang Le, Trinh Thi Tuyet Bui, Ngoc Vuong Bao Dang, Nhan Thien Ngo	The Behavioral Intention of Using Online Food Delivery Services During the COVID-19 Pandemic in Vietnam: A Test of Integrating TAM and HBM Framework.	Int. J. Asian Bus. Inf. Manag.	2022	DBLP DOI BibTeX RDF
24	Lars Schwenger, Philipp Holzinger, Dietmar Fey, Hector Gerardo Muñoz Hernandez, Marc Reichenbach	EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis.	SAMOS	2022	DBLP DOI BibTeX RDF
24	Shinhaeng Kang, Sukhan Lee 0002, Byeongho Kim, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim, Eojin Lee	An FPGA-based RNN-T Inference Accelerator with PIM-HBM.	FPGA	2022	DBLP DOI BibTeX RDF
24	Yixiao Du, Yuwei Hu, Zhongchun Zhou, Zhiru Zhang	High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS: A Case Study on SpMV.	FPGA	2022	DBLP DOI BibTeX RDF
24	Xinyu Chen 0001, Yao Chen 0008, Feng Cheng, Hongshi Tan, Bingsheng He, Weng-Fai Wong	ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines.	MICRO	2022	DBLP DOI BibTeX RDF
24	Tao Li, Li Shen 0007, Shangshang Yao	A High-performance SpMV Accelerator on HBM-equipped FPGAs.	HPCC/DSS/SmartCity/DependSys	2022	DBLP DOI BibTeX RDF
24	Sanyam Mehta, Gary Elsesser, Terry Greyzck	Software pre-execution for irregular memory accesses in the HBM era.	CC	2022	DBLP DOI BibTeX RDF
24	Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong	TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs.	FCCM	2022	DBLP DOI BibTeX RDF
24	Srinirdheeshwar Kuttuva Prakash, Hiren D. Patel, Nachiket Kapre	Managing HBM Bandwidth on Multi-Die FPGAs with FPGA Overlay NoCs.	FCCM	2022	DBLP DOI BibTeX RDF
24	Jung-Hun Park, Kwang-Hoon Lee, Yongjae Lee, Jung-Woo Sull, Yoonho Song, Sanghee Lee, Hyeonseok Lee, Hoyeon Cho, Jonghyun Oh, Han-Gon Ko, Deog-Kyoon Jeong	A 68.7-fJ/b/mm 375-GB/s/mm Single-Ended PAM-4 Interface with Per-Pin Training Sequence for the Next-Generation HBM Controller.	VLSI Technology and Circuits	2022	DBLP DOI BibTeX RDF
24	Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung	A Low Power TSV I/O with Data Rate up to 10 Gb/s for Next Generation HBM.	VLSI Technology and Circuits	2022	DBLP DOI BibTeX RDF
24	Soundarya Jayaraman, Bingyi Zhang, Viktor K. Prasanna	Hypersort: High-performance Parallel Sorting on HBM-enabled FPGA.	FPT	2022	DBLP DOI BibTeX RDF
24	Hyunsu Park, Yoonjae Choi, Jincheol Sim, Jonghyuck Choi, Youngwook Kwon, Junyoung Song, Chulwoo Kim	A 0.385-pJ/bit 10-Gb/s TIA-Terminated Di-Code Transceiver with Edge-Delayed Equalization, ECC, and Mismatch Calibration for HBM Interfaces.	ISSCC	2022	DBLP DOI BibTeX RDF
24	Daniel DeLayo, Kenny Zhang, Kunal Agrawal, Michael A. Bender, Jonathan W. Berry, Rathish Das, Benjamin Moseley, Cynthia A. Phillips	Automatic HBM Management: Models and Algorithms.	SPAA	2022	DBLP DOI BibTeX RDF
24	Wenjie Liu, Shoaib Akram 0001, Jennifer B. Sartor, Lieven Eeckhout	Reliability-aware Garbage Collection for Hybrid HBM-DRAM Memories.	ACM Trans. Archit. Code Optim.	2021	DBLP DOI BibTeX RDF
24	Naebeom Park, Sungju Ryu, Jaeha Kung, Jae-Joon Kim	High-throughput Near-Memory Processing on CNNs with 3D HBM-like Memory.	ACM Trans. Design Autom. Electr. Syst.	2021	DBLP DOI BibTeX RDF
24	Alberto Parravicini, Luca Giuseppe Cellamare, Marco Siracusa, Marco Domenico Santambrogio	Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs.	CoRR	2021	DBLP BibTeX RDF
24	Chenhao Liu, Zhiyuan Shao, Zeke Wang, Kexin Li, Minkang Wu, Jiajie Chen, Xiaofei Liao, Hai Jin 0001	ScalaBFS: A Scalable BFS Accelerator on HBM-Enhanced FPGAs.	CoRR	2021	DBLP BibTeX RDF
24	Tom Hogervorst, Tong Dong Qiu, Giacomo Marchiori, Alf Birger Rustad, Markus Blatt, Razvan Nane	Hardware Acceleration of HPC Computational Flow Dynamics using HBM-enabled FPGAs.	CoRR	2021	DBLP BibTeX RDF
24	Jose Carlos Romero, Angeles G. Navarro, Antonio Vilches, Andrés Rodríguez 0001, Francisco Corbera, Rafael Asenjo	Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM.	Future Gener. Comput. Syst.	2021	DBLP DOI BibTeX RDF
24	Chenhao Liu, Zhiyuan Shao, Kexin Li, Minkang Wu, Jiajie Chen, Ruoshi Li, Xiaofei Liao, Hai Jin 0001	ScalaBFS: A Scalable BFS Accelerator on FPGA-HBM Platform.	FPGA	2021	DBLP DOI BibTeX RDF
24	Chunyou Su, Hao Liang, Wei Zhang 0012, Kun Zhao, Baole Ai, Wenting Shen, Zeke Wang	Graph Sampling with Fast Random Walker on HBM-enabled FPGA Accelerators.	FPL	2021	DBLP DOI BibTeX RDF
24	Philipp Holzinger, Daniel Reiser, Tobias Hahn, Marc Reichenbach	Fast HBM Access with FPGAs: Analysis, Architectures, and Applications.	IPDPS Workshops	2021	DBLP DOI BibTeX RDF
24	Yuwei Hu, Yixiao Du, Ecenur Ustun, Zhiru Zhang	GraphLily: Accelerating Graph Linear Algebra on HBM-Equipped FPGAs.	ICCAD	2021	DBLP DOI BibTeX RDF
24	Abhishek Kumar Jain, Sharan Kumar, Aashish Tripathi, Dinesh Gaitonde	Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform.	HPEC	2021	DBLP DOI BibTeX RDF
24	Alberto Parravicini, Luca Giuseppe Cellamare, Marco Siracusa, Marco D. Santambrogio	Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs.	DAC	2021	DBLP DOI BibTeX RDF
24	Young-kyu Choi, Yuze Chi, Jie Wang 0022, Licheng Guo, Jason Cong	When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization.	CoRR	2020	DBLP BibTeX RDF
24	Sangyoon Lee, Han-Gon Ko, Joo-Hyung Chae, Soyeong Shin, Jaekwang Yun, Deog-Kyoon Jeong, Suhwan Kim	A 0.83-pJ/Bit 6.4-Gb/s HBM Base Die Receiver Using a 45° Strobe Phase for Energy-Efficient Skew Compensation.	IEEE Trans. Circuits Syst. II Express Briefs	2020	DBLP DOI BibTeX RDF
24	Han-Gon Ko, Soyeong Shin, Jonghyun Oh, Kwanseo Park, Deog-Kyoon Jeong	6.7 An 8Gb/s/µm FFE-Combined Crosstalk-Cancellation Scheme for HBM on Silicon Interposer with 3D-Staggered Channels.	ISSCC	2020	DBLP DOI BibTeX RDF
24	Yang Yang 0111, Sanmukh R. Kuppannagari, Viktor K. Prasanna	A High Throughput Parallel Hash Table Accelerator on HBM-enabled FPGAs.	FPT	2020	DBLP DOI BibTeX RDF
24	Hongyu Miao 0002, Myeongjae Jeon, Gennady Pekhimenko, Kathryn S. McKinley, Felix Xiaozhu Lin	StreamBox-HBM: Stream Analytics on High Bandwidth Hybrid Memory.	CoRR	2019	DBLP BibTeX RDF
24	Koji Sakui, Takayuki Ohba	High Bandwidth Memory (HBM) and High Bandwidth NAND (HBN) with the Bumpless TSV Technology.	3DIC	2019	DBLP DOI BibTeX RDF
24	Hongyu Miao 0002, Myeongjae Jeon, Gennady Pekhimenko, Kathryn S. McKinley, Felix Xiaozhu Lin	StreamBox-HBM: Stream Analytics on High Bandwidth Hybrid Memory.	ASPLOS	2019	DBLP DOI BibTeX RDF
24	Maohua Zhu, Youwei Zhuo, Chao Wang 0003, Wenguang Chen, Yuan Xie 0001	Performance Evaluation and Optimization of HBM-Enabled GPU for Data-Intensive Applications.	IEEE Trans. Very Large Scale Integr. Syst.	2018	DBLP DOI BibTeX RDF
24	Salem Abdennadher, Michael Altmann, Bin Xue	Challenges and emerging solutions in testing HBM IO & systems.	LATS	2018	DBLP DOI BibTeX RDF
24	Kyomin Sohn, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Hyunui Lee, Seok-Yong Kang, Young-Soo Sohn, Jung-Hwan Choi, Yong-Cheol Bae, Seong-Jin Jang, Gyo-Young Jin	A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
24	Hongshin Jun, Sang Kyun Nam, Han Ho Jin, Jong-Chern Lee, Yong Jae Park, Jaejin Lee	High-Bandwidth Memory (HBM) Test Challenges and Solutions.	IEEE Des. Test	2017	DBLP DOI BibTeX RDF
24	Marc Loranger, Onnik Yaglioglu, John Oonk	High-Performance HBM Known-Good-Stack Testing.	IEEE Des. Test	2017	DBLP DOI BibTeX RDF
24	Maohua Zhu, Youwei Zhuo, Chao Wang 0003, Wenguang Chen, Yuan Xie 0001	Performance evaluation and optimization of HBM-Enabled GPU for data-intensive applications.	DATE	2017	DBLP DOI BibTeX RDF
24	Mahzabeen Islam, Krishna M. Kavi, Mitesh R. Meswani, Soumik Banerjee, Nuwan Jayasena	HBM-Resident Prefetching for Heterogeneous Memory System.	ARCS	2017	DBLP DOI BibTeX RDF
24	Tyler Stocksdale, Mu-Tien Chang, Hongzhong Zheng, Frank Mueller 0001	Architecting HBM as a high bandwidth, high capacity, self-managed last-level cache.	PDSW-DISCS@SC	2017	DBLP DOI BibTeX RDF
24	Suresh Ramalingam	HBM package integration: Technology trends, challenges and applications.	Hot Chips Symposium	2016	DBLP DOI BibTeX RDF
24	Kyomin Sohn, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Kyung-Woo Nam, Seouk-Kyu Choi, Jaewook Lee, Uksong Kang, Young-Soo Sohn, Jung-Hwan Choi, Chi-Wook Kim, Seong-Jin Jang, Gyo-Young Jin	18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.	ISSCC	2016	DBLP DOI BibTeX RDF
24	Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Yeon Ok Kim, Jae-Hwan Kim, Jin Ho Kim, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jeajin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee	18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface.	ISSCC	2016	DBLP DOI BibTeX RDF
24	Jong-Chern Lee, Jihwan Kim, Kyung Whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jaejin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee	High bandwidth memory(HBM) with TSV technique.	ISOCC	2016	DBLP DOI BibTeX RDF
24	Dounia Khaldi, Barbara M. Chapman	Towards Automatic HBM Allocation Using LLVM: A Case Study with Knights Landing.	LLVM-HPC@SC	2016	DBLP DOI BibTeX RDF
24	Hyunui Lee, Sukyong Kang, Hye-Seung Yu, Won-Joo Yun, Jae-Hun Jung, Sungoh Ahn, Wang-Soo Kim, Beomyong Kil, Yoo-Chang Sung, Sang-Hoon Shin, Yong-Sik Park, Yong-Hwan Kim, Kyung-Woo Nam, Indal Song, Kyomin Sohn, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin	Design of non-contact 2Gb/s I/O test methods for high bandwidth memory (HBM).	A-SSCC	2016	DBLP DOI BibTeX RDF
24	Dong-Uk Lee, Kyung Whan Kim, Kwan-Weon Kim, Kang Seol Lee, Sang Jin Byeon, Jae-Hwan Kim, Jin-Hee Cho, Jaejin Lee, Jun Hyun Chun	A 1.2 V 8 Gb 8-Channel 128 GB/s High-Bandwidth Memory (HBM) Stacked DRAM With Effective I/O Test Circuits.	IEEE J. Solid State Circuits	2015	DBLP DOI BibTeX RDF
24	Hyunsuk Lee, Kyungjun Cho, Heegon Kim, Sumin Choi, Jaemin Lim, Joungho Kim	Electrical performance of high bandwidth memory (HBM) interposer channel in terabyte/s bandwidth graphics module.	3DIC	2015	DBLP DOI BibTeX RDF
24	Shuuichi Kariyazaki, Kenichi Kuboyama, Ryuichi Oikawa, Takuo Funaya	New signal skew cancellation method for 2 Gbps transmission in glass and organic interposers to achieve 2.5D package employing next generation high bandwidth memory (HBM).	3DIC	2015	DBLP DOI BibTeX RDF
24	Manuel Kaufmann, Timm Ostermann	Simulation model based on JEDEC JS-001-2014 for circuit simulation of HBM ESD pulses on IC level.	EMC Compo	2015	DBLP DOI BibTeX RDF
24	Barend van Liempd, Saneaki Ariumi, Ewout Martens, Shih-Hung Chen, Piet Wambacq, Jan Craninckx	A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protection.	ESSCIRC	2015	DBLP DOI BibTeX RDF
24	Dong-Uk Lee, Kang Seol Lee, Yongwoo Lee, Kyung Whan Kim, Jong-Ho Kang, Jaejin Lee, Jun Hyun Chun	Design considerations of HBM stacked DRAM and the memory architecture extension.	CICC	2015	DBLP DOI BibTeX RDF
24	Joonyoung Kim, Younsu Kim	HBM: Memory solution for bandwidth-hungry processors.	Hot Chips Symposium	2014	DBLP DOI BibTeX RDF
24	Dong-Uk Lee, Kyung Whan Kim, Kwan-Weon Kim, Hongjung Kim, Ju Young Kim, Young Jun Park, Jae Hwan Kim, Dae Suk Kim, Heat Bit Park, Jin Wook Shin, Jang Hwan Cho, Ki Hun Kwon, Min Jeong Kim, Jaejin Lee, Kunwoo Park, Byong-Tae Chung, Sung-Joo Hong	25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV.	ISSCC	2014	DBLP DOI BibTeX RDF
24	Dong-Uk Lee, Kyung Whan Kim, Kwan-Weon Kim, Kang Seol Lee, Sang Jin Byeon, Jin-Hee Cho, Han Ho Jin, Sang Kyun Nam, Jaejin Lee, Jun Hyun Chun, Sung-Joo Hong	An exact measurement and repair circuit of TSV connections for 128GB/s high-bandwidth memory(HBM) stacked DRAM.	VLSIC	2014	DBLP DOI BibTeX RDF
24	Timothy J. Maloney	HBM tester waveforms, equivalent circuits, and socket capacitance.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
24	Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk	A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA.	IEEE J. Solid State Circuits	2009	DBLP DOI BibTeX RDF
24	Tilo Brodbeck, Reinhold Gaertner	Experience in HBM ESD testing of high pin count devices.	Microelectron. Reliab.	2007	DBLP DOI BibTeX RDF
24	Charvaka Duvvury, Robert Steinhoff, Gianluca Boselli, Vijay Reddy, Hans Kunz, Steve Marum, Roger Cline	Gate oxide failures due to anomalous stress from HBM ESD testers.	Microelectron. Reliab.	2006	DBLP DOI BibTeX RDF
24	Nicolas Guitard, Fabien Essely, David Trémouilles, Marise Bafleur, Nicolas Nolhier, Philippe Perdu, André Touboul, Vincent Pouget, Dean Lewis	Different Failure signatures of multiple TLP and HBM Stresses in an ESD robust protection structure.	Microelectron. Reliab.	2005	DBLP DOI BibTeX RDF
24	Paul Leroux, Michiel Steyaert	A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM.	ESSCIRC	2004	DBLP DOI BibTeX RDF