Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
80 | Andrew Butterfield, Jim Woodcock 0001 |
prialt in Handel-C: an operational semantics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 7(3), pp. 248-267, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Operational semantics, Priority, Handel-C |
68 | Ali E. Abdallah, John Hawkins |
Formal Behavioural Synthesis of Handel-C Parallel Hardware Implementations from Functional Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 36th Hawaii International Conference on System Sciences (HICSS-36 2003), CD-ROM / Abstracts Proceedings, January 6-9, 2003, Big Island, HI, USA, pp. 278, 2003, IEEE Computer Society, 0-7695-1874-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
61 | Tomas Dedek, Tomas Marek, Tomás Martínek |
High Level Abstraction Language as an Alternative to Embedded Processors for Internet Packet Processing in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 648-651, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
61 | Salvatore Vitabile, Antonio Gentile, Sabato Marco Siniscalchi, Filippo Sorbello |
Efficient Rapid Prototyping of Image and Video Processing Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 452-458, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
53 | Kasra G. Nezami, Peter W. Stephens, Stuart D. Walker |
Handel-C Implementation of Early-Access Partial-Reconfiguration for Software Defined Radio. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCNC ![In: WCNC 2008, IEEE Wireless Communications & Networking Conference, March 31 2008 - April 3 2008, Las Vegas, Nevada, USA, Conference Proceedings, pp. 1103-1108, 2008, IEEE, 978-1-4244-1997-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
53 | Andrew Butterfield |
A Denotational Semantics for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods and Hybrid Real-Time Systems ![In: Formal Methods and Hybrid Real-Time Systems, Essays in Honor of Dines Bjørner and Chaochen Zhou on the Occasion of Their 70th Birthdays, Papers presented at a Symposium held in Macao, China, September 24-25, 2007, pp. 45-66, 2007, Springer, 978-3-540-75220-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
53 | Slawomir Cichon, Marek Gorgon, Miroslaw Pac |
Handel-C Design Enhancement for FPGA-Based DV Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers, pp. 128-133, 2006, Springer. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
video decompression, field programmable gate array, Parallel algorithm, high level languages |
46 | Ould-cheikh Mourad, Si-Mohamed Lotfy, Noureddine Mehallegue, Ahmed Bouridane, Camel Tanougast |
AES Embedded Hardware Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 103-109, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
46 | Tim Todman, Wayne Luk |
Real-time Extensions to a C-like Hardware Description Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 8-11 April 2003, Napa, CA, USA, Proceedings, pp. 302-304, 2003, IEEE Computer Society, 0-7695-1979-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
42 | Server Kasap, Khaled Benkrid, Ying Liu 0003 |
A high performance fpga-based implementation of position specific iterated blast. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 249-252, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
psi-blast, fpga, blast, handel c |
42 | Marcel Oliveira, Jim Woodcock 0001 |
Automatic Generation of Verified Concurrent Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, FL, USA, November 14-15, 2007, Proceedings, pp. 286-306, 2007, Springer, 978-3-540-76648-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA, concurrency, refinement, CSP, tool support, program development, Handel-C, automatic compilation |
38 | Joseph C. Libby, Farnaz Gharibian, Kenneth B. Kent |
Automatic Identification of Parallelism in Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 660-664, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
38 | Farnaz Gharibian, Kenneth B. Kent |
An embedded decryption/decompression engine using Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008, pp. 51-57, 2008, IEEE, 978-1-4244-1994-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
38 | Juan Ignacio Perna, Jim Woodcock 0001 |
A Denotational Semantics for Handel-C Hardware Compilation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, FL, USA, November 14-15, 2007, Proceedings, pp. 266-285, 2007, Springer, 978-3-540-76648-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Miroslaw Jablonski, Marek Gorgon |
Handel-C implementation of Classical Component Labelling Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 387-393, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Klaus Buchenrieder, Andreas Pyttel, Alexander Sedlmeier |
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 870-874, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
38 | Peter Martin |
A Pipelined Hardware Implementation of Genetic Programming Using FPGAs and Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroGP ![In: Genetic Programming, 5th European Conference, EuroGP 2002, Kinsale, Ireland, April 3-5, 2002, Proceedings, pp. 1-12, 2002, Springer, 3-540-43378-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
30 | Timothy F. Beatty, Eric E. Aubanel, Kenneth B. Kent |
Customizable bit-width in an OpenMP-based circuit design tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 278, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
handelc, hardware specification, openmp |
30 | Issam W. Damaj |
Higher-Level Hardware Synthesis of the KASUMI Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 22(1), pp. 60-70, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
parallel algorithms, methodology, formal models, data encryption, gate array |
30 | Iouliia Skliarova |
Intelligent Systems Engineering with Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFIP PPAI ![In: Toward Category-Level Object Recognition, pp. 161-170, 2006, Springer, 3-540-68794-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Kieron Turkington, Konstantinos Masselos, George A. Constantinides, Philip Heng Wai Leong |
FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
30 | Miguel Morales-Sandoval, Claudia Feregrino Uribe |
On the Hardware Design of an Elliptic Curve Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ENC ![In: 5th Mexican International Conference on Computer Science (ENC 2004), 20-24 September 2004, Colima, Mexico, pp. 64-70, 2004, IEEE Computer Society, 0-7695-2160-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Shrutisagar Chandrasekaran, Abbes Amira |
High Performance FPGA Implementation of the Mersenne Twister. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 482-485, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
RC1000, FPGA, Mersenne Twister, Handel C |
27 | Justin L. Tripp, Maya B. Gokhale, Kristopher D. Peterson |
Trident: From High-Level Language to Hardware Circuitry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 40(3), pp. 28-37, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Trident compiler, Impulse C, Mitrion-C, SRC Carte, RC Toolbox, FPGAs, reconfigurable computing, Supercomputing, Handel-C |
23 | Ahmed B. Ablak, Issam W. Damaj |
HTCC: Haskell to Handel-C Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1907.07764, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
23 | Ahmed B. Ablak, Issam W. Damaj |
HTCC: Haskell to Handel-C Hardware Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2016 Euromicro Conference on Digital System Design, DSD 2016, Limassol, Cyprus, August 31 - September 2, 2016, pp. 192-199, 2016, IEEE Computer Society, 978-1-5090-2817-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
23 | David J. Greaves |
Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015, pp. 108-117, 2015, IEEE, 978-1-5090-0237-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
23 | Yujian Fu, Jeffery Kulick, Lok K. Yan, Steven Drager 0001 |
Formal Modeling and Verification of Security Property in Handel C Program. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Secur. Softw. Eng. ![In: Int. J. Secur. Softw. Eng. 3(3), pp. 50-65, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
23 | Maxwell Walton, Omar Ahmed, Gary William Grewal, Shawki Areibi |
An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel-C and Impulse-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2012, pp. 793196:1-793196:11, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
23 | Juan Ignacio Perna, Jim Woodcock 0001 |
Mechanised wire-wise verification of Handel-C synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. Comput. Program. ![In: Sci. Comput. Program. 77(4), pp. 424-443, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
23 | Alex Cole |
Handel-C++ - Adding Syntactic Support to C++. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: 34th Communicating Process Architectures, CPA 2012, organised under the auspices of WoTUG, Dundee, Scotland, UK, August 26, 2012, 2012, Open Channel Publishing Ltd., 978-0-9565409-5-9. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
23 | Andrew Butterfield |
A denotational semantics for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Aspects Comput. ![In: Formal Aspects Comput. 23(2), pp. 153-170, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Jia Jan Ong, Li-Minn Ang, Kah Phooi Seng, Fong Tien Ong |
Implementation of (255, 251) Reed Solomon Minimal Instruction Set Computing using Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICOIN ![In: 2011 International Conference on Information Networking, ICOIN 2011, Kuala Lumpur, Malaysia, January 26-28, 2011, pp. 429-434, 2011, IEEE Computer Society, 978-1-61284-661-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Dan Slipper, Alistair A. McEwan |
A Systems Re-engineering Case Study: Programming Robots with occam and Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: 33th Communicating Process Architectures Conference, CPA 2011, organised under the auspices of WoTUG, Limerick, Ireland, June 19th, 2011, pp. 317-327, 2011, IOS Press, 978-1-60750-773-4. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
23 | Wilson Ifill, Steve A. Schneider |
A step towards refining and translating B control annotations to Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 22(8), pp. 1023-1048, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
23 | Lars Middendorf, Christophe Bobda |
Declarative Programming with Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ERSA ![In: Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2010, July 12-15, 2010, Las Vegas Nevada, USA, pp. 151-164, 2010, CSREA Press, 1-60132-140-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP BibTeX RDF |
|
23 | Juan Ignacio Perna |
A verified compiler for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2010 |
RDF |
|
23 | Cherrad Benbouchama, Mohamed Tadjine, Ahmed Bouridane |
A Parameterizable Handel-C Neural Network Implementation for FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICINCO-ICSO ![In: ICINCO 2009, Proceedings of the 6th International Conference on Informatics in Control, Automation and Robotics, Intelligent Control Systems and Optimization, Milan, Italy, July 2-5, 2009, pp. 325-328, 2009, INSTICC Press, 978-989-8111-99-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
23 | Yi Yang, Qian-Sheng Fang |
The improved genetic algorithm for solving knapsack problem based on Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GrC ![In: The 2009 IEEE International Conference on Granular Computing, GrC 2009, Lushan Mountain, Nanchang, China, 17-19 August 2009, pp. 702-705, 2009, IEEE Computer Society, 978-1-4244-4830-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
23 | Juan Ignacio Perna, Jim Woodcock 0001 |
Mechanised Wire-wise Verification of Handel-C Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBMF ![In: Proceedings of the Eleventh Brazilian Symposium on Formal Methods, SBMF 2008, Salvador, Brazil, August 26-29, 2008, pp. 201-219, 2008, Elsevier. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Juan Ignacio Perna, Jim Woodcock 0001 |
UTP Semantics for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
UTP ![In: Unifying Theories of Programming, Second International Symposium, UTP 2008, Dublin, Ireland, September 8-10, 2008, Revised Selected Papers, pp. 142-160, 2008, Springer, 978-3-642-14520-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | Steve A. Schneider, Helen Treharne, Alistair A. McEwan, Wilson Ifill |
Experiments in Translating CSP || B to Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: The thirty-first Communicating Process Architectures Conference, CPA 2008, organised under the auspices of WoTUG and the Department of Computer Science of the University of York, York, Yorkshire, UK, 7-10 September 2008, pp. 115-133, 2008, IOS Press, 978-1-58603-907-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
23 | José M. Granado Criado, Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez, Juan Antonio Gómez Pulido |
A Dynamically and Partially Reconfigurable Implementation of the IDEA Algorithm Using FPGAs and Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Univers. Comput. Sci. ![In: J. Univers. Comput. Sci. 13(3), pp. 407-418, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Qian-Sheng Fang, Yi Yang, Wan-Li Chen, Li-jun Wang |
Implementation and Research on EHW-based Digital Chip Using Handel-C Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (5) ![In: Third International Conference on Natural Computation, ICNC 2007, Haikou, Hainan, China, 24-27 August 2007, Volume 5, pp. 624-628, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Wilson Ifill, Steve A. Schneider |
A Step Towards Refining and Translating B Control Annotations to Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: The 30th Communicating Process Architectures Conference, CPA 2007, organised under the auspices of WoTUG and the University of Surrey, Guildford, Surrey, UK, 8-11 July 2007, pp. 399-424, 2007, IOS Press, 978-1-58603-767-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
23 | Vijay Pandya, Shawki Areibi, Medhat Moussa |
A Handel-C implementation of the back-propagation algorithm on field programmable gate arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2005 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2005, Puebla City, Mexico, September 28-30, 2005, 2005, IEEE Computer Society, 0-7695-2456-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Marek Gorgon, Slawomir Cichon, Miroslaw Pac |
Real-time Handel-C Based Implementation of DV Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005, pp. 130-135, 2005, IEEE, 0-7803-9362-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
23 | Bart Rem, Ajeesh Gopalakrishnan, Tom J. H. Geelen, Herman W. Roebbers |
Automatic Handel-C Generation from MATLAB. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CPA ![In: The 28th Communicating Process Architectures Conference, CPA 2005, organised under the auspices of WoTUG, Philips and the Technische Universiteit Eindhoven, Eindhoven, The Netherlands, 18-21 September 2005, pp. 43-69, 2005, IOS Press, 978-1-58603-561-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
23 | Andrew Butterfield, Jim Woodcock 0001 |
A "Hardware Compiler" Semantics for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCSIT ![In: Proceedings of the Third Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, MFCSIT 2004, Dublin, Ireland, July 22-23, 2004, pp. 73-90, 2004, Elsevier. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
23 | Robert P. Self, Martin Fleury, Andy C. Downton |
Design methodology for construction of asynchronous pipelines with Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEE Proc. Softw. ![In: IEE Proc. Softw. 150(1), pp. 39-47, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Andrew Butterfield, Jim Woodcock 0001 |
An Operational Semantics for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMICS ![In: Eighth International Workshop on Formal Methods for Industrial Critical Systems, FMICS 2003, Roros, Norway, June 5-7, 2003, pp. 235-250, 2003, Elsevier. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
23 | Andrew Butterfield, Jim Woodcock 0001 |
Semantic domains for Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MFCSIT ![In: Second Irish Conference on the Mathematical Foundations of Computer Science and Information Technology, MFCSIT 2002, Galway, Ireland, July 18-19, 2002, pp. 1-20, 2002, Elsevier. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
23 | Peter Martin, Riccardo Poli |
Crossover Operators For A Hardware Implementation Of GP Using FPGAs And Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: GECCO 2002: Proceedings of the Genetic and Evolutionary Computation Conference, New York, USA, 9-13 July 2002, pp. 845-852, 2002, Morgan Kaufmann, 1-55860-878-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
23 | Peter Martin |
An Analysis Of Random Number Generators For A Hardware Implementation Of Genetic Programming Using FPGAs And Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: GECCO 2002: Proceedings of the Genetic and Evolutionary Computation Conference, New York, USA, 9-13 July 2002, pp. 837-844, 2002, Morgan Kaufmann, 1-55860-878-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
23 | Peter Martin |
A Hardware Implementation of a Genetic Programming System Using FPGAs and Handel-C. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Genet. Program. Evolvable Mach. ![In: Genet. Program. Evolvable Mach. 2(4), pp. 317-343, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
23 | Kjell Torkelsson, Johan Ditmar |
Header Compression in Handel-C - An Internet Application and a New Design Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 4-6 September 2001, Warsaw, Poland, pp. 2-7, 2001, IEEE Computer Society, 0-7695-1239-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Maxwell Walton, Gary Gréwal, Gerarda A. Darlington |
Parallel FPGA-based implementation of scatter search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 1075-1082, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
0-1 knapsack problem, field programmable gate arrays, pipelining, hardware acceleration, data parallelism, scatter search |
15 | Raúl Martínez, Francisco José Alfaro, José L. Sánchez 0002, José M. Claver |
Hardware Implementation Study of the SCFQ-CA and DRR-CA Scheduling Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2009 Parallel Processing, 15th International Euro-Par Conference, Delft, The Netherlands, August 25-28, 2009. Proceedings, pp. 1089-1100, 2009, Springer, 978-3-642-03868-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Pramod Kumar Meher, Shrutisagar Chandrasekaran, Abbes Amira |
FPGA Realization of FIR Filters by Efficient and Flexible Systolization Using Distributed Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 56(7-1), pp. 3009-3017, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Markus Koester, Wayne Luk, Geoffrey Brown |
A hardware compilation flow for instance-specific VLIW cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 619-622, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, David F. Bacon, Rodric M. Rabbah |
Optimus: efficient realization of streaming applications on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 41-50, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
optimization, FPGA, embedded systems, compiler, streaming, heterogeneous |
15 | Fernando Pardo, Paula López Martinez 0001, Diego Cabello |
FPGA-based hardware accelerator of the heat equation with applications on infrared thermography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008, Leuven, Belgium, pp. 179-184, 2008, IEEE Computer Society, 978-1-4244-1897-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Issam W. Damaj |
Parallel Algorithms Development for Programmable Devices with Application from Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 35(6), pp. 529-572, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Parallel algorithms, methodologies, formal models, data encryption, gate array |
15 | Takamasa Kanamori, Hideharu Amano, Masatoshi Arai, Daisuke Konno, Tomomichi Nanba, Yoshiaki Ajioka |
Implementation and Evaluation of a High Speed License Plate Recognition System on an FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: Seventh International Conference on Computer and Information Technology (CIT 2007), October 16-19, 2007, University of Aizu, Fukushima, Japan, pp. 567-572, 2007, IEEE Computer Society, 978-0-7695-2983-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Fernando Pardo, Paula López 0001, Diego Cabello |
Soft-Hard 3D FD-TD Solver for Non Destructive Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 17-22, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Gareth W. Morris, Matthew Aubury |
Design Space Exploration of the European Option Benchmark Using HyperStreams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 5-10, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Takamasa Kanamori, Hideharu Amano, Masatoshi Arai, Daisuke Konno, Tomomichi Nanba, Yoshiaki Ajioka |
A High Speed License Plate Recognition System on an FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 554-557, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Khaled Benkrid, Ying Liu 0003, Abdsamad Benkrid |
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 275-278, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | J. Javier Martínez-Álvarez, F. Javier Toledo-Moreo, José Manuel Ferrández de Vicente |
Discrete-Time Cellular Neural Networks in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 293-294, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Juan Antonio Gómez Pulido, Juan M. Matas-Santiago, Francisco Pérez-Rodríguez, Miguel A. Vega-Rodríguez, Juan Manuel Sánchez-Pérez, Francisco Fernández de Vega |
Hardware Modelling of Cellular Automata: The Game of Life Case. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2007, 11th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 12-16, 2007, Revised Selected Papers, pp. 589-595, 2007, Springer, 978-3-540-75866-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
FPGA, Cellular Automata, Reconfigurable Computing |
15 | Alistair A. McEwan, Steve A. Schneider |
A verified development of hardware using CSP∥B. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 81, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Shrutisagar Chandrasekaran, Abbes Amira |
FPGA Implementation and Power Modelling of the Fast Walsh Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-4, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | David Rodríguez 0001, Juan M. Sánchez, Arturo Duran |
Mobile Fingerprint Identification Using a Hardware Accelerated Biometric Service Provider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers, pp. 383-388, 2006, Springer. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Neil C. Audsley, Michael Ward |
Syntax-driven implementation of software programming language control constructs and expressions on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 253-260, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fpga, compilation, language |
15 | Tim Schattkowsky, Jan Hendrik Hausmann, Gregor Engels |
Using UML Activities for System-on-Chip Design and Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MoDELS ![In: Model Driven Engineering Languages and Systems, 9th International Conference, MoDELS 2006, Genova, Italy, October 1-6, 2006, Proceedings, pp. 737-752, 2006, Springer, 3-540-45772-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Sergio A. Cuenca, António S. Câmara, Juan Suardíaz Muro, Ana Toledo Moreo |
Domain-Specific Codesign for Automated Visual Inspection Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IbPRIA (1) ![In: Pattern Recognition and Image Analysis, Second Iberian Conference, IbPRIA 2005, Estoril, Portugal, June 7-9, 2005, Proceedings, Part I, pp. 683-690, 2005, Springer, 3-540-26153-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Khaled Benkrid, Samir Belkacemi |
An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 278, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Owen Callanan, Andy Nisbet, Emre Özer 0001, James Sexton, David Gregg |
FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Aziz Ahmedsaid, Abbes Amira |
Accelerating svd on reconficurable hardware for image denoising. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the 2004 International Conference on Image Processing, ICIP 2004, Singapore, October 24-27, 2004, pp. 259-262, 2004, IEEE, 0-7803-8554-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | S. Sukhsawas, Khaled Benkrid |
A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 229-232, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Aziz Ahmedsaid, Abbes Amira, Ahmed Bouridane |
Accelerating MUSIC method on reconfigurable hardware for source localisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 369-372, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
15 | Khaled Benkrid, S. Sukhsawas, Danny Crookes, Samir Belkacemi |
A single-FPGA implementation of image connected component labelling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 238, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid |
An FPGA-Based Image Connected Component Labeller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1012-1015, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Jun Jiang, Wayne Luk, Daniel Rueckert |
FPGA-Based Computation of Free-Form Deformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1057-1061, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Miroslav Lícko, Jan Schier, Milan Tichý, Markus Kühl |
MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 984-987, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Eva M. Ortigosa, Pilar Martínez Ortigosa, Antonio Cañas, Eduardo Ros 0001, Rodrigo Agís, Julio Ortega 0001 |
FPGA Implemenation of Multi-layer Perceptrons for Speech Recognition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1048-1052, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | David Rodríguez Lozano, Juan Manuel Sánchez-Pérez, Juan Antonio Gómez Pulido |
Reconfigurable Hybrid Architecture for Web Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1091-1094, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Tim Todman, Wayne Luk |
Combining Imperative and Declarative Hardware Descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 36th Hawaii International Conference on System Sciences (HICSS-36 2003), CD-ROM / Abstracts Proceedings, January 6-9, 2003, Big Island, HI, USA, pp. 280, 2003, IEEE Computer Society, 0-7695-1874-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Martyn Edwards, Benjamin Fozard |
Rapid Prototyping of Mixed Hardware and Software Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 118-125, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier |
Integration of Reconfigurable Hardware into System-Level Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 987-996, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | John Hawkins, Ali E. Abdallah |
An Overview of Systematic Development of Parallel Systems for Reconfigurable Hardware (Research Note). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2002, Parallel Processing, 8th International Euro-Par Conference Paderborn, Germany, August 27-30, 2002, Proceedings, pp. 615-619, 2002, Springer, 3-540-44049-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Henry Styles, Wayne Luk |
Accelerating Radiosity Calculations Using Reconfigurable Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 22-24 April 2002, Napa, CA, USA, Proceedings, pp. 279-281, 2002, IEEE Computer Society, 0-7695-1801-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier |
System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 115-121, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Peter McCurry, Fearghal Morgan, Liam Kilmartin |
Xilinx FPGA implementation of an image classifier for object detection applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (3) ![In: Proceedings of the 2001 International Conference on Image Processing, ICIP 2001, Thessaloniki, Greece, October 7-10, 2001, pp. 346-349, 2001, IEEE, 0-7803-6725-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Jim Woodcock 0001, Ana Cavalcanti 0001 |
The Steam Boiler in a Unified Theory of Z and CSP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 8th Asia-Pacific Software Engineering Conference (APSEC 2001), 4-7 December 2001, Macau, China, pp. 291-298, 2001, IEEE Computer Society, 0-7695-1408-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Milan Vasilko, Lukas Machácek, Marek Matej, Piotr Stepien, Steve Holloway |
A Rapid Prototyping Methodology and Platform for Seamless Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA, pp. 70-76, 2001, IEEE Computer Society, 0-7695-1206-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
15 | Henry Styles, Wayne Luk |
Customizing Graphics Applications: Techniques and Programming Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings, pp. 77-90, 2000, IEEE Computer Society, 0-7695-0871-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|