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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 433 occurrences of 270 keywords
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Results
Found 2671 publication records. Showing 2671 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
64 | Jungseob Lee, Nam Sung Kim |
Optimizing total power of many-core processors considering voltage scaling limit and process variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009, pp. 201-206, 2009, ACM, 978-1-60558-684-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
voltage and frequency scaling, process variations, parallel applications, many-core processor |
61 | Robert Law |
Using student blogs for documentation in software development projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITiCSE ![In: Proceedings of the 16th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, ITiCSE 2011, Darmstadt, Germany, June 27-29, 2011, pp. 366, 2011, ACM, 978-1-4503-0697-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
53 | Colin J. Ihrig, Rami G. Melhem, Alex K. Jones |
Automated modeling and emulation of interconnect designs for many-core chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 431-436, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
simulation, interconnection network, emulation, multi-core, many-core |
51 | Jishen Zhao, Xiangyu Dong, Yuan Xie 0001 |
Cost-aware three-dimensional (3D) many-core multiprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 126-131, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
3D IC design, many-core processor design, cost modeling |
51 | Ping Lai, Pavan Balaji, Rajeev Thakur, Dhabaleswar K. Panda 0001 |
ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Res. Dev. ![In: Comput. Sci. Res. Dev. 23(3-4), pp. 133-142, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Protocol offload/onload, Multi-core, Many-core |
50 | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 78-87, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
DTA, many-core architectures |
49 | Rob van Nieuwpoort, John W. Romein |
Using many-core hardware to correlate radio astronomy signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 440-449, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
lofar, correlator, many-core |
49 | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su |
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 148-153, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
architecture, debugging, many-core, race detection |
47 | Guoping Long, Dongrui Fan, Junchao Zhang, Fenglong Song, Nan Yuan, Wei Lin 0004 |
A Performance Model of Dense Matrix Operations on Many-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2008 - Parallel Processing, 14th International Euro-Par Conference, Las Palmas de Gran Canaria, Spain, August 26-29, 2008, Proceedings, pp. 120-129, 2008, Springer, 978-3-540-85450-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
dense matrix, performance model, memory bandwidth, many-core architecture |
45 | Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin |
Efficient fault simulation on many-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 380-385, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
PPSFP, parallel fault simulation, many-core processors |
45 | Gregory F. Diamos, Sudhakar Yalamanchili |
Harmony: an execution model and runtime for heterogeneous many core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 17th International Symposium on High-Performance Distributed Computing (HPDC-17 2008), 23-27 June 2008, Boston, MA, USA, pp. 197-200, 2008, ACM, 978-1-59593-997-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scheduling, optimization, heterogeneous, gpgpu, performance monitoring, dependency graph, many core, runtime, harmony |
44 | Edward C. Herrmann, Prudhvi Janga, Philip A. Wilsey |
Pre-computing Function Results in Multi-Core and Many-Core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP Workshops ![In: 2011 International Conference on Parallel Processing Workshops, ICPPW 2011, Taipei, Taiwan, Sept. 13-16, 2011, pp. 437-446, 2011, IEEE Computer Society, 978-1-4577-1337-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
transparent parallelism, multi-threading, many-core |
44 | Teng Ma, George Bosilca, Aurélien Bouteiller, Brice Goglin, Jeffrey M. Squyres, Jack J. Dongarra |
Kernel Assisted Collective Intra-node MPI Communication among Multi-Core and Many-Core CPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: International Conference on Parallel Processing, ICPP 2011, Taipei, Taiwan, September 13-16, 2011, pp. 532-541, 2011, IEEE Computer Society, 978-1-4577-1336-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
MPI, shared memory, multi-core, kernel, collective communication, many-core, NUMA |
44 | Weirong Zhu, Vugranam C. Sreedhar, Ziang Hu, Guang R. Gao |
Synchronization state buffer: supporting efficient fine-grain synchronization on many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 35-45, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
SSB, fine-grain synchronization, many-core |
43 | Wenlong Li, Xiaofeng Tong, Tao Wang 0003, Yimin Zhang 0002, Yen-Kuang Chen |
Parallelization Strategies and Performance Analysis of Media Mining Applications on Multi-Core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(2), pp. 213-228, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Media mining, Performance analysis, Parallelization, Multi-core processor |
41 | Jin Zhou, Brian Demsky |
Bamboo: a data-centric, object-oriented approach to many-core software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2010 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2010, Toronto, Ontario, Canada, June 5-10, 2010, pp. 388-399, 2010, ACM, 978-1-4503-0019-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
data-centric languages, many-core programming |
41 | José L. Abellán, Juan Fernández 0001, Manuel E. Acacio |
Efficient and scalable barrier synchronization for many-core CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 73-74, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
g-line-based barrier synchronization, global interconnection lines, many-core cmps, s-csma technique |
41 | Dean Truong, Bevan M. Baas |
Circuit modeling for practical many-core architecture design exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 627-628, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
dynamic frequency and voltage scaling, control, many-core |
41 | Ronny Ronen |
Larrabee: a many-core Intel architecture for visual computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 225, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
graphics architecture, many-core computing, parrallel processing, processor arechitecture, software rendering |
41 | Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Michael Abrash, Pradeep Dubey, Stephen Junkins, Adam T. Lake, Jeremy Sugerman, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Pat Hanrahan |
Larrabee: a many-core x86 architecture for visual computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Graph. ![In: ACM Trans. Graph. 27(3), pp. 18, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
graphics architecture, many-core computing, realtime graphics, software rendering, throughput computing, visual computing, parallel processing, GPGPU, SIMD |
38 | Chan-Eun Rhee, Han-You Jeong, Soonhoi Ha |
Many-to-Many Core-Switch Mapping in 2-D Mesh NoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 438-443, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Zhitao Wan |
A Network Virtualization Approach in Many-core Processor Based Cloud Computing Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICSyN ![In: Third International Conference on Computational Intelligence, Communication Systems and Networks, CICSyN 2011, Bali, Indonesia, 26-28 July, 2011, pp. 304-307, 2011, IEEE Computer Society, 978-1-4577-0975-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
cloud computing, hypervisor, network virtualization, many-core processor |
38 | Xuan-Yi Lin, Kuan-Chou Lai, Shau-Yin Tseng, Kuan-Ching Li, Yeh-Ching Chung |
An Efficient Programming Paradigm for Shared-Memory Master-Worker Video Decoding on TILE64 Many-Core Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: International Conference on Parallel Processing, ICPP 2011, Taipei, Taiwan, September 13-16, 2011, pp. 414-423, 2011, IEEE Computer Society, 978-1-4577-1336-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
producer-consumer, TILE64, shared memory, programming paradigm, many-core, master-worker |
38 | Alberto Ros 0001, Manuel E. Acacio, José M. García 0001 |
A Direct Coherence Protocol for Many-Core Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 21(12), pp. 1779-1792, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Many-core CMP, direct coherence, indirection problem, on-chip network traffic, cache coherence protocol |
38 | Wei Hu 0001, Xingsheng Tang, Bin Xie 0002, Tianzhou Chen, Dazhou Wang |
An Efficient Power-Aware Optimization for Task Scheduling on NoC-based Many-core System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: 10th IEEE International Conference on Computer and Information Technology, CIT 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010, pp. 171-178, 2010, IEEE Computer Society, 978-0-7695-4108-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
network-on-chip, energy consumption, task schedule, many-core |
38 | Hans G. Kerkhoff, Xiao Zhang 0002 |
Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: Fifth IEEE International Symposium on Electronic Design, Test & Applications, DELTA 2010, Ho Chi Minh City, Vietnam, January 13-15, 2010, pp. 270-275, 2010, IEEE Computer Society, 978-0-7695-3978-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
DfX, reliability, SoC, dependability, reconfiguration, availability, BIST, many-core processors |
38 | Fadi N. Sibai |
Low Diameter Unicast On-Chip Interconnection Networks for Many-Core Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISIS ![In: CISIS 2010, The Fourth International Conference on Complex, Intelligent and Software Intensive Systems, Krakow, Poland, 15-18 February 2010, pp. 944-949, 2010, IEEE Computer Society, 978-0-7695-3967-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
many core embedded systems, On-chip interconnection networks, network diameter |
38 | Edward C. Herrmann, Philip A. Wilsey |
Threaded Dynamic Memory Management in Many-Core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISIS ![In: CISIS 2010, The Fourth International Conference on Complex, Intelligent and Software Intensive Systems, Krakow, Poland, 15-18 February 2010, pp. 931-936, 2010, IEEE Computer Society, 978-0-7695-3967-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
SPEC benchmarks, threads, Many-core, dynamic memory |
38 | Xu Wang, Ge Gan, Dongrui Fan, Shuxu Guo |
GFFC: The Global Feedback Based Flow Control in the NoC Design for Many-core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: NPC 2009, Sixth IFIP International Conference on Network and Parallel Computing, Gold Coast, Australia, October 19-21, 2009, pp. 227-232, 2009, IEEE Computer Society, 978-0-7695-3837-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
global feedback, flow control, NoC, many-core |
38 | Lei Yu 0012, Zhiyong Liu 0002, Dongrui Fan, Fenglong Song, Junchao Zhang, Nan Yuan |
Study on Fine-Grained Synchronization in Many-Core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SNPD ![In: 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing, SNPD 2009, in conjunction with 3rd International Workshop on e-Activity, IWEA 2009, 1st International Workshop on Enterprise Architecture Challenges and Responses, WEACR 2009, Catholic University of Daegu, Daegu, Korea, 27-29 May 2009, pp. 524-529, 2009, IEEE Computer Society, 978-0-7695-3642-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fine-grained synchronization, speedup, thread-level parallelism, many-core |
38 | Yongbin Zhou, Junchao Zhang, Shuai Zhang, Nan Yuan, Dongrui Fan |
Data Management: The Spirit to Pursuit Peak Performance on Many-Core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009, Chengdu, Sichuan, China, 10-12 August 2009, pp. 559-564, 2009, IEEE Computer Society, 978-0-7695-3747-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
1-D FFT, asynchronous data transfer, Many-core, Scratchpad memory |
38 | Fenglong Song, Zhiyong Liu 0002, Dongrui Fan, He Huang, Nan Yuan, Lei Yu 0012, Junchao Zhang |
Evaluation Method of Synchronization for Shared-Memory On-Chip Many-Core Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009, Chengdu, Sichuan, China, 10-12 August 2009, pp. 571-576, 2009, IEEE Computer Society, 978-0-7695-3747-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
evaluation, synchronization, hardware-supported, micro-benchmark, many-core architecture |
38 | Guoping Long, Dongrui Fan, Junchao Zhang |
Architectural support for cilk computations on many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2009, Raleigh, NC, USA, February 14-18, 2009, pp. 285-286, 2009, ACM, 978-1-60558-397-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, many-core, memory consistency, cilk |
38 | Wei Huang 0004, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Ribando, Kevin Skadron |
Many-core design from a thermal perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 746-749, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
many-core design, thermal design power, performance, temperature |
36 | Pedro Alonso 0002, Manuel F. Dolz, Francisco D. Igual, Bryan Marker, Rafael Mayo 0002, Enrique S. Quintana-Ortí, Robert A. van de Geijn |
Power-aware Dense Linear Algebra Implementations on Multi-core and Many-core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MARC Symposium ![In: 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011, pp. 103-106, 2011, KIT Scientific Publishing, Karlsruhe, 978-3-86644-717-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
32 | Joel C. Adams, Daniel J. Ernst, Thomas Murphy, Ariel Ortiz |
Multicore education: pieces of the parallel puzzle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 41st ACM technical symposium on Computer science education, SIGCSE 2010, Milwaukee, Wisconsin, USA, March 10-13, 2010, pp. 194-195, 2010, ACM, 978-1-4503-0006-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
parallel, concurrency, training, programming, curriculum, languages, multi-core, workshops, many-core, faculty |
32 | Tameesh Suri, Aneesh Aggarwal |
Scalable Multi-cores with Improved Per-core Performance Using Off-the-critical Path Reconfigurable Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings, pp. 365-377, 2008, Springer, 978-3-540-89893-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Takanori Ueda, Yu Hirate, Hayato Yamana |
Exploiting idle CPU cores to improve file access performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICUIMC ![In: Proceedings of the 3rd International Conference on Ubiquitous Information Management and Communication, ICUIMC 2009, Suwon, Korea, January 15-16, 2009, pp. 529-535, 2009, ACM, 978-1-60558-405-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
access pattern mining, many core, access pattern, replacement algorithm, buffer caching |
31 | Haitham Akkary, Komal Jothi, Renjith Retnamma, Satyanarayana Nekkalapu, Doug Hall, Shahrokh Shahidzadeh |
On the potential of latency tolerant execution in speculative multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFMT ![In: Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, IFMT 2008, Cairo, Egypt, November 24-25, 2008, pp. 3, 2008, ACM, 978-1-60558-407-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
latency-tolerant architectures, chip multiprocessors, speculative multithreading, many-core processors |
31 | Yasutaka Tsunakawa |
Needs and trends in embedded software development for consumer electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 301-303, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas |
The BubbleWrap many-core: popping cores for sequential acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 447-458, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
power wall, process scaling, processor aging, voltage scaling |
29 | Ryota Kayanoma, Akira Jinguji, Hiroki Nakahara |
A Many-core Architecture for an Ensemble Ternary Neural Network Toward High-Throughput Inference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023, pp. 446-453, 2023, IEEE, 979-8-3503-9361-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Mahmoud Ahmed Elshimy, Veronia Iskandar, Diana Goehringer, Mohamed A. Abd El Ghany |
A Near-Memory Dynamically Programmable Many-Core Overlay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023, pp. 268-275, 2023, IEEE, 979-8-3503-9361-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Thomas Abbott, Bevan M. Baas |
A Scalable JPEG Encoder on a Many-Core Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2023, Singapore, December 18-21, 2023, pp. 411-418, 2023, IEEE, 979-8-3503-9361-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
29 | Peiyao Shi, Aaron Stillmaker, Bevan M. Baas |
Efficient and High-Performance Sparse Matrix-Vector Multiplication on a Many-Core Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2022, Penang, Malaysia, December 19-22, 2022, pp. 187-194, 2022, IEEE, 978-1-6654-6499-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
29 | Daichi Mukunoki, Yusuke Hirota, Toshiyuki Imamura |
Task Scheduling Strategies for Batched Basic Linear Algebra Subprograms on Many-core CPUs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2021, Singapore, Singapore, December 20-23, 2021, pp. 234-241, 2021, IEEE, 978-1-6654-3860-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
29 | Jagadish Kumar Ranbirsingh, Hanke Kimm, Haklin Kimm |
Distributed Neural Networks using TensorFlow over Multicore and Many-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2019, Singapore, Singapore, October 1-4, 2019, pp. 101-107, 2019, IEEE, 978-1-7281-4882-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Jan Spieck, Stefan Wildermann, Tobias Schwarzer, Jürgen Teich, Michael Glaß |
Data-Driven Scenario-Based Application Mapping for Heterogeneous Many-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2019, Singapore, Singapore, October 1-4, 2019, pp. 334-341, 2019, IEEE, 978-1-7281-4882-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
29 | Nouredine Melab, Jan Gmys, Mohand-Said Mezmaz, Daniel Tuyttens |
Multi-core versus many-core computing for many-task Branch-and-Bound applied to big optimization problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Future Gener. Comput. Syst. ![In: Future Gener. Comput. Syst. 82, pp. 472-481, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
29 | Tobias Schwarzer, Sascha Roloff, Valentina Richthammer, Rami Khaldi, Stefan Wildermann, Michael Glaß, Jürgen Teich |
On the Complexity of Mapping Feasibility in Many-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018, pp. 176-183, 2018, IEEE Computer Society, 978-1-5386-6689-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
29 | Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique 0001, Tulika Mitra, Jörg Henkel |
Scalable Dynamic Task Scheduling on Adaptive Many-Core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2018, Hanoi, Vietnam, September 12-14, 2018, pp. 168-175, 2018, IEEE Computer Society, 978-1-5386-6689-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
29 | Maria Mendez Real |
Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core Architectures. (Isolation physique contre les attaques logiques par canaux cachés basées sur le cache dans des architectures many-core). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2017 |
RDF |
|
29 | Alessandro Capotondi |
Programming models and tools for many-core platforms ; Modelli e strumenti di programmazione parallela per piattaforme many-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
29 | Lars Middendorf, Christian Haubelt |
Supporting Static Binding in Stream Rewriting for Heterogeneous Many-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSOC 2016, Lyon, France, September 21-23, 2016, pp. 273-280, 2016, IEEE Computer Society, 978-1-5090-3531-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Maximilian Gotzinger, Amir M. Rahmani, Martin Pongratz, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen |
The Role of Self-Awareness and Hierarchical Agents in Resource Management for Many-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSOC 2016, Lyon, France, September 21-23, 2016, pp. 53-60, 2016, IEEE Computer Society, 978-1-5090-3531-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | Yiannis Nikolakopoulos, Marina Papatriantafilou, Peter Brauer, Martin Lundqvist, Vincenzo Gulisano, Philippas Tsigas |
Highly Concurrent Stream Synchronization in Many-core Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES@ISCA ![In: Proceedings of the Fourth ACM International Workshop on Many-core Embedded Systems, MES@ISCA 2016, Seoul, Republic of Korea, June 19, 2016, pp. 2-9, 2016, ACM, 978-1-4503-4262-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
29 | César Fuguet Tortolero |
Introduction of Fault-Tolerance Mechanisms for Permanent Failures in Coherent Shared-Memory Many-Core Architectures. (Introduction de mécanismes de tolérance aux pannes franches dans les architectures de processeur « many-core » à mémoire partagée cohérente). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
29 | Eleni Kanellou |
Data Structures for Current Multi-core and Future Many-core Architectures. (Structures de données pour des architectures multi-cœur actuelles et de futures architectures many-cœur). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
29 | Ryohei Kobayashi, Kenji Kise |
FACE: Fast and Customizable Sorting Accelerator for Heterogeneous Many-core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 49-56, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Chuan Tang, Dan Liu, Zuocheng Xing, Peng Yang 0003, Zhe Wang 0003, Jiang Xu 0001 |
Memory Access Analysis of Many-core System with Abundant Bandwidth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 187-194, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Giuseppe Tagliavini, Germain Haugou, Andrea Marongiu, Luca Benini |
ADRENALINE: An OpenVX Environment to Optimize Embedded Vision Applications on Many-core Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 289-296, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Gianvito Urgese, Francesco Barchi, Enrico Macii |
Top-Down Profiling of Application Specific Many-core Neuromorphic Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 127-134, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Hiroshi Nakahara, Tomoya Ozaki, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano |
Expandable Chip Stacking Method for Many-core Architectures Consisting of Tiny Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 41-48, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Tiana A. Rakotovao, Diego Puschini, Julien Mottin, Lukas Rummelhard, Amaury Nègre, Christian Laugier |
Intelligent Vehicle Perception: Toward the Integration on Embedded Many-core. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARMA-DITAM@HiPEAC ![In: Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2015, Amsterdam, Netherlands, January 21, 2015, pp. 7-12, 2015, ACM, 978-1-4503-3343-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Rishad A. Shafik, Anup Das 0001, Sheng Yang 0003, Geoff V. Merrett, Bashir M. Al-Hashimi |
Adaptive Energy Minimization of OpenMP Parallel Applications on Many-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARMA-DITAM@HiPEAC ![In: Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2015, Amsterdam, Netherlands, January 21, 2015, pp. 19-24, 2015, ACM, 978-1-4503-3343-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
29 | Taeyoung Kim, Jintaek Kang, Sungchan Kim, Soonhoi Ha |
SoPHy: A Software Platform for Hybrid Resource Management of Homogeneous Many-core Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES@ISCA ![In: Proceedings of the 3rd International Workshop on Many-core Embedded Systems (MES'2015) held on June 13, 2015 in conjunction with the 42nd International Symposium on Computer Architecture (ISCA'2015), Portland, OR, USA, pp. 17-24, 2014, ACM, 978-1-4503-3408-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Christian Pinto, Andrea Marongiu, Luca Benini |
A Virtualization Framework for IOMMU-less Many-Core Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014., pp. 33-40, 2014, ACM, 978-1-4503-2822-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Xuhao Chen 0001, Shengzhao Wu, Li-Wen Chang, Wei-Sheng Huang, Carl Pearson, Zhiying Wang 0003, Wen-mei W. Hwu |
Adaptive Cache Bypass and Insertion for Many-core Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014., pp. 1-8, 2014, ACM, 978-1-4503-2822-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Vincenzo Catania, Andrea Mineo, Salvatore Monteleone, Davide Patti |
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 2nd International Workshop on Many-core Embedded Systems, MES'2014, in conjunction with the 41st International Symposium on Computer Architecture, ISCA'2014, Minneapolis, MN, USA, June 15, 2014., pp. 17-24, 2014, ACM, 978-1-4503-2822-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Itai Avron, Ran Ginosar |
Hardware Scheduler Performance on the Plural Many-Core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES@ISCA ![In: Proceedings of the 3rd International Workshop on Many-core Embedded Systems (MES'2015) held on June 13, 2015 in conjunction with the 42nd International Symposium on Computer Architecture (ISCA'2015), Portland, OR, USA, pp. 48-51, 2014, ACM, 978-1-4503-3408-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | James A. Ross, David A. Richie, Song Jun Park, Dale R. Shires |
Parallel Programming Model for the Epiphany Many-Core Coprocessor Using Threaded MPI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES@ISCA ![In: Proceedings of the 3rd International Workshop on Many-core Embedded Systems (MES'2015) held on June 13, 2015 in conjunction with the 42nd International Symposium on Computer Architecture (ISCA'2015), Portland, OR, USA, pp. 41-47, 2014, ACM, 978-1-4503-3408-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
29 | Satoshi Kawakami, Akihito Iwanaga, Koji Inoue |
Many-core acceleration for model predictive control systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, MES'2013, Held in conjunction with the 40th Annual IEEE/ACM International Symposium on Computer Architecture, ISCA 2013, June 24, 2013., pp. 17-24, 2013, ACM, 978-1-4503-2063-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Jyu-Yuan Lai, Ting-Shuo Hsu, Po-Yu Chen, Chih-Tsun Huang, Yu-Hsun Chen, Jing-Jia Liou |
Design of high-throughput Inter-PE communication with application-level flow control protocol for many-core architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, MES'2013, Held in conjunction with the 40th Annual IEEE/ACM International Symposium on Computer Architecture, ISCA 2013, June 24, 2013., pp. 41-44, 2013, ACM, 978-1-4503-2063-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Akio Shimada, Balazs Gerofi, Atsushi Hori, Yutaka Ishikawa |
Proposing a new task model towards many-core architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MES ![In: Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, MES'2013, Held in conjunction with the 40th Annual IEEE/ACM International Symposium on Computer Architecture, ISCA 2013, June 24, 2013., pp. 45-48, 2013, ACM, 978-1-4503-2063-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
29 | Alexander Heinecke, Michael Klemm, Hans-Joachim Bungartz |
From GPGPU to Many-Core: Nvidia Fermi and Intel Many Integrated Core Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Eng. ![In: Comput. Sci. Eng. 14(2), pp. 78-83, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
29 | Janmartin Jahn, Sebastian Kobbe, Santiago Pagani, Jian-Jia Chen, Jörg Henkel |
Work in Progress: Malleable Software Pipelines for Efficient Many-core System Utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MARC Symposium ![In: 6th Many-core Applications Research Community (MARC) Symposium. Proceedings of the 6th MARC Symposium, 19-20 July 2012, Toulouse, France, pp. 30-33, 2012, ONERA, The French Aerospace Lab, 978-2-7257-0016-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
29 | Panayiotis Petrides, Andreas Diavastos, Pedro Trancoso |
Exploring Decision Support Queries on Futured Many-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MARC Symposium ![In: 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011, pp. 81-84, 2011, KIT Scientific Publishing, Karlsruhe, 978-3-86644-717-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
29 | Alexander Arlt, Jan Hendrik Schönherr, Jan Richling |
Meta-programming Many-Core Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MARC Symposium ![In: 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011, pp. 89-91, 2011, KIT Scientific Publishing, Karlsruhe, 978-3-86644-717-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
29 | Claus Braun, Hans-Joachim Wunderlich |
Algorithmen-basierte Fehlertoleranz für Many-Core-Architekturen (Algorithm-based Fault-Tolerance on Many-Core Architectures). ![Search on Bibsonomy](Pics/bibsonomy.png) |
it Inf. Technol. ![In: it Inf. Technol. 52(4), pp. 209-215, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
28 | Boris Motruk, Jonas Diemer, Philip Axer, Rainer Buchty, Mladen Berekovic |
Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: IEEE 19th Pacific Rim International Symposium on Dependable Computing, PRDC 2013, Vancouver, BC, Canada, December 2-4, 2013, pp. 293-302, 2013, IEEE Computer Society, 978-0-7695-5130-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
28 | Jeff Parkhurst |
From single core to multi-core to many core: are we ready for a new exponential? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006, pp. 210, 2006, ACM, 1-59593-347-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
The virtual write queue: coordinating DRAM and last-level cache policies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 72-82, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cmp many-core, ddr ddr2 ddr3, dram-parameters, memory-scheduling writeback, page-mode, write-queue, write-scheduling, dram, cache-replacement, last-level-cache |
27 | Bongjun Jin, Insung Ihm, Byungjoon Chang, Chanmin Park, Won-Jong Lee, Seokyoon Jung |
Selective and adaptive supersampling for real-time ray tracing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
High Performance Graphics ![In: Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2009, New Orleans, Louisiana, USA, August 1-3, 2009, pp. 117-125, 2009, Eurographics Association, 978-1-60558-603-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adaptive supersampling, real-time ray tracing, GPU computing, selective sampling, many-core processor |
27 | Marco Aldinucci, Marco Danelutto, Peter Kilpatrick |
Co-design of Distributed Systems Using Skeleton and Autonomic Management Abstractions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par Workshops ![In: Euro-Par 2008 Workshops - Parallel Processing, VHPC 2008, UNICORE 2008, HPPC 2008, SGS 2008, PROPER 2008, ROIA 2008, and DPA 2008, Las Palmas de Gran Canaria, Spain, August 25-26, 2008, Revised Selected Papers, pp. 403-414, 2008, Springer, 978-3-642-00954-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
distributed programming abstractions, multi/ many core, grids, design patterns, autonomic computing, clouds, Algorithmic skeletons |
27 | Wen-mei W. Hwu |
Many-core parallel computing - Can compilers and tools do the heavy lifting? ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | DiaaEldin Khalil, Yehea I. Ismail |
A global interconnect link design for many-core microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFMT ![In: Proceedings of the 1st international forum on Next-generation multicore/manycore technologies, IFMT 2008, Cairo, Egypt, November 24-25, 2008, pp. 14, 2008, ACM, 978-1-60558-407-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
interconnect, link, bus, repeater insertion |
26 | Weirong Zhu, Ziang Hu, Guang R. Gao |
On the Role of Deterministic Fine-Grain Data Synchronization for Scientific Applications: A Revisit in the Emerging Many-Core Era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Weirong Zhu, Ziang Hu, Guang R. Gao |
On the Role of Deterministic Fine-Grain Data Synchronization for Scientific Applications: A Revisit in the Emerging Many-Core Era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Wei Huang 0004, Karthick Rajamani, Mircea R. Stan, Kevin Skadron |
Scaling with Design Constraints: Predicting the Future of Big Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 31(4), pp. 16-29, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
big chips, cooling solution, power, system architecture, processor architecture, temperature, technology scaling, area, design constraints, many-core processor |
23 | Wenbin Fang, Bingsheng He, Qiong Luo 0001, Naga K. Govindaraju |
Mars: Accelerating MapReduce with Graphics Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 22(4), pp. 608-620, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
parallel computing, MapReduce, multicore processor, graphics processor, many-core architecture |
23 | Henrique Cota de Freitas, Lucas Mello Schnorr, Marco Antonio Zanata Alves, Philippe Olivier Alexandre Navaux |
Impact of Parallel Workloads on NoC Architecture Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: Proceedings of the 18th Euromicro Conference on Parallel, Distributed and Network-based Processing, PDP 2010, Pisa, Italy, February 17-19, 2010, pp. 551-555, 2010, IEEE Computer Society, 978-0-7695-3939-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
NoC Architectures, Parallel Workloads, General-Purpose Many-Core Processors, Performance Evaluation |
23 | Xiaolong Wu, Nady Obeid, Wen-mei W. Hwu |
Exploiting More Parallelism from Applications Having Generalized Reductions on GPU Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT ![In: 10th IEEE International Conference on Computer and Information Technology, CIT 2010, Bradford, West Yorkshire, UK, June 29-July 1, 2010, pp. 1175-1180, 2010, IEEE Computer Society, 978-0-7695-4108-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
GPUs, Reduction, Graphics Processors, Many-Core, Compiler Techniques, Automatic Transformation |
23 | Nadathur Satish, Changkyu Kim, Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, Daehyun Kim 0001, Pradeep Dubey |
Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2010, Indianapolis, Indiana, USA, June 6-10, 2010, pp. 351-362, 2010, ACM, 978-1-4503-0032-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
merge network, tlp, performance, databases, sorting, buffer, merge, many-core, simd, radix |
23 | Eric Keller, Jakub Szefer, Jennifer Rexford, Ruby B. Lee |
NoHype: virtualized cloud infrastructure without the virtualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 350-361, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
security, cloud computing, virtualization, multi-core, system architecture, hypervisor, many-core |
23 | Ganesh Venkatesh, Jack Sampson, Nathan Goulding, Saturnino Garcia, Vladyslav Bryksin, Jose Lugo-Martinez, Steven Swanson, Michael Bedford Taylor |
Conservation cores: reducing the energy of mature computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010, pp. 205-218, 2010, ACM, 978-1-60558-839-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
conservation core, heterogeneous many-core, utilization wall, patching |
23 | Daniel Sánchez 0003, Richard M. Yoo, Christos Kozyrakis |
Flexible architectural support for fine-grain scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2010, Pittsburgh, Pennsylvania, USA, March 13-17, 2010, pp. 311-322, 2010, ACM, 978-1-60558-839-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fine-grain scheduling, scheduling, chip-multiprocessors, messaging, many-core, work-stealing |
23 | Yoshi Shih-Chieh Huang, Kaven Chun-Kai Chou, Chung-Ta King, Shau-Yin Tseng |
NTPT: on the end-to-end traffic prediction in the on-chip networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 449-452, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
end-to-end traffic prediction, network-on-chip, many-core |
23 | Jeremy Sugerman, Kayvon Fatahalian, Solomon Boulos, Kurt Akeley, Pat Hanrahan |
GRAMPS: A programming model for graphics pipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Graph. ![In: ACM Trans. Graph. 28(1), pp. 4:1-4:11, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, GPUs, stream computing, many-core architectures, Graphics pipelines |
23 | Guangming Tan, Ziyu Guo, Mingyu Chen 0001, Dan Meng |
Single-particle 3d reconstruction from cryo-electron microscopy images on GPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 380-389, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cryo-em, performance tuning, many-core, gpu |
23 | M. Suhail Rehman, Kishore Kothapalli, P. J. Narayanan |
Fast and scalable list ranking on the GPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 235-243, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
irregular algorithm, parallel algorithm, gpgpu, many-core, list ranking |
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