Search results for "Nehalem"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
146	Håkon Ording Bugge	An evaluation of Intel's core i7 architecture using a comparative approach.	Comput. Sci. Res. Dev.	2009	DBLP DOI BibTeX RDF	SPEC MPI2007, Nehalem, iCore7, Harpertown, Quad-Core, QuickPath Interconnect, Moore’s Law, Benchmarking, Stream, Micro-benchmarks
132	Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang 0003	Intel nehalem processor core made FPGA synthesizable.	FPGA	2010	DBLP DOI BibTeX RDF	intel nehalem, synthesizable core, fpga, emulator
55	Subhash Saini, Andrey Naraikin, Rupak Biswas, David Barkai, Timothy Sandstrom	Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications.	SC	2009	DBLP DOI BibTeX RDF
54	Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel	Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems.	MICRO	2009	DBLP DOI BibTeX RDF	Nehalem, Shanghai, benchmark, multi-core, coherency
46	Li Zhao 0002, Ravi R. Iyer 0001, Srihari Makineni, Don Newell, Liqun Cheng	NCID: a non-inclusive cache, inclusive directory architecture for flexible and efficient cache hierarchies.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	cache, directory
32	Satish Kumar Sadasivam, S. Thamarai Selvi	Comparative performance study of SPEC INT 2006 benchmarks on nehalem, sandybridge and haswell microarchitectures.	CITS	2015	DBLP DOI BibTeX RDF
32	Nuutti Varis, Jukka Manner	In the network: sandy bridge versus nehalem.	SIGMETRICS Perform. Evaluation Rev.	2011	DBLP DOI BibTeX RDF
32	Subhash Saini, Piyush Mehrotra, Kenichi Taylor, Michael J. Aftosmis, Rupak Biswas	Performance Analysis of CFD Application Cart3D Using MPInside and Performance Monitor Unit Data on Nehalem and Westmere Based Supercomputers.	HPCC	2011	DBLP DOI BibTeX RDF
32	Ahmed Bukhamsin, Mohamad Sindi, Jallal Al-Jallal	Using the Intel MPI benchmarks (IMB) to evaluate MPI implementations on an Infiniband Nehalem Linux cluster.	SpringSim	2010	DBLP DOI BibTeX RDF
32	Christian Iwainsky, Thomas Reichstein, Christopher Dahnken, Dieter an Mey, Christian Terboven, Andrey Semin, Christian H. Bischof	An Approach to Visualize Remote Socket Traffic on the Intel Nehalem-EX.	Euro-Par Workshops	2010	DBLP DOI BibTeX RDF
32	Mohamad Sindi	Evaluating MPI Implementations Using HPL on an Infiniband Nehalem Linux Cluster.	ITNG	2010	DBLP DOI BibTeX RDF	Aramco, MPI, Linux, HPC, Linpack
32	Nasser A. Kurd, Praveen Mosalikanti, Mark Neidengard, Jonathan Douglas, Rajesh Kumar	Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) Clocking.	IEEE J. Solid State Circuits	2009	DBLP DOI BibTeX RDF
32	Thomas Zeiser, Georg Hager, Gerhard Wellein	Benchmark Analysis and Application Results for Lattice Boltzmann Simulations on NEC SX Vector and Intel Nehalem Systems.	Parallel Process. Lett.	2009	DBLP DOI BibTeX RDF
32	Lily Pao Looi, Stéphan Jourdan	Transitioning the Intel® next generation microarchitectures (nehalem and westmere) into the mainstream.	Hot Chips Symposium	2009	DBLP DOI BibTeX RDF
32	Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller	Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System.	PACT	2009	DBLP DOI BibTeX RDF
32	Kevin J. Barker, Kei Davis, Adolfy Hoisie, Darren J. Kerbyson, Michael Lang 0003, Scott Pakin, José Carlos Sancho	A Performance Evaluation of the Nehalem Quad-Core Processor for Scientific Computing.	Parallel Process. Lett.	2008	DBLP DOI BibTeX RDF
23	Sung-Boem Park, Anne Bracy, Hong Wang 0003, Subhasish Mitra	BLoG: post-silicon bug localization in processors using bug localization graphs.	DAC	2010	DBLP DOI BibTeX RDF	IFRA, BLoG, silicon debug, post-silicon validation
23	Ryad Benadjila, Olivier Billet, Shay Gueron, Matthew J. B. Robshaw	The Intel AES Instructions Set and the SHA-3 Candidates.	ASIACRYPT	2009	DBLP DOI BibTeX RDF
23	Alexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal	Synchronization optimizations for efficient execution on multi-cores.	ICS	2009	DBLP DOI BibTeX RDF	compilers, synchronization, multithreading, code motion
23	Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi	Performance evaluation of NEC SX-9 using real science and engineering applications.	SC	2009	DBLP DOI BibTeX RDF