Search results for "PCI-Express"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
160	Venkata Krishnan, David Mayhew	Localized Congestion Control in Advanced Switching Interconnects.	IEEE Micro	2005	DBLP DOI BibTeX RDF
127	Eugin Hyun, Kwang-Su Seong	The Effective Buffer Architecture for Data Link Layer of PCI Express.	ITCC (1)	2004	DBLP DOI BibTeX RDF	PCI, Data Link Layer, Buffer management, Buffer, PCI Express
123	Venkata Krishnan, Tim Miller, Herman Paraison	Dolphin express: A transparent approach to enhancing PCI Express.	CLUSTER	2007	DBLP DOI BibTeX RDF
111	Ray Bittner	Bus mastering PCI express in an FPGA.	FPGA	2009	DBLP DOI BibTeX RDF	bus mastering, pcie, performance, fpga, design, pci express
111	Venkata Krishnan	Evaluation of an Integrated PCI Express IO Expansion and Clustering Fabric.	Hot Interconnects	2008	DBLP DOI BibTeX RDF	IO Expansion, clustering, interconnect, sockets, PCI Express
101	Ranjit Noronha, Dhabaleswar K. Panda 0001	Can high performance software DSM systems designed with InfiniBand features benefit from PCI-Express?	CCGRID	2005	DBLP DOI BibTeX RDF
96	Akira Nishida	Building Cost Effective High Performance Computing Environment via PCI Express.	ICPP Workshops	2006	DBLP DOI BibTeX RDF	sparse linear algebra operations, Opteron processor, NUMA systems, InfiniBand, PCI Express
80	Eugin Hyun, Kwang-Su Seong	Design and Verification for PCI Express Controller.	ICITA (1)	2005	DBLP DOI BibTeX RDF
75	Jiuxing Liu, Amith R. Mamidala, Abhinav Vishnu, Dhabaleswar K. Panda 0001	Evaluating InfiniBand Performance with PCI Express.	IEEE Micro	2005	DBLP DOI BibTeX RDF
73	Min An Song	System Level Assertion-Based Verification Environment for PCI/PCI-X and PCI-Express.	CIS	2007	DBLP DOI BibTeX RDF
61	Sayantan Sur, Abhinav Vishnu, Hyun-Wook Jin, Wei Huang 0003, Dhabaleswar K. Panda 0001	Can Memory-Less Network Adapters Benefit Next-Generation InfiniBand Systems?.	Hot Interconnects	2005	DBLP DOI BibTeX RDF
58	Venkata Krishnan	Towards an integrated IO and clustering solution using PCI express.	CLUSTER	2007	DBLP DOI BibTeX RDF
49	David C. Keezer, Dany Minier, Patrice Ducharme	Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	control structure reliability, multi-gigahertz testing, picosecond timing accuracy, jitter-tolerance testing, jitter injection, fault tolerance, testing
49	Debendra Das Sharma, Swadesh Choudhary	Pipelined and Partitionable Forward Error Correction and Cyclic Redundancy Check Circuitry Implementation for PCI Express 6.0 and Compute Express Link 3.0.	IEEE Micro	2024	DBLP DOI BibTeX RDF
49	Dejan Vucinic, Qingbo Wang, Cyril Guyot, Robert Mateescu, Filip Blagojevic, Luiz Franca-Neto, Damien Le Moal, Trevor Bunker, Jian Xu 0012, Steven Swanson, Zvonimir Bandic	DC express: shortest latency protocol for reading phase change memory over PCI express.	FAST	2014	DBLP BibTeX RDF
47	Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata	High-Speed, Short-Latency Multipath Ethernet Transport for Interconnections.	Hot Interconnects	2008	DBLP DOI BibTeX RDF	Interconnection, Ethernet, Multipath, PCI-Express
41	Yung-Hen Lee, Jian-Jia Chen, Tei-Wei Kuo	Energy-Efficiency on a Variable-Bitrate Device.	EUC Workshops	2007	DBLP DOI BibTeX RDF
41	Wei Huang 0003, Gopalakrishnan Santhanaraman, Hyun-Wook Jin, Dhabaleswar K. Panda 0001	Scheduling of MPI-2 One Sided Operations over InfiniBand.	IPDPS	2005	DBLP DOI BibTeX RDF
37	Min-An Song, Ting-Chun Huang, Sy-Yen Kuo	A Functional Verification Environment for Advanced Switching Architecture.	DELTA	2006	DBLP DOI BibTeX RDF
34	Debendra Das Sharma, Swadesh Choudhary	Pipelined and Partitionable Forward Error Correction and Cyclic Redundancy Check Circuitry Implementation for PCI Express® 6.0.	HOTI	2023	DBLP DOI BibTeX RDF
34	Debendra Das Sharma	A Low-Latency and Low-Power Approach for Coherency and Memory Protocols on PCI Express 6.0 PHY at 64.0 GT/s With PAM-4 Signaling.	IEEE Micro	2022	DBLP DOI BibTeX RDF
34	Debendra Das Sharma	PCI Express 6.0 Specification: A Low-Latency, High-Bandwidth, High-Reliability, and Cost-Effective Interconnect With 64.0 GT/s PAM-4 Signaling.	IEEE Micro	2021	DBLP DOI BibTeX RDF
34	Debendra Das Sharma	A low latency approach to delivering alternate protocols with coherency and memory semantics using PCI Express® 6.0 PHY at 64.0 GT/s.	HOTI	2021	DBLP DOI BibTeX RDF
34	Oguzhan Sezenlik, Sebastian Schüller, Joachim K. Anlauf	VerCoLib: Fast and Versatile Communication for FPGAs via PCI Express.	J. Signal Process. Syst.	2020	DBLP DOI BibTeX RDF
34	Kwangho Cha, Kyungmo Koo, Hyun Mi Jung	Performance improvement of PCI Express adapter cards by adjusting the location of DMA functions.	RACS	2020	DBLP DOI BibTeX RDF
34	Mike Bichan, Clifford Ting, Bahram Zand, Jing Wang, Ruslana Shulyzki, James Guthrie, Katya Tyshchenko, Junhong Zhao, Alireza Parsafar, Eric Liu, Aynaz Vatankhahghadim, Shaham Sharifian, Aleksey Tyshchenko, Michael De Vita, Syed Rubab, Sitaraman Iyer, Fulvio Spagna, Noam Dolev	A 32Gb/s NRZ 37dB SerDes in 10nm CMOS to Support PCI Express Gen 5 Protocol.	CICC	2020	DBLP DOI BibTeX RDF
34	Debendra Das Sharma	PCI Express® 6.0 Specification at 64.0 GT/s with PAM-4 signaling: a low latency, high bandwidth, high reliability and cost-effective interconnect.	Hot Interconnects	2020	DBLP DOI BibTeX RDF
34	Richard Solomon	PCI Express [Product Reviews].	IEEE Consumer Electron. Mag.	2019	DBLP DOI BibTeX RDF
34	Yinghua Zhang, Lei Wang 0093, Jian Liu 0026, Yunfeng Peng, Jiapeng Pu, Guozhong Sun	Evaluation and Testing of PCI Express 8-Gbps Re-timer in Storage Server.	ICAIS (3)	2019	DBLP DOI BibTeX RDF
34	Jung-Hoon Cho, Soo-Il Choi	PCI-Express Gen4.0 based Portable SSD Test System.	ICEIC	2019	DBLP DOI BibTeX RDF
34	Kyungmo Koo, Junglok Yu, Sangwan Kim, Min Choi, Kwangho Cha	Implementation of Multipurpose PCI Express Adapter Cards with On-Board Optical Module.	J. Inf. Process. Syst.	2018	DBLP DOI BibTeX RDF
34	Oguzhan Sezenlik, Sebastian Schüller, Joachim K. Anlauf	VerCoLib: Fast and Versatile Communication for FPGAs via PCI Express.	ARC	2018	DBLP DOI BibTeX RDF
34	Lukás Kekely, Martin Spinler, Stepán Friedl, Jiri Sikora, Jan Korenek, Viktor Pus	Demonstration of Full-Duplex Packet Transfers Over PCI Express with Sustained 200 Gbps Throughput.	FPT	2018	DBLP DOI BibTeX RDF
34	Mohammad Alian, Krishna Parasuram Srinivasan, Nam Sung Kim	Simulating PCI-Express Interconnect for Future System Exploration.	IISWC	2018	DBLP DOI BibTeX RDF
34	Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Edgar-Andrei Vega-Ochoa, Nagib Hakim	Direct optimization of a PCI express link equalization in industrial post-silicon validation.	LATS	2018	DBLP DOI BibTeX RDF
34	Mohd Amiruddin Bin Zainol	PCI express performance and energy optimisation with parallel data compression.		2018	RDF
34	Colin Rothwell	Exploitation from malicious PCI express peripherals.		2018	RDF
34	Min Choi, Jong Hyuk Park	Feasibility and Performance Analysis of RDMA Transfer through PCI Express.	J. Inf. Process. Syst.	2017	DBLP DOI BibTeX RDF
34	Alberto Gatto 0001, Paola Parolari, Marco Brunero, Francesco Corapi, Viscardo Costa, Claudio Meani, Pierpaolo Boffi	Intra-datacenter links exploiting PCI express generation 4 interconnections.	OFC	2017	DBLP BibTeX RDF
34	Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy	JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication.	FPL	2016	DBLP DOI BibTeX RDF
34	Lars Bjørlykke Kristiansen, Jonas Markussen, Håkon Kvale Stensland, Michael Riegler 0001, Hugo Kohmann, Friedrich Seifert, Roy Nordstrøm, Carsten Griwodz, Pål Halvorsen	Device lending in PCI express networks.	NOSSDAV	2016	DBLP DOI BibTeX RDF
34	David de la Chevallerie, Jens Korinth, Andreas Koch 0001	ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators.	SIGARCH Comput. Archit. News	2015	DBLP DOI BibTeX RDF
34	Daniel Münch, Michael Paulitsch, Andreas Herkersdorf	Monitoring of I/O for safety-critical systems using PCI express advanced error reporting.	SIES	2015	DBLP DOI BibTeX RDF
34	Ye Ren, Young Woo Kim, Hag-Young Kim	Implementation of system interconnection devices using PCI express.	ICCE	2015	DBLP DOI BibTeX RDF
34	Dariusz Makowski	Application of PCI express interface in high-performance video systems.	MIXDES	2015	DBLP DOI BibTeX RDF
34	Dawei Zang, Zheng Cao, Zhan Wang, Xiaoli Liu 0002, Lin Wang 0015, Ninghui Sun	Decentralized NIC-Switching Architecture Using SR-IOV PCI Express Network Device.	IEEE Micro	2014	DBLP DOI BibTeX RDF
34	Ray Bittner, Erik Ruf, Alessandro Forin	Direct GPU/FPGA communication Via PCI express.	Clust. Comput.	2014	DBLP DOI BibTeX RDF
34	Viet Vu Duy, Oliver Sander, Timo Sandmann, Steffen Bähr, Jan Heidelberger, Jürgen Becker 0001	Enabling partial reconfiguration for coprocessors in mixed criticality multicore systems using PCI express single-root I/O virtualization.	ReConFig	2014	DBLP DOI BibTeX RDF
34	Viet Vu Duy, Timo Sandmann, Steffen Baehr, Oliver Sander, Jürgen Becker 0001	Virtualization Support for FPGA-Based Coprocessors Connected via PCI Express to an Intel Multicore Platform.	IPDPS Workshops	2014	DBLP DOI BibTeX RDF
34	Hu Li, Yuan'an Liu, Dongming Yuan, Hefei Hu	A Wrapper of PCI Express with FIFO Interfaces based on FPGA.	CoRR	2013	DBLP BibTeX RDF
34	Julien Saade, Frédéric Pétrot, Andre Picco, Joel Huloux, Abdelaziz Goulahsen	A system-level overview and comparison of three High-Speed Serial Links: USB 3.0, PCI Express 2.0 and LLI 1.0.	DDECS	2013	DBLP DOI BibTeX RDF
34	Thomas A. Gregg, David Craddock, Daniel J. Stigliani, Frank E. Bosco, E. E. Cruz, Michael F. Scanlon, Philip A. Sciuto, G. Bayer, M. Jung, Christoph Raisch	Overview of IBM zEnterprise 196 I/O subsystem with focus on new PCI Express infrastructure.	IBM J. Res. Dev.	2012	DBLP DOI BibTeX RDF
34	Ray Bittner	Speedy bus mastering PCI express.	FPL	2012	DBLP DOI BibTeX RDF
34	Ray Bittner, Erik Ruf	Direct GPU/FPGA Communication via PCI Express.	ICPP Workshops	2012	DBLP DOI BibTeX RDF
34	Qihao Liu, Huihui Weng, Feng Zhang 0014, Jianzhong Zhao, Junsheng Lv, You Li	An efficient physical coding sublayer for PCI express in 65nm CMOS.	ISPACS	2012	DBLP DOI BibTeX RDF
34	Michael Rückauer, Joachim Meyer 0001, Thorsten Schubert, Michael Hübner 0001, Dieter Scheurer, Jürgen Becker 0001	Realtime PCI Express monitoring for self adaptive reconfigurable systems.	SSD	2012	DBLP DOI BibTeX RDF
34	Jasmin Ajanovic	PCI Express.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
34		PCI-Express.	Encyclopedia of Parallel Computing	2011	DBLP DOI BibTeX RDF
34	Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku	Peach: A Multicore Communication System on Chip with PCI Express.	IEEE Micro	2011	DBLP DOI BibTeX RDF
34	Jie Liu, Lihua Li 0005, Xia Liu	Design of flash-based storage system based on PCI Express bus.	EMEIT	2011	DBLP DOI BibTeX RDF
34	Yantao Pan, Huotu Wu, Jianghong Shi	Design and Implementation of a RF Signal Record & Playback System Based on PCI Express Bus.	ACIS-ICIS	2011	DBLP DOI BibTeX RDF
34	Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto	PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
34	Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato	An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller.	COOL Chips	2011	DBLP DOI BibTeX RDF
34	Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato	An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs.	ISSCC	2011	DBLP DOI BibTeX RDF
34	Hide Nakayama, Kentaro Iwasawa, Chen Chi Wu, Takuo Fugunaga	Performance Evaluation of BONET with PCI Express 2.0.	SUComS	2011	DBLP DOI BibTeX RDF
34	Peter Böhm	Incremental and Verified Modeling of the PCI Express Protocol.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2010	DBLP DOI BibTeX RDF
34	Yung-Hen Lee, Jian-Jia Chen, Chi-Sheng Shih 0001	Energy-Efficient Considerations on a Variable-Bitrate PCI-Express Device.	J. Signal Process. Syst.	2010	DBLP DOI BibTeX RDF
34	Kuo-Hsing Cheng, Yu-Chang Tsai, Yen-Hsueh Wu, Ying-Fu Lin	A 5-Gb/s Inductorless CMOS Adaptive Equalizer for PCI Express Generation II Applications.	IEEE Trans. Circuits Syst. II Express Briefs	2010	DBLP DOI BibTeX RDF
34	Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto	PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express.	GreenCom/CPSCom	2010	DBLP DOI BibTeX RDF
34	Jun Suzuki, Yoichi Hidaka, Junichi Higuchi, Teruyuki Baba, Nobuharu Kami, Takashi Yoshikawa	Multi-root Share of Single-Root I/O Virtualization (SR-IOV) Compliant PCI Express Device.	Hot Interconnects	2010	DBLP DOI BibTeX RDF
34	Jasmin Ajanovic	PCI express 3.0 overview.	Hot Chips Symposium	2009	DBLP DOI BibTeX RDF
34	Peter Böhm	Incremental modelling and verification of the PCI Express transaction layer.	MEMOCODE	2009	DBLP DOI BibTeX RDF
34	Behnam S. Arad, Hong Chang	A Behavioral Simulator for PCI-Express Transaction Layer.	CATA	2008	DBLP BibTeX RDF
34	Mohamed Mahmoud, Behnam S. Arad	Modeling and Verification of the Physical Layer of PCI Express.	CATA	2007	DBLP BibTeX RDF
34	Carl Edward Gray, Odile Liboiron-Ladouceur, David C. Keezer, Keren Bergman	Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network.	ITC	2007	DBLP DOI BibTeX RDF
34	Venkata Krishnan, Todd Comins, Rudy Stalzer, David Wong 0005	A Case Study in I/O Disaggregation using PCI Express Advanced Switching Interconnect (ASI).	Hot Interconnects	2006	DBLP DOI BibTeX RDF
34	Jesús Antonio Álvarez-Cedillo, Macario García Arregui	PCI Express: Generalidades.	Polibits	2005	DBLP DOI BibTeX RDF
34	Won-Ok Kwon, Kyoung Park, Myung-Joon Kim, Hyuk-Je Kwon	The algorithm of 16-bit scrambler in parallel for PCI express.	SIP	2005	DBLP BibTeX RDF
34	Ashraf El-Nakhal, Behnam S. Arad	PCI-EXPRESS Transaction Layer and Application Layer of A 3-Port Switch.	CAINE	2005	DBLP BibTeX RDF
34	Mitchell Lin, Kwang-Ting Cheng, Jimmy Hsu, M. C. Sun, Jason Chen, Shelton Lu	Production-oriented interface testing for PCI-Express by enhanced loop-back technique.	ITC	2005	DBLP DOI BibTeX RDF
34	Eduardo Rodríguez Escobar, Elizabeth Acosta-Gonzaga	PCI Express: Una Visión Inicial.	Polibits	2004	DBLP DOI BibTeX RDF
34	Christian Sauer 0001, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer	Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express.	PARELEC	2004	DBLP DOI BibTeX RDF
34	Jiuxing Liu, Amith R. Mamidala, Abhinav Vishnu, Dhabaleswar K. Panda 0001	Performance evaluation of InfiniBand with PCI Express.	Hot Interconnects	2004	DBLP DOI BibTeX RDF
34	Jay J. Nejedlo	IBISTTM (Interconnect Built-in Self-Test) Architecture and Methodology for PCI Express: Intel?s Next-Generation Test and Validation Methodology for Performance IO.	ITC	2003	DBLP DOI BibTeX RDF
34	David Mayhew, Venkata Krishnan	PCI express and advanced switching: evolutionary path to building next generation interconnects.	Hot Interconnects	2003	DBLP DOI BibTeX RDF
30	Raúl Martínez, Francisco José Alfaro, José L. Sánchez 0002	A Framework to Provide Quality of Service over Advanced Switching.	IEEE Trans. Parallel Distributed Syst.	2008	DBLP DOI BibTeX RDF
30	Matthew J. Koop, Wei Huang 0003, Karthik Gopalakrishnan, Dhabaleswar K. Panda 0001	Performance Analysis and Evaluation of PCIe 2.0 and Quad-Data Rate InfiniBand.	Hot Interconnects	2008	DBLP DOI BibTeX RDF	qdr, pci, infiniband
30	Abhinav Vishnu, Brad Benton, Dhabaleswar K. Panda 0001	High Performance MPI on IBM 12x InfiniBand Architecture.	IPDPS	2007	DBLP DOI BibTeX RDF
30	Weikuan Yu, Ranjit Noronha, Shuang Liang, Dhabaleswar K. Panda 0001	Benefits of high speed interconnects to cluster file systems: a case study with Lustre.	IPDPS	2006	DBLP DOI BibTeX RDF
26	Junichiro Makino, Kei Hiraki, Mary Inaba	GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing.	SC	2007	DBLP DOI BibTeX RDF
26	Raúl Martínez, Francisco José Alfaro, José L. Sánchez 0002	Implementing the Advanced Switching Minimum Bandwidth Egress Link Scheduler.	NCA	2006	DBLP DOI BibTeX RDF
26	Frank Mietke, Robert Rex, Robert Baumgartl, Torsten Mehlan, Torsten Hoefler, Wolfgang Rehm	Analysis of the Memory Registration Process in the Mellanox InfiniBand Software Stack.	Euro-Par	2006	DBLP DOI BibTeX RDF
26	Atsushi Kawai, Toshiyuki Fukushige	Gordon Bell finalists II - $158/GFLOPS astrophysical N-body simulation with reconfigurable add-in card and hierarchical tree algorithm.	SC	2006	DBLP DOI BibTeX RDF	cosmological simulation, many-body simulation, tree algorithm, reconfigurable processor
26	Abhinav Vishnu, Gopalakrishnan Santhanaraman, Wei Huang 0003, Hyun-Wook Jin, Dhabaleswar K. Panda 0001	Supporting MPI-2 One Sided Communication on Multi-rail InfiniBand Clusters: Design Challenges and Performance Benefits.	HiPC	2005	DBLP DOI BibTeX RDF
15	Bowei Zhang, Guochang Gu, Lin Sun, Yanxia Wu	32-bit floating-point FPGA gaussian elimination.	FPGA	2009	DBLP DOI BibTeX RDF	fpga., floating-point, gaussian elimination
15	Mrinal Bose, Prashant Naphade, Jayanta Bhadra, Hillel Miller	An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs.	ISQED	2009	DBLP DOI BibTeX RDF
15	Nageswara S. V. Rao, Weikuan Yu, William R. Wing, Stephen W. Poole, Jeffrey S. Vetter	Wide-area performance profiling of 10GigE and InfiniBand technologies.	SC	2008	DBLP DOI BibTeX RDF	10GigE LAN/WAN-PHY, InfiniBand, TCP performance, high-performance networking
15	Hari Vijay Venkatanarayanan, Michael L. Bushnell	A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits.	VLSI Design	2008	DBLP DOI BibTeX RDF
15	Nidhir Kumar, Senthil N. Velu, Rajan Verma	Gateway to Chips: High Speed I/O Signalling and Interface.	VLSI Design	2008	DBLP DOI BibTeX RDF
15	Andreas Ibing, David Kühling, Marcel Kuszak, Clemens Von Helmolt, Volker Jungnickel	Flexible demonstrator platform for cooperative joint transmission and detection in next generation wireless MIMO-OFDM networks.	TRIDENTCOM	2008	DBLP DOI BibTeX RDF	cooperative MIMO-OFDM, testbed, software defined radio