Search results for "STG"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
148	Michael V. Goncharov, Alexander B. Smirnov, Nikolai Starodoubtsev, Ilya V. Klotchkov	Timing Extensions of STG Model and a Method to Simulate Timed STG Behavior in VHDL Environment.	ACSD	1998	DBLP DOI BibTeX RDF	asynchronous circuits' design, simulation, VHDL, Signal Transition Graph (STG)
136	Sufian Sudeng, Arthit Thongtak	Template Based: A Novel STG Based Logic Synthesis for Asynchronous Control Circuits.	World Congress on Engineering (Selected Papers)	2008	DBLP DOI BibTeX RDF	asynchronous control circuits, asynchronous DMA controller, template based technique, logic synthesis, Signal Transition Graph (STG)
99	Jon Mountjoy	The Spineless Tagless G-machine, naturally.	ICFP	1998	DBLP DOI BibTeX RDF
94	Victor Khomenko, Maciej Koutny, Alexandre Yakovlev	Detecting State Coding Conflicts in STG Unfoldings Using SAT.	ACSD	2003	DBLP DOI BibTeX RDF	complete state coding, CSC, net unfoldings, Petri nets, asynchronous circuits, SAT, signal transition graphs, STG, automated synthesis
85	Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli	An efficient heuristic procedure for solving the state assignment problem for event-based specifications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
80	Mark Schäfer, Walter Vogler, Ralf Wollowski, Victor Khomenko	Strategies for Optimised STG Decomposition.	ACSD	2006	DBLP DOI BibTeX RDF	Petri net, decomposition, Asynchronous circuit, STG, speed-independent
71	Takashi Takenaka, Junji Kitamichi, Teruo Higashino, Kenichi Taniguchi	Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution.	ASP-DAC	1999	DBLP DOI BibTeX RDF
71	Radhakrishna Nagalla, Graham R. Hellestrand	Elimination of Dynamic Hazards from Signal Transition Graphs.	VLSI Design	1996	DBLP DOI BibTeX RDF	Logic hazards, Dynamic hazards, Asynchronous circuits, Signal Transition Graphs
69	Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev	STG Optimisation in the Direct Mapping of Asynchronous Circuits .	DATE	2003	DBLP DOI BibTeX RDF
69	Alberto de la Encina, Ricardo Pena	Formally deriving an STG machine.	PPDP	2003	DBLP DOI BibTeX RDF	functional programming, operational semantics, abstract machines, compiler verification
57	Panagiotis Sidiropoulos, Vasileios Mezaris, Ioannis Kompatsiaris, Hugo Meinedo, Isabel Trancoso	Multi-modal scene segmentation using scene transition graphs.	ACM Multimedia	2009	DBLP DOI BibTeX RDF	scene segmentation
57	Tomohiro Yoneda, Chris J. Myers	Synthesis of Timed Circuits Based on Decomposition.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
57	Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers	Synthesis of Speed Independent Circuits Based on Decomposition.	ASYNC	2004	DBLP DOI BibTeX RDF	abstraction, synthesis, Decomposition, STGs, speed-independent circuits
57	Nikolai Starodoubtsev, Sergei Bystrov, Michael V. Goncharov, Ilya V. Klotchkov, Alexander B. Smirnov	Towards Synthesis of Monotonic Asynchronous Circuits from Signal Transition Graphs.	ACSD	2001	DBLP DOI BibTeX RDF
57	Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou	A structure-oriented power modeling technique for macrocells.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
57	Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexandre Yakovlev	A region-based theory for state assignment in speed-independent circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
57	Rodrigue Byrne	Determining Aliasing Probabilities in BIST by Counting Strings.	J. Electron. Test.	1997	DBLP DOI BibTeX RDF	response analysis architectures, compression techniques, aliasing probabilities, deterministic finite automata
57	Radhakrishna Nagalla, Graham R. Hellestrand	A Visual Approach for Asynchronous Circuit Synthesis.	VLSI Design	1997	DBLP DOI BibTeX RDF
57	Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar	Initialization issues in asynchronous circuit synthesis.	J. Electron. Test.	1996	DBLP DOI BibTeX RDF	asynchronous circuit synthesis, initialization, signal transition graph
57	Peter Vanbekbergen, Gert Goossens, Francky Catthoor, Hugo De Man	Optimized synthesis of asynchronous control circuits from graph-theoretic specifications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1992	DBLP DOI BibTeX RDF
55	Victor Khomenko	Efficient Automatic Resolution of Encoding Conflicts Using STG Unfoldings.	ACSD	2007	DBLP DOI BibTeX RDF
54	Victor Khomenko, Mark Schäfer, Walter Vogler	Output-Determinacy and Asynchronous Circuit Synthesis.	ACSD	2007	DBLP DOI BibTeX RDF	output-determinacy, OR-causality, decomposition, asynchronous circuits, STG
52	Dominic Wist, Mark Schäfer, Walter Vogler, Ralf Wollowski	STG Decomposition: Internal Communication for SI Implementability.	ACSD	2010	DBLP DOI BibTeX RDF	CSC, decomposition, STG, resynthesis, speed independent
52	Victor Khomenko, Mark Schäfer	Combining Decomposition and Unfolding for STG Synthesis.	ICATPN	2007	DBLP DOI BibTeX RDF	Petri net, decomposition, Asynchronous circuit, unfolding, STG, state space explosion
51	Srinivasa R. STG, Samar Agnihotri, Prem Jadhupathi, Revathipathi Namballa	Mobile based event-activated vehicle tracking in urban environments.	ITSC	2012	DBLP DOI BibTeX RDF
43	Wang Yao, Byrav Ramamurthy	Survivable Traffic Grooming with Path Protection at the Connection Level in WDM Mesh Networks.	BROADNETS	2004	DBLP DOI BibTeX RDF
43	Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou	A power modeling and characterization method for macrocells using structure information.	ICCAD	1997	DBLP DOI BibTeX RDF	Power modeling for macrocells, RTL power estimations, State transition graph and Power characterization
43	Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli	Synthesis of hazard-free asynchronous circuits with bounded wire delays.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
43	Cho W. Moon, Paul R. Stephan, Robert K. Brayton	Specification, synthesis, and verification of hazard-free asynchronous circuits.	J. VLSI Signal Process.	1994	DBLP DOI BibTeX RDF
43	Michael Kishinevsky, Alex Kondratyev, Alexander Taubin	Specification and analysis of self-timed circuits.	J. VLSI Signal Process.	1994	DBLP DOI BibTeX RDF
41	Victor Khomenko, Agnes Madalinski, Alexandre Yakovlev	Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings.	ACSD	2006	DBLP DOI BibTeX RDF
41	Ian Holyer, Eleni Spiliopoulou	The Brisk Machine: A Simplified STG Machine.	Implementation of Functional Languages	1997	DBLP DOI BibTeX RDF
41	Alexei L. Semenov, Alexandre Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella	Synthesis of Speed-Independent Circuits from STG-Unfolding Segment.	DAC	1997	DBLP DOI BibTeX RDF
40	Victor Khomenko, Maciej Koutny, Alexandre Yakovlev	Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT.	ACSD	2004	DBLP DOI BibTeX RDF	net unfoldings, partial order techniques, Petri nets, logic synthesis, asynchronous circuits, SAT, signal transition graphs, STG, self-timed circuits
28	Liang Xiang, Quan Yuan, Shiwan Zhao, Li Chen 0009, Xiatian Zhang, Qing Yang 0002, Jimeng Sun 0001	Temporal recommendation on graphs via long- and short-term preference fusion.	KDD	2010	DBLP DOI BibTeX RDF	temporal recommendation, graph, user preference
28	Susan Elliott Sim, Sukanya Ratanotayanon, Leyna Cotran	Structure transition graphs: An ECG for program comprehension?	ICPC	2009	DBLP DOI BibTeX RDF
28	Nickolas Kintos, Michael P. Nusbaum, Farzan Nadim	A modeling comparison of projection neuron- and neuromodulator-elicited oscillations in a central pattern generating network.	J. Comput. Neurosci.	2008	DBLP DOI BibTeX RDF	Stomatogastric ganglion, Phase plane, Model, Central pattern generator, Neuromodulation
28	Peter J. Radcliffe, Xinghuo Yu 0001	A New Time Independent Asynchronous Protocol and Its Applications.	IEEE Trans. Ind. Informatics	2007	DBLP DOI BibTeX RDF
28	Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev	Direct Mapping of Low-Latency Asynchronous Controllers From STGs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
28	Monalisa Sarma, Rajib Mall	Automatic Test Case Generation from UML Models.	ICIT	2007	DBLP DOI BibTeX RDF	Software testing, Object- oriented system, UML models
28	Simon Marlow, Alexey Rodriguez Yakushev, Simon L. Peyton Jones	Faster laziness using dynamic pointer tagging.	ICFP	2007	DBLP DOI BibTeX RDF
28	Daniel Wang 0004, Yuru Zhang, Chong Yao	Stroke-based modeling and haptic skill display for Chinese calligraphy simulation system.	Virtual Real.	2006	DBLP DOI BibTeX RDF
28	Niki Trigoni, Alexandre Guitton, Antonios Skordylis	Routing and processing multiple aggregate queries in sensor networks.	SenSys	2006	DBLP DOI BibTeX RDF	sensor networks, aggregate queries
28	Weiwei Hu, Rose Qingyang Hu, Yi Qian 0001	Wavelength retuning in a WDM mesh network with survivable traffic grooming.	IPCCC	2006	DBLP DOI BibTeX RDF
28	Javed I. Khan, Yongbin Ma, Manas Hardas	Course Composition Based on Semantic Topical Dependency.	Web Intelligence	2006	DBLP DOI BibTeX RDF	Semantic Topic Graph, Ontology and Composition Algorithm, RDF
28	Praveen Tiwari, Saptarshi Biswas, Raj S. Mitra	Apriori Formal Coverage Analysis for Protocol Properties.	VLSI Design	2006	DBLP DOI BibTeX RDF
28	Alberto de la Encina, Luis Llana, Fernando Rubio 0001	Formalizing the Debugging Process in Haskell.	ICTAC	2005	DBLP DOI BibTeX RDF
28	Yan Zhang 0004, Xiangdong Qin	State Transfer Graph: An Efficient Tool for Webview Maintenance.	WAIM	2005	DBLP DOI BibTeX RDF
28	Javier Esparza	A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition Graphs.	ACSD	2003	DBLP DOI BibTeX RDF
28	Qingwei Wu, Michael S. Hsiao	Efficient Sequential ATPG Based on Partitioned Finite-State-Machine Traversal.	ITC	2003	DBLP DOI BibTeX RDF
28	Arlindo L. Oliveira	Techniques for the creation of digital watermarks in sequentialcircuit designs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
28	Olivier Danvy, Lasse R. Nielsen	A Higher-Order Colon Translation.	FLOPS	2001	DBLP DOI BibTeX RDF
28	Wen Gao 0001, Jiyong Ma, Shiguang Shan, Xilin Chen 0001, Wei Zheng, Hongming Zhang, Jie Yan, Jiangqin Wu	HandTalker: A Multimodal Dialog System Using Sign Language and 3-D Virtual Human.	ICMI	2000	DBLP DOI BibTeX RDF
28	Jörgen Gustavsson	A Type Based Sharing Analysis for Update Avoidance and Optimisation.	ICFP	1998	DBLP DOI BibTeX RDF
28	Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino	Computational Kernels and their Application to Sequential Power Optimization.	DAC	1998	DBLP DOI BibTeX RDF	system-on-chip test, testing embedded core, intellectual property test
28	Tan-Li Chou, Kaushik Roy 0001	Accurate power estimation of CMOS sequential circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF
28	Jun Gu, Ruchir Puri	Asynchronous circuit synthesis with Boolean satisfiability.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
28	Peter Vanbekbergen, Bill Lin 0001, Gert Goossens, Hugo De Man	A generalized state assignment theory for transformations on signal transition graphs.	J. VLSI Signal Process.	1994	DBLP DOI BibTeX RDF
28	Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer	Delay-fault test generation and synthesis for testability under a standard scan design methodology.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
28	Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton	Redundancies and don't cares in sequential logic synthesis.	J. Electron. Test.	1990	DBLP DOI BibTeX RDF	redundancies, synthesis for testability, don't cares
28	Pranav Ashar, Srinivas Devadas, A. Richard Newton	A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines.	DAC	1990	DBLP DOI BibTeX RDF
28	Abhijit Ghosh, Srinivas Devadas, A. Richard Newton	Sequential Test Generation at the Register-Transfer and Logic Levels.	DAC	1990	DBLP DOI BibTeX RDF
26	Lincan Li, Hanchen Wang, Wenjie Zhang, Adelle Coster	STG-Mamba: Spatial-Temporal Graph Learning via Selective State Space Model.	CoRR	2024	DBLP DOI BibTeX RDF
26	Ammar Sherif, Abubakar Abid, Mustafa Elattar, Mohamed ElHelw	STG-MTL: Scalable Task Grouping for Multi-Task Learning Using Data Map.	CoRR	2023	DBLP DOI BibTeX RDF
26	Yucheng Song, Huaiyi Chen, Xiaomeng Song, Zhifang Liao, Yan Zhang	STG-Net: A COVID-19 prediction network based on multivariate spatio-temporal information.	Biomed. Signal Process. Control.	2023	DBLP DOI BibTeX RDF
26	Youxiang Duan, Ning Chen, Shigen Shen, Peiying Zhang, Youyang Qu, Shui Yu 0001	FDSA-STG: Fully Dynamic Self-Attention Spatio-Temporal Graph Networks for Intelligent Traffic Flow Prediction.	IEEE Trans. Veh. Technol.	2022	DBLP DOI BibTeX RDF
26	Yair Lakretz, Ori Ossmy, Naama Friedmann, Roy Mukamel, Itzhak Fried	Single-cell activity in human STG during perception of phonemes is organized according to manner of articulation.	NeuroImage	2021	DBLP DOI BibTeX RDF
26	Jiadong Li, Wang Pan, Qipu Deng, Zhi Wang 0001, Wenwu Zhu 0001	STG-Meta: Spatial-Temporal Graph Meta-Learning for Traffic Forecasting.	IJCNN	2021	DBLP DOI BibTeX RDF
26	Higor A. Delsoto, Duarte Lopes de Oliveira, Gracieth Cavalcanti Batista, Diego A. Silva, Leonardo Romano	A Tools Flow for Synthesis of Asynchronous Control Circuits from Extended STG Specifications.	LASCAS	2019	DBLP DOI BibTeX RDF
26	Felipe Mendes, Tiago S. Curtinhas, Duarte Lopes de Oliveira, Higor A. Delsoto, Lester de Abreu Faria	A Novel Tool for Synthesis by Direct Mapping of Asynchronous Circuits from Extended STG Specifications.	VLSID	2018	DBLP DOI BibTeX RDF
26	Vasily G. Moshnyaga, Hideki Nita	STG-based detection of power virus inputs in FSM.	MWSCAS	2015	DBLP DOI BibTeX RDF
26	Jianjun Yu, Yi Shen, Zhenglu Yang	Topic-STG: extending the session-based temporal graph approach for personalized tweet recommendation.	WWW (Companion Volume)	2014	DBLP DOI BibTeX RDF
26	Stanislavs Golubcovs, Walter Vogler, Norman Kluge	STG-Based Resynthesis for Balsa Circuits.	ACSD	2013	DBLP DOI BibTeX RDF
26	Carles Creus, Adrià Gascón, Guillem Godoy	One-context Unification with STG-Compressed Terms is in NP.	RTA	2012	DBLP DOI BibTeX RDF
26	Victor Khomenko	Logic Decomposition of Asynchronous Circuits Using STG Unfoldings.	ASYNC	2011	DBLP DOI BibTeX RDF
26	Dominic Wist, Walter Vogler, Ralf Wollowski	STG Decomposition: Partitioning Heuristics.	ACSD	2011	DBLP DOI BibTeX RDF
26	Dirk Kleeblatt	On a Strongly Normalizing STG Machine with an Application to Dependent Type Checking.		2011	RDF
26	Maciej Piróg, Dariusz Biernacki	A systematic derivation of the STG machine verified in Coq.	Haskell	2010	DBLP DOI BibTeX RDF
26	Victor Khomenko	Efficient Automatic Resolution of Encoding Conflicts Using STG Unfoldings.	IEEE Trans. Very Large Scale Integr. Syst.	2009	DBLP DOI BibTeX RDF
26	Victor Khomenko, Mark Schäfer, Walter Vogler, Ralf Wollowski	STG decomposition strategies in combination with unfolding.	Acta Informatica	2009	DBLP DOI BibTeX RDF
26	Alberto de la Encina, Ricardo Peña-Marí	From natural semantics to C: A formal derivation of two STG machines.	J. Funct. Program.	2009	DBLP DOI BibTeX RDF
26	Dirk Kleeblatt	Deriving a Strong Normalizing STG Machine.	GI Jahrestagung	2009	DBLP BibTeX RDF
26	Mark Schäfer	Advanced STG decomposition (PDF / PS)		2009	RDF
26	Victor Khomenko, Agnes Madalinski, Alexandre Yakovlev	Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings.	Fundam. Informaticae	2008	DBLP BibTeX RDF
26	Victor Khomenko	Derivation of Monotonic Covers for Standard-C Implementation Using STG Unfoldings.	ASYNC	2008	DBLP DOI BibTeX RDF
26	Mark Schäfer, Walter Vogler	Component refinement and CSC-solving for STG decomposition.	Theor. Comput. Sci.	2007	DBLP DOI BibTeX RDF
26	Hamidah Ibrahim, Chiw Yi Lee	STG - A Subtransaction Generator Tool.	PDPTA	2007	DBLP BibTeX RDF
26	Victor Khomenko, Maciej Koutny, Alexandre Yakovlev	Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT.	Fundam. Informaticae	2006	DBLP BibTeX RDF
26	Mark Schäfer, Walter Vogler, Petr Jancar	Determinate STG Decomposition of Marked Graphs.	ICATPN	2005	DBLP DOI BibTeX RDF
26	Mark Schäfer, Walter Vogler	Component Refinement and CSC Solving for STG Decomposition.	FoSSaCS	2005	DBLP DOI BibTeX RDF
26	Victor Khomenko, Maciej Koutny, Alexandre Yakovlev	Detecting State Encoding Conflicts in STG Unfoldings Using SAT.	Fundam. Informaticae	2004	DBLP BibTeX RDF
26	Duncan Clarke, Thierry Jéron, Vlad Rusu, Elena Zinovieva	STG: A Symbolic Test Generation Tool.	TACAS	2002	DBLP DOI BibTeX RDF
26	Alberto de la Encina, Ricardo Pena	Proving the Correctness of the STG Machine.	IFL	2001	DBLP DOI BibTeX RDF
26	Duncan Clarke, Thierry Jéron, Vlad Rusu, Elena Zinovieva	STG: a tool for generating symbolic test programs and oracles from operational specifications.	ESEC / SIGSOFT FSE	2001	DBLP DOI BibTeX RDF
26	Jochen Beister, Gernot Eckstein, Ralf Wollowski	From STG to Extended-Burst-Mode Machines.	ASYNC	1999	DBLP DOI BibTeX RDF
26	Alex Kondratyev, Alexander Taubin	Verification of the speed-independent circuits by STG unfoldings.	ASYNC	1994	DBLP DOI BibTeX RDF
26	Denis B. Howe, Geoffrey Livingston Burn	Using Strictness in the STG Machine.	Functional Programming	1993	DBLP DOI BibTeX RDF
26	Alexandre Yakovlev	On Limitations and Extensions of STG Model for Designing Asynchronous Control Circuits.	ICCD	1992	DBLP DOI BibTeX RDF
25	Mark Schäfer, Dominic Wist, Ralf Wollowski	DESIJ--Enabling Decomposition-Based Synthesis of Complex Asynchronous Controllers.	ACSD	2009	DBLP DOI BibTeX RDF	DesiJ, SI synthesis, decomposition, STG, state space explosion
24	Andrey Mokhov, Victor Khomenko, Alexandre Yakovlev	Flat Arbiters.	ACSD	2009	DBLP DOI BibTeX RDF	Asynchronous circuits, Signal Transition Graph (STG), Arbiters, Speed-independent circuits