Search results for "TAM"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
139	Zahra Sadat Ebadi, André Ivanov	Time Domain Multiplexed TAM: Implementation and Comparison.	DATE	2003	DBLP DOI BibTeX RDF	Time domain multiplexed TAM, Optimal test time, Test Access Mechanism (TAM), SoC testing, Embedded core testing
128	Yuanquan Li, Jiayin Qi, Huaying Shu	A Review on the Relationship Between New Variables and Classical TAM Structure.	CONFENIS (1)	2007	DBLP DOI BibTeX RDF	TAM classical structure, New variables, Variable relations, TAM
104	Anuja Sehgal, Krishnendu Chakrabarty	Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Full-chip testing, dual-speed TAM, TAM optimization, test scheduling, test access mechanism, SOC testing
90	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	test wrapper, integer linear programming, test access mechanism (TAM), testing time, Embedded core testing
85	Sudarsan Jayasingh, Uchenna Cyril Eze	An extended TAM for analyzing adoption behavior of mobile coupon.	MoMM	2009	DBLP DOI BibTeX RDF	discount coupon, mobile coupon, mobile marketing, TAM
82	Geoffrey S. Hubona, Elizabeth Kennick	The Influence of External Variables on Information Technology Usage Behavior.	HICSS (4)	1996	DBLP DOI BibTeX RDF
77	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	Efficient Wrapper/TAM Co-Optimization for Large SOCs.	DATE	2002	DBLP DOI BibTeX RDF
77	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization.	VTS	2002	DBLP DOI BibTeX RDF
77	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs.	DAC	2002	DBLP DOI BibTeX RDF
71	Krishnendu Chakrabarty, Vikram Iyengar, Mark D. Krasniewski	Test planning for modular testing of hierarchical SOCs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
71	Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng	Efficient test solutions for core-based designs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
65	Anuja Sehgal, Krishnendu Chakrabarty	Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures.	DATE	2004	DBLP DOI BibTeX RDF
65	Mauricio Featherman, Mark A. Fuller	"Applying TAM to E-Services Adoption: The Moderating Role of Perceived Risk".	HICSS	2003	DBLP DOI BibTeX RDF
61	Subhayu Basu, Indranil Sengupta 0001, Dipanwita Roy Chowdhury, Sudipta Bhawmik	An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	TAM switch, system-on-chip, interconnect testing
59	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	Test Access Mechanism Optimization, Test Scheduling, and Tester Data Volume Reduction for System-on-Chip.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Core-based systems, test wrapper, system-on-a-chip, test scheduling, test access mechanism, testing time, rectangle packing
59	Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang 0001, Yizheng Ye	A Test Architecture for System-on-a-Chip.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
59	Sandeep Koranne	A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	embedded core based test scheduling, reconfigurable wrapper, parallel scheduling of malleable tasks, system-on-chip test, VLSI test
59	Oliver Laitenberger, Horst M. Dreyer	Evaluating the Usefulness and the Ease of Use of a Web-based Inspection Data Collection Tool.	IEEE METRICS	1998	DBLP DOI BibTeX RDF	Inspection Tool Support, Technology Acceptance Model, Usefulness, Ease of use, Subjective Measurement
55	Hsiu-Li Liao, Hsi-Peng Lu	Richness Versus Parsimony Antecedents of Technology Adoption Model for E-Learning Websites.	ICWL	2008	DBLP DOI BibTeX RDF	Perceived Characteristics of Innovating (PCI) beliefs, E-learning, Technology Acceptance Model (TAM), Intentions
55	Chih-Pin Su, Cheng-Wen Wu	A Graph-Based Approach to Power-Constrained SOC Test Scheduling.	J. Electron. Test.	2004	DBLP DOI BibTeX RDF	test integration, test scheduling, test access mechanism (TAM), SOC testing, test power, system-on-chip (SOC)
53	Tomokazu Yoneda, Hideo Fujiwara	Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects.	DATE	2008	DBLP DOI BibTeX RDF
53	Qiang Xu 0001, Nicola Nicolici	Multifrequency TAM design for hierarchical SOCs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
53	Kok-Wai Chew, P. M. Shingi, Mohd. Ismail Ahmad	TAM Derived Construct of Perceived Customer Value and Online Purchase Behavior: An Empirical Exploration.	I3E	2006	DBLP DOI BibTeX RDF
53	Jiann-Chyi Rau, Chien-Shiun Chen, Po-Han Wu	Design of Dynamically Assignmentable TAM Width for Testing Core-Based SOCs.	APCCAS	2006	DBLP DOI BibTeX RDF
53	Jin-Ho Ahn, Byung In Moon, Sungho Kang	A Practical Test Scheduling Using Network-Based TAM in Network on Chip Architecture.	Asia-Pacific Computer Systems Architecture Conference	2005	DBLP DOI BibTeX RDF
53	Tzong-Song Wang, Din Jong, Shu-Chen Liu	Conceptual inferred TAM by gender in cyberlearning.	ITRE	2005	DBLP DOI BibTeX RDF
53	Vikram Iyengar, Krishnendu Chakrabarty, Mark D. Krasniewski, Gopind N. Kumar	Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs.	VTS	2003	DBLP DOI BibTeX RDF
49	Tomokazu Yoneda, Akiko Shuto, Hideyuki Ichihara, Tomoo Inoue, Hideo Fujiwara	TAM Design and Optimization for Transparency-Based SoC Test.	VTS	2007	DBLP DOI BibTeX RDF	TAM design, transparency, ILP, SoC test
49	Reetta Raitoharju	When Acceptance is not Enough - Taking TAM-Model into Healthcare.	HICSS	2005	DBLP DOI BibTeX RDF	IT stress, TAM-model, Healthcare, IT evaluation
47	Brian Whitworth, Victor A. Bañuls, Cheickna Sylla, Edward Mahinda	Expanding the Criteria for Evaluating Socio-Technical Software.	IEEE Trans. Syst. Man Cybern. Part A	2008	DBLP DOI BibTeX RDF
47	Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty	Hierarchy-aware and area-efficient test infrastructure design for core-based system chips.	DATE	2006	DBLP DOI BibTeX RDF
47	Seung Jun, Mustaque Ahamad, Jun (Jim) Xu	Robust Information Dissemination in Uncooperative Environments.	ICDCS	2005	DBLP DOI BibTeX RDF
47	Margaret Hilsbos, Il-Yeol Song	Use of Tabular Analysis Method to Construct UML Sequence Diagrams.	ER	2004	DBLP DOI BibTeX RDF
47	Christina Gardner, Donald L. Amoroso	Development of an Instrument to Measure the Acceptance of Internet Technology by Consumers.	HICSS	2004	DBLP DOI BibTeX RDF
47	William H. Money, Arch Turner	Application of the Technology Acceptance Model to a Knowledge Management System.	HICSS	2004	DBLP DOI BibTeX RDF
47	Erik Larsson, Hideo Fujiwara	Optimal System-on-Chip Test Scheduling.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
47	Chee How Lim, W. Robert Daasch, George Cai	A Thermal-Aware Superscalar Microprocessor (invited).	ISQED	2002	DBLP DOI BibTeX RDF
47	Kieran Mathieson, Eileen Peacock, Wynne W. Chin	Extending the technology acceptance model: the influence of perceived user resources.	Data Base	2001	DBLP DOI BibTeX RDF	technology adoption, technology diffusion
47	Geoffrey S. Hubona, Sarah Geitz	External Variables, Beliefs, Attitudes and Information Technology Usage Behavior.	HICSS (3)	1997	DBLP DOI BibTeX RDF
46	Sik Chung Tam, Hou-Kuan Tam, Lap-Mou Tam, Tong Zhang 0015	A new optimization method, the Algorithm of Changes, for Bin Packing Problem.	BIC-TA	2010	DBLP DOI BibTeX RDF
44	Sunny Ham, Woody G. Kim, Hazel W. Forsythe	Determinants of Restaurant Employees' Technology Use Intention: Validating Technology Acceptance Model with External Factors via Structural Equation Model.	ENTER	2008	DBLP DOI BibTeX RDF	Restaurant computing systems, external factors, TAM, SEM
44	Fong-Ling Fu, Hung-Gi Chou, Sheng-Chin Yu	Activate Interaction Relationships Between Students Acceptance Behavior and E-Learning.	APWeb/WAIM	2007	DBLP DOI BibTeX RDF	Perceived enjoyment, TAM, On-line learning, Web quality
44	John Kruse, Mark Adkins, Robert O. Briggs	Applying the Technology Transition Model to GSS Fielding.	HICSS	2001	DBLP DOI BibTeX RDF	TTM, TAM, Technology Acceptance, Technology Transition
43	Erik Larsson, Zebo Peng	Power-Aware Test Planning in the Early System-on-Chip Design Exploration Process.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	test set selection, TAM design, power consumption, hot-spots, Test scheduling, design exploration
43	Sandeep Kumar Goel, Erik Jan Marinissen	SOC test architecture design for efficient utilization of test bandwidth.	ACM Trans. Design Autom. Electr. Syst.	2003	DBLP DOI BibTeX RDF	TAM and wrapper design, idle bits, lower bound, test scheduling, SOC test, bandwidth utilization
43	Vikram Iyengar, Krishnendu Chakrabarty	Test Bus Sizing for System-on-a-Chip.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	Core-based systems, integer linear programming, linearization, test access mechanism (TAM), testing time, embedded core testing, test bus
43	Cathy S. Lin, Sheng Wu	Exploring the Impact of Online Service Quality on Portal Site Usage.	HICSS	2002	DBLP DOI BibTeX RDF	portal site, online service quality, Technology Acceptance Model (TAM)
41	Sudarshan Bahukudumbi, Krishnendu Chakrabarty	Test-Length and TAM Optimization for Wafer-Level Reduced Pin-Count Testing of Core-Based SoCs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
41	Sudarshan Bahukudumbi, Krishnendu Chakrabarty	Test-Length Selection and TAM Optimization for Wafer-Level, Reduced Pin-Count Testing of Core-Based Digital SoCs.	VLSI Design	2007	DBLP DOI BibTeX RDF
41	Josef Strnadel, Arghya Kumar Dhali	Novel Optimizing Approach in the Area of STEP-Based Construction of Sessionless, Power-Constrainted, TAM and Time Optimal Test Schedules.	ECBS	2006	DBLP DOI BibTeX RDF
41	Dan Zhao 0001, Shambhu J. Upadhyaya	Dynamically partitioned test scheduling with adaptive TAM configuration for power-constrained SoC testing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
36	Jong-Chul Oh, Sung-Joon Yoon	Validation of Haptic Enabling Technology Acceptance Model (HE-TAM): Integration of IDT and TAM.	Telematics Informatics	2014	DBLP DOI BibTeX RDF
36	Mariëlle E. Bouwman, Piet Kommers, Alexander van Deursen	Revising TAM for hedonic location-based social networks: the influence of TAM, perceived enjoyment, innovativeness and extraversion.	Int. J. Web Based Communities	2014	DBLP DOI BibTeX RDF
36	A. K. M. Najmul Islam, Nasreen Azad, Matti Mäntymäki, S. M. Samiul Islam	TAM and E-learning Adoption: A Philosophical Scrutiny of TAM, Its Limitations, and Prescriptions for E-learning Adoption Research.	I3E	2014	DBLP DOI BibTeX RDF
36	Mohamed Jaoua, Bernard Philippe, Zoubida Mghazali	Préface au numéro spécial de la revue ARIMA dédié à TAM-TAM '09.	ARIMA J.	2010	DBLP DOI BibTeX RDF
36	Said S. Al-Gahtani	Testing for the Applicability of the TAM Model in the Arabic Context: Exploring an Extended TAM with Three Moderating Factors.	Inf. Resour. Manag. J.	2008	DBLP DOI BibTeX RDF
35	Engin Erzin	Improving Throat Microphone Speech Recognition by Joint Analysis of Throat and Acoustic Microphone Recordings.	IEEE Trans. Speech Audio Process.	2009	DBLP DOI BibTeX RDF
35	Harish Chandran, Nikhil Gopalkrishnan, John H. Reif	The Tile Complexity of Linear Assemblies.	ICALP (1)	2009	DBLP DOI BibTeX RDF
35	Martin Rozkovec	Implementation of Dynamically Reconfigurable Test Architecture for FPGA Circuits.	DDECS	2008	DBLP DOI BibTeX RDF
35	Matthew J. Patitz, Scott M. Summers	Self-assembly of Discrete Self-similar Fractals.	DNA	2008	DBLP DOI BibTeX RDF
35	Jahna Otterbacher	Adoption of Translation Support Technologies in a Multilingual Work Environment.	IWIC	2007	DBLP DOI BibTeX RDF	Multilingual Environments, Machine Translation, Technology Acceptance, Electronic Dictionaries
35	Andrew Burton-Jones, Geoffrey S. Hubona	Individual differences and usage behavior: revisiting a technology acceptance model assumption.	Data Base	2005	DBLP DOI BibTeX RDF	IT usage behavior, user acceptance of IT, technology acceptance model, individual differences
35	Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng	Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip.	DSD	2005	DBLP DOI BibTeX RDF
35	ThaeMin Lee, JongKun Jun	Contextual Perceived Usefulness? Toward an Understanding of Mobile Commerce Acceptance.	ICMB	2005	DBLP DOI BibTeX RDF
35	Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen	Efficient test access mechanism optimization for system-on-chip.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
35	Geoffrey S. Hubona, Andrew Burton-Jones	Modeling the User Acceptance of E-Mail.	HICSS	2003	DBLP DOI BibTeX RDF
35	William G. Chismar, Sonja Wiley-Patton	Does the Extended Technology Acceptance Model Apply to Physicians.	HICSS	2003	DBLP DOI BibTeX RDF
35	Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng	Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip.	DFT	2003	DBLP DOI BibTeX RDF
35	Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki	CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	SoC test control, TAPed cores, P1500 wrappers, test access mechanism, I/O bandwidth
35	Vikram Iyengar, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty	Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints.	ITC	2002	DBLP DOI BibTeX RDF
35	Sandeep Koranne, Vikram Iyengar	On the Use of k-tuples for SoC Test Schedule Representation.	ITC	2002	DBLP DOI BibTeX RDF
35	Shigeaki Tagashira, Akira Fukuda, Keizo Saisho	Efficiently Announcing Multimedia Information from Mobile Computers with the WOR Toolkit.	ISADS	2001	DBLP DOI BibTeX RDF
35	Youngjin Yoo	Predicting Groupware Usage.	HICSS (6)	1998	DBLP DOI BibTeX RDF
32	Nauman Saeed, Yun Yang 0001, Suku Sinnappan	Effect of media richness on user acceptance of blogs and podcasts.	ITiCSE	2010	DBLP DOI BibTeX RDF	CS education, MRT, blogs, TAM, podcasts, PLS
32	Mario Conci, Fabio Pianesi, Massimo Zancanaro	Useful, Social and Enjoyable: Mobile Phone Adoption by Older People.	INTERACT (1)	2009	DBLP DOI BibTeX RDF	mobile phones, TAM, elders, intrinsic motivation
32	Ulrike Schultze, Traci A. Carte	Contextualizing usage research for interactive technology: the case of car e-tailing.	Data Base	2007	DBLP DOI BibTeX RDF	interpretive analysis, multi-method research, world wide web, e-Commerce, survey, email, TAM, PLS
32	Yuanquan Li, Jiayin Qi, Huaying Shu	A Study on Customer Satisfaction in Mobile Telecommunication Market by Using SEM and System Dynamic Method.	CONFENIS (2)	2007	DBLP DOI BibTeX RDF	ACSI, Telecommunication market, TAM, Customer satisfaction, SEM
31	Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara	Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints.	ASP-DAC	2009	DBLP DOI BibTeX RDF	TAM design, thermal-aware test, wrapper design, test scheduling, SOC test
31	Julien Pouget, Erik Larsson, Zebo Peng	Multiple-Constraint Driven System-on-Chip Test Time Optimization.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	wrapper and TAM design, test scheduling, SOC testing, power constraint, multiple constraints
31	Qiang Xu 0001, Nicola Nicolici	Multi-Frequency Test Access Mechanism Design for Modular SOC Testing.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF	Multi-frequency Virtual TAM, SOC testing
31	Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty	Test cost reduction for SOCs using virtual TAMs and lagrange multipliers.	DAC	2003	DBLP DOI BibTeX RDF	bandwidth matching, automatic test equipment (ATE), test access mechanism (TAM), scan chains, system-on-chip (SOC)
31	Anh-Khoa Nguyen Vu, Thanh-Toan Do, Vinh-Tiep Nguyen, Tam Le, Minh-Triet Tran, Tam V. Nguyen 0002	Few-Shot Object Detection via Synthetic Features with Optimal Transport.	CoRR	2023	DBLP DOI BibTeX RDF
31	Thanh Tam Nguyen, Thanh Trung Huynh, Minh Tam Pham, Thanh Dat Hoang, Thanh Thi Nguyen, Quoc Viet Hung Nguyen	Validating functional redundancy with mixed generative adversarial networks.	Knowl. Based Syst.	2023	DBLP DOI BibTeX RDF
31	Thanh Toan Nguyen, Minh Tam Pham, Thanh Tam Nguyen, Thanh Trung Huynh, Van Vinh Tong, Quoc Viet Hung Nguyen, Thanh Tho Quan	Structural representation learning for network alignment with self-supervised anchor links.	Expert Syst. Appl.	2021	DBLP DOI BibTeX RDF
31	Minh Tam Pham, Thanh Trung Huynh, Van Vinh Tong, Thanh Tam Nguyen, Thanh Thi Nguyen, Hongzhi Yin, Quoc Viet Hung Nguyen	A dual benchmarking study of facial forgery and facial forensics.	CoRR	2021	DBLP BibTeX RDF
31	Thanh Tam Nguyen, Thanh Dat Hoang, Minh Tam Pham, Vu Tuyet Trinh, Thanh-Hung Nguyen, Quyet-Thang Huynh, Jun Jo	Monitoring agriculture areas with satellite images and deep learning.	Appl. Soft Comput.	2020	DBLP DOI BibTeX RDF
31	Kelly Liu, Victoria Tam, Phoebe Tse, Edmund Y. Lam, Vincent W. L. Tam	Developing the PETAL e-Learning Platform for Personalized Teaching and Learning.	ICSLE	2014	DBLP DOI BibTeX RDF
31	C. C. Lai, Jacob C. P. Kam, David Chuen-choi Leung, Tony K. Y. Lee, Aiken Yiu-Ming Tam, S. L. Ho, Hwa-Yaw Tam, Michael S. Y. Liu	Development of a Fiber-Optic Sensing System for Train Vibration and Train Weight Measurements in Hong Kong.	J. Sensors	2012	DBLP DOI BibTeX RDF
30	Mei-Ying Wu, Han-Ping Chou, Yung-Chien Weng, Yen-Han Huang	A Study of Web 2.0 Website Usage Behavior Using TAM 2.	APSCC	2008	DBLP DOI BibTeX RDF
30	Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang	SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling.	DATE	2007	DBLP DOI BibTeX RDF
30	Dong Cheng, Dehong Yang, Jidong Han, Yuanfang Song	An Empirical Research of Successful ERP Implementation Based on TAM.	CONFENIS (1)	2007	DBLP DOI BibTeX RDF	Enterprise systems organizational issues, Enterprise resource planning (ERP), Technology acceptance model, Business process reengineering, Enterprise information systems, Human resource management, Critical success factors, Enterprise management
30	Tzong-Song Wang, Hsu-Jung Liu, Din Jong	TAM Reasons for Gender Treason in Technology Change.	ICALT	2005	DBLP DOI BibTeX RDF
30	Sidan Du, Lian Cai, Duntang Gao	Theoretical Calculation of TAM and Correction of Topography.	ICMENS	2004	DBLP DOI BibTeX RDF
30	Vikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty	A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization.	DATE	2003	DBLP DOI BibTeX RDF
30	Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty	TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers.	ICCAD	2003	DBLP DOI BibTeX RDF
30	Vikram Iyengar, Anshuman Chandra	A Uni.ed SOC Test Approach Based on Test Data Compression and TAM Design.	DFT	2003	DBLP DOI BibTeX RDF
30	Dan Zhao 0001, Shambhu J. Upadhyaya	Power Constrained Test Scheduling with Dynamically Varied TAM.	VTS	2003	DBLP DOI BibTeX RDF
30	Subhayu Basu, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury, Indranil Sengupta 0001, Sudipta Bhawmik	Reformatting Test Patterns for Testing Embedded Core Based System Using Test Access Mechanism (TAM) Switch.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF	Data acyclic graph, System-on-Chip, Test Access Mechanism, Test time, Test patterns
27	J. P. F. Sum, Chi-Sing Leung, Peter Kwong-Shun Tam, Gilbert H. Young, Wing-Kay Kan, Lai-Wan Chan	Analysis for a class of winner-take-all model.	IEEE Trans. Neural Networks	1999	DBLP DOI BibTeX RDF
24	Sandeep Kumar Goel, Erik Jan Marinissen, Anuja Sehgal, Krishnendu Chakrabarty	Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF