Search results for "TTA"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
160	Hermann Kopetz	TTA Supported Service Availability.	ISAS	2005	DBLP DOI BibTeX RDF
93	Wilfried Steiner, Michael Paulitsch, Hermann Kopetz	The TTA's Approach to Resilience after Transient Upsets.	Real Time Syst.	2006	DBLP DOI BibTeX RDF	multiple failures, clique resolving, startup, self stabilization, recovery, Time-Triggered Architecture
83	Yong Li 0006, Zhiying Wang 0003, Jian Ruan, Kui Dai	A Low-Power Globally Synchronous Locally Asynchronous FFT Processor.	HPCC	2007	DBLP DOI BibTeX RDF
83	Yong Li 0006, Zhiying Wang 0003, Xue-mi Zhao, Jian Ruan, Kui Dai	Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
83	Astrit Ademaj, Håkan Sivencrona, Günther Bauer 0001, Jan Torin	Evaluation of Fault Handling of the Time-Triggered Architecture with Bus and Star Topology.	DSN	2003	DBLP DOI BibTeX RDF
83	Wilfried Steiner, Michael Paulitsch, Hermann Kopetz	Multiple Failure Correction in the Time-Triggered Architecture.	WORDS Fall	2003	DBLP DOI BibTeX RDF
80	Carlos S. de La Lama, Pekka Jääskeläinen, Jarmo Takala	Programmable and Scalable Architecture for Graphics Processing Units.	SAMOS	2009	DBLP DOI BibTeX RDF	TTA, GPU, GPGPU, VLIW, OpenGL, GLSL, LLVM
76	Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala	Parallel Memory Architecture for TTA Processor.	SAMOS	2007	DBLP DOI BibTeX RDF
67	Hak-Hoon Kim, Kiwon Lee	Web-based GIS-Transportation Framework Data Services using GML, SVG and X3D.	3D-GIS	2006	DBLP DOI BibTeX RDF
60	Teemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala	Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier Transform.	SAMOS	2006	DBLP DOI BibTeX RDF
53	Nestor Zaburannyy, Bohdan Ostash, Victor Fedorenko	TTA Lynx: a web-based service for analysis of actinomycete genes containing rare TTA codon.	Bioinform.	2009	DBLP DOI BibTeX RDF
50	Yong Li 0006, Zhiying Wang 0003, Kui Dai	A Low-Power Application Specific Instruction Set Processor Using Asynchronous Function Units.	CIT	2007	DBLP DOI BibTeX RDF
50	Albert Benveniste, Paul Caspi, Marco Di Natale, Claudio Pinello, Alberto L. Sangiovanni-Vincentelli, Stavros Tripakis	Loosely time-triggered architectures based on communication-by-sampling.	EMSOFT	2007	DBLP DOI BibTeX RDF	MoCC, loosely time-triggered, distributed systems, real-time systems, time-triggered
50	Panu Hämäläinen, Jari Heikkinen, Marko Hännikäinen, Timo D. Hämäläinen	Design of Transport Triggered Architecture Processors for Wireless Encryption.	DSD	2005	DBLP DOI BibTeX RDF
50	V. A. Zivkovic, Ronald J. W. T. Tangelder, Hans G. Kerkhoff	An Implementation for Test-Time Reduction in VLIW Transport-Triggered Architectures.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	VLIW processor test, test-time analysis, Design for Testability (DfT), test synthesis
50	Astrit Ademaj	A Methodology for Dependability Evaluation of the Time-Triggered Architecture Using Software Implemented Fault Injection.	EDCC	2002	DBLP DOI BibTeX RDF
47	Jianjun Guo, Kui Dai, Zhiying Wang 0003	A Heterogeneous Multi-core Processor Architecture for High Performance Computing.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF	TTA, SoC, heterogeneous, multi-core
43	Ming-che Lai, Zhiying Wang 0003, Jianjun Guo, Kui Dai, Shen Li	Template Vertical Dictionary-Based Program Compression Scheme on the TTA.	PATMOS	2007	DBLP DOI BibTeX RDF	transport triggered architecture, dictionary-based, power consumption, code compression, spatial locality
43	Paul Caspi, Adrian Curic, Aude Maignan, Christos Sofronis, Stavros Tripakis, Peter Niebert	From simulink to SCADE/lustre to TTA: a layered approach for distributed embedded applications.	LCTES	2003	DBLP DOI BibTeX RDF	scheduling, embedded software, synchronous languages, simulink, lustre, code distribution
33	Joseph Porter, Gabor Karsai, Janos Sztipanovits	Towards a time-triggered schedule calculation tool to support model-based embedded software design.	EMSOFT	2009	DBLP DOI BibTeX RDF	constraint programming, model-based design, time triggered architecture
33	Péter Bokor, Marco Serafini, Áron Sisak, András Pataricza, Neeraj Suri	Sustaining Property Verification of Synchronous Dependable Protocols Over Implementation.	HASE	2007	DBLP DOI BibTeX RDF
33	Nazish Aslam, Mark Milward, Ioannis Nousias, Tughrul Arslan, Ahmet T. Erdogan	Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems.	IPDPS	2007	DBLP DOI BibTeX RDF
33	Sara Blanc, Joaquin Gracia, Pedro J. Gil	Experiences during the Experimental Validation of the Time-Triggered Architecture.	DATE	2004	DBLP DOI BibTeX RDF
33	Xin Zhao 0016, Atul Prakash 0001	Source Authentication in Group Communication Systems.	DEXA Workshops	2003	DBLP DOI BibTeX RDF
33	Panu Hämäläinen, Marko Hännikäinen, Timo Hämäläinen 0001, Henk Corporaal, Jukka Saarinen	Implementation of encryption algorithms on transport triggered architectures.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
33	V. A. Zivkovic, Ronald J. W. T. Tangelder, Hans G. Kerkhoff	Design and Test Space Exploration of Transport-Triggered Architectures.	DATE	2000	DBLP DOI BibTeX RDF
30	Teemu Pitkänen, Jarno K. Tanskanen, Risto Mäkinen, Jarmo Takala	Parallel Memory Architecture for Application-Specific Instruction-Set Processors.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	TTA, Transport triggered architecture, Low power, ASIP, Application-specific instruction-set processors, Parallel memory
29	Pierre-André Mudry, Guillaume Zufferey, Gianluca Tempesti	A dynamically constrained genetic algorithm for hardware-software partitioning.	GECCO	2006	DBLP DOI BibTeX RDF	TTA processor, constrained hardware-software partitioning, genetic algorithm
26	Hyeonwoo Cho, Chanmin Park, Jinyoung Kim, Won Hwa Kim	CNA-TTA: Clean and Noisy Region Aware Feature Learning within Clusters for Online-Offline Test-Time Adaptation.	CoRR	2024	DBLP DOI BibTeX RDF
26	Maytus Piriyajitakonkij, Mingfei Sun, Mengmi Zhang, Wei Pan	TTA-Nav: Test-time Adaptive Reconstruction for Point-Goal Navigation under Visual Corruptions.	CoRR	2024	DBLP DOI BibTeX RDF
26	Kangxian Xie, Siyu Huang, Sebastián Cajas Ordone, Hanspeter Pfister, Donglai Wei 0001	S3-TTA: Scale-Style Selection for Test-Time Augmentation in Biomedical Image Segmentation.	CoRR	2023	DBLP DOI BibTeX RDF
26	Christian Weihsbach, Christian N. Kruse, Alexander Bigalke, Mattias P. Heinrich	DG-TTA: Out-of-domain medical image segmentation through Domain Generalization and Test-Time Adaptation.	CoRR	2023	DBLP DOI BibTeX RDF
26	Ahmed Hatem, Yiming Qian, Yang Wang	Point-TTA: Test-Time Adaptation for Point Cloud Registration Using Multitask Meta-Auxiliary Learning.	CoRR	2023	DBLP DOI BibTeX RDF
26	Damian Sójka, Sebastian Cygert, Bartlomiej Twardowski, Tomasz Trzcinski	AR-TTA: A Simple Method for Real-World Continual Test-Time Adaptation.	CoRR	2023	DBLP DOI BibTeX RDF
26	Mihir Prabhudesai, Tsung-Wei Ke, Alexander C. Li, Deepak Pathak, Katerina Fragkiadaki	Diffusion-TTA: Test-time Adaptation of Discriminative Models via Generative Feedback.	CoRR	2023	DBLP DOI BibTeX RDF
26	Taeyeop Lee, Jonathan Tremblay, Valts Blukis, Bowen Wen, Byeong-Uk Lee, Inkyu Shin, Stan Birchfield, In So Kweon, Kuk-Jin Yoon	TTA-COPE: Test-Time Adaptation for Category-Level Object Pose Estimation.	CoRR	2023	DBLP DOI BibTeX RDF
26	Zhenhui Ye, Ziyue Jiang 0001, Yi Ren 0006, Jinglin Liu, Chen Zhang, Xiang Yin 0006, Zejun Ma, Zhou Zhao	Ada-TTA: Towards Adaptive High-Quality Text-to-Talking Avatar Synthesis.	CoRR	2023	DBLP DOI BibTeX RDF
26	Ahmed Hatem, Yiming Qian, Yang Wang	Point-TTA: Test-Time Adaptation for Point Cloud Registration Using Multitask Meta-Auxiliary Learning.	ICCV	2023	DBLP DOI BibTeX RDF
26	Dewa Gede Hendra Divayana, Agus Adiarta, P. Wayan Arta Suyasa, I Made Sugiarta, Gede Eka Budi Darmawan	Use of the TTA-DIVAYANA Concept to Improve the Weight of Decision Makers in the TOPSIS Method as an Effort to Optimize Evaluation Results.	SIET	2023	DBLP DOI BibTeX RDF
26	Haoming Meng, Yangfei Zhao, Yijing Guo, Pei Lv	TTA-GCN: Temporal Topology Aggregation for Skeleton-Based Action Recognition.	ICIG (2)	2023	DBLP DOI BibTeX RDF
26	Taeyeop Lee, Jonathan Tremblay, Valts Blukis, Bowen Wen, Byeong-Uk Lee, Inkyu Shin, Stan Birchfield, In So Kweon, Kuk-Jin Yoon	TTA-COPE: Test-Time Adaptation for Category-Level Object Pose Estimation.	CVPR	2023	DBLP DOI BibTeX RDF
26	Masud An Nur Islam Fahim, Jani Boutellier	SS-TTA: Test-Time Adaption for Self-Supervised Denoising Methods.	CVPR Workshops	2023	DBLP DOI BibTeX RDF
26	Damian Sójka, Sebastian Cygert, Bartlomiej Twardowski, Tomasz Trzcinski	AR-TTA: A Simple Method for Real-World Continual Test-Time Adaptation.	ICCV (Workshops)	2023	DBLP DOI BibTeX RDF
26	Jianghao Wu, Ran Gu, Tao Lu, Shaoting Zhang 0001, Guotai Wang	UPL-TTA: Uncertainty-Aware Pseudo Label Guided Fully Test Time Adaptation for Fetal Brain Segmentation.	IPMI	2023	DBLP DOI BibTeX RDF
26	Junho Kim, Inwoo Hwang, Young Min Kim 0001	Ev-TTA: Test-Time Adaptation for Event-Based Object Recognition.	CoRR	2022	DBLP DOI BibTeX RDF
26	Inkyu Shin, Yi-Hsuan Tsai, Bingbing Zhuang, Samuel Schulter, Buyu Liu, Sparsh Garg, In So Kweon, Kuk-Jin Yoon	MM-TTA: Multi-Modal Test-Time Adaptation for 3D Semantic Segmentation.	CoRR	2022	DBLP DOI BibTeX RDF
26	Junha Song, KwanYong Park, Inkyu Shin, Sanghyun Woo, In So Kweon	CD-TTA: Compound Domain Test-time Adaptation for Semantic Segmentation.	CoRR	2022	DBLP DOI BibTeX RDF
26	Inkyu Shin, Yi-Hsuan Tsai, Bingbing Zhuang, Samuel Schulter, Buyu Liu, Sparsh Garg, In So Kweon, Kuk-Jin Yoon	MM-TTA: Multi-Modal Test-Time Adaptation for 3D Semantic Segmentation.	CVPR	2022	DBLP DOI BibTeX RDF
26	Junho Kim, Inwoo Hwang, Young Min Kim 0001	Ev-TTA: Test-Time Adaptation for Event-Based Object Recognition.	CVPR	2022	DBLP DOI BibTeX RDF
26	Pedro Conde, Cristiano Premebida	Adaptive-TTA: accuracy-consistent weighted test time augmentation method for the uncertainty calibration of deep learning classifiers.	BMVC	2022	DBLP BibTeX RDF
26	Juan García, Blanca Quintana, Antonio Adán, Víctor Pérez, Francisco J. Castilla	3D-TTA: A Software Tool for Analyzing 3D Temporal Thermal Models of Buildings.	Remote. Sens.	2020	DBLP DOI BibTeX RDF
26	Kati Tervo, Samawat Malik, Topi Leppänen, Pekka Jääskeläinen	TTA-SIMD Soft Core Processors.	FPL	2020	DBLP DOI BibTeX RDF
26	Jukka Teittinen, Markus Hiienkari, Indre Zliobaite, Jaakko Hollmén, Heikki Berg, Juha Heiskala, Timo Viitanen, Jesse Simonsson, Lauri Koskinen	A 5.3 pJ/op approximate TTA VLIW tailored for machine learning.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
26	S. M. Shamsul Alam, GoangSeog Choi	Design and implementation of a novel LT codec architecture on TTA based codesign environment.	IEICE Electron. Express	2016	DBLP DOI BibTeX RDF
26	Yisong Chang, Jizeng Wei, Wei Guo 0005, Jizhou Sun	A high performance, area efficient TTA-like vertex shader architecture with optimized floating point arithmetic unit for embedded graphics applications.	Microprocess. Microsystems	2013	DBLP DOI BibTeX RDF
26	Wei Guo 0005, Jingwei Hu, Jizeng Wei	A TTA-like Processor for Fast RSA Key Generation Using RNS.	J. Comput.	2013	DBLP BibTeX RDF
26	Zhengli Xu, Zhisong Bie, Canfeng Chen, Xianjun Jiao	TTA processor design for FPFSD-MIMO detector.	ICCT	2013	DBLP DOI BibTeX RDF
26	Stefan Hauser, Nico Moser, Ben H. H. Juurlink	SynZEN: A hybrid TTA/VLIW architecture with a distributed register file.	NORCHIP	2012	DBLP DOI BibTeX RDF
26	Lauri Matilainen, Sakari Lahti, Otto Esko, Erno Salminen, Timo D. Hämäläinen	Integration of TTA processor tools to Kactus2 IP-XACT design flow.	NORCHIP	2012	DBLP DOI BibTeX RDF
26	Yifan He, Dongrui She, Bart Mesman, Henk Corporaal	MOVE-Pro: A low power and high code density TTA architecture.	ICSAMOS	2011	DBLP DOI BibTeX RDF
26	Jizeng Wei, Yisong Chang, Wei Guo 0005, Jizhou Sun	An optimized TTA-like vertex shader datapath for embedded 3D graphics processing unit.	VLSI-SoC	2011	DBLP DOI BibTeX RDF
26	Jani Boutellier, Olli Silvén, Mickaël Raulet	Automatic synthesis of TTA processor networks from RVC-CAL dataflow programs.	SiPS	2011	DBLP DOI BibTeX RDF
26	Nico Moser, Stefan Hauser, Carsten Gremzow	Reduzierung der Kommunikation in TTA-Verbindungsnetzen mittels Laufzeitanalyse.	MBMV	2009	DBLP BibTeX RDF
26	Wei Hu, Yongxin Zhu 0001, Zonghua Gu 0001, Lei Jiang 0001	Pre-synthesis resource generation and estimation for transport-triggered architecture (TTA)-like architecture.	Microprocess. Microsystems	2008	DBLP DOI BibTeX RDF
26	Florence M. Chee	Understanding Korean experiences of online game hype, identity, and the menace of the "Wang-tta"..	DiGRA Conference	2005	DBLP BibTeX RDF
26	Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala	256-State Rate 1/2 Viterbi Decoder on TTA Processor.	ASAP	2005	DBLP DOI BibTeX RDF
26	Dragos Truscan	A Model-driven Approach to Configuration of TTA-based Protocol Processing Platforms.	FDL	2004	DBLP BibTeX RDF
26	Karen Godary-Dejean, Isabelle Augé-Blum, Anne Mignotte	Temporal Bounds for TTA: Validation.	DIPES	2004	DBLP DOI BibTeX RDF
26	Manfred Ley, Herbert Grünbacher	TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol.	ICCD	2002	DBLP DOI BibTeX RDF
26	Henk Corporaal	Microprocessor architectures - from VLIW to TTA.		1997	RDF
17	Nazish Aslam, Mark Milward, Ahmet T. Erdogan, Tughrul Arslan	Code Compression and Decompression for Coarse-Grain Reconfigurable Architectures.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
17	Wilson Wong, Wei Liu 0006, Mohammed Bennamoun	Tree-Traversing Ant Algorithm for term clustering based on featureless similarities.	Data Min. Knowl. Discov.	2007	DBLP DOI BibTeX RDF	Featureless similarity measures, Text mining, Cluster analysis, Ontology learning, Term clustering, Concept discovery
17	Indranil Saha, Janardan Misra, Suman Roy 0001	Timeout and Calendar Based Finite State Modeling and Verification of Real-Time Systems.	ATVA	2007	DBLP DOI BibTeX RDF
17	Jie Guo 0007, Jun Liu, Björn Mennenga, Gerhard P. Fettweis	A Phase-Coupled Compiler Backend for a New VLIW Processor Architecture Using Two-step Register Allocation.	ASAP	2007	DBLP DOI BibTeX RDF
17	Miao Wang, Guiming Wu, Zhiying Wang 0003	Instruction Selection for Subword Level Parallelism Optimizations for Application Specific Instruction Processors.	ISPA	2007	DBLP DOI BibTeX RDF
17	Hong Yue, Zhiying Wang 0003, Kui Dai	A Heterogeneous Embedded MPSoC for Multimedia Applications.	HPCC	2006	DBLP DOI BibTeX RDF	Transport Triggered Architecture, DSP, Embedded Processor, Heterogeneous MPSoC
17	Ming-che Lai, Kui Dai, Lu Hong-yi, Zhiying Wang 0003	A Novel Data-Parallel Coprocessor for Multimedia Signal Processing.	ICME	2006	DBLP DOI BibTeX RDF
17	Hong Yue, Ming-che Lai, Kui Dai, Zhiying Wang 0003	Design of a Configurable Embedded Processor Architecture for DSP Functions.	ICPADS (2)	2005	DBLP DOI BibTeX RDF
17	Gianluca Tempesti, Pierre-André Mudry, Ralph Hoffmann	A Move Processor for Bio-Inspired Systems.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
17	Wilfried Steiner, John M. Rushby, Maria Sorea, Holger Pfeifer	Model Checking a Fault-Tolerant Startup Algorithm: From Design Exploration To Exhaustive Fault Simulation.	DSN	2004	DBLP DOI BibTeX RDF
17	Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard P. Fettweis	Compiler Scheduling for STA-Processors.	PARELEC	2004	DBLP DOI BibTeX RDF
17	Christoph Scherrer, Andreas Steininger	Dealing with dormant faults in an embedded fault-tolerant computer system.	IEEE Trans. Reliab.	2003	DBLP DOI BibTeX RDF
17	Thomas A. Henzinger, Christoph M. Kirsch, Slobodan Matic	Schedule-Carrying Code.	EMSOFT	2003	DBLP DOI BibTeX RDF
17	Reinhard Maier, Günther Bauer 0001, Georg Stöger, Stefan Poledna	Time-Triggered Architecture: A Consistent Computing Platform.	IEEE Micro	2002	DBLP DOI BibTeX RDF
17	Ricky W. Butler	Formal Methods at NASA Langley.	TPHOLs	2002	DBLP DOI BibTeX RDF
17	Andreas Steininger, Johann Vilanek	Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example.	ICCD	2002	DBLP DOI BibTeX RDF
17	John M. Rushby	An Overview of Formal Verification for the Time-Triggered Architecture.	FTRTFT	2002	DBLP DOI BibTeX RDF
17	Seppo Virtanen, Johan Lilius	The TACO protocol processor simulation environment.	CODES	2001	DBLP DOI BibTeX RDF	simulation, protocol, microprocessor, codesign
17	John M. Rushby	Bus Architectures for Safety-Critical Embedded Systems.	EMSOFT	2001	DBLP DOI BibTeX RDF
17	Wei-Tek Hsu, Von-Wun Soo	Market Performance of Adaptive Trading Agents in Synchronous Double Auctions.	PRIMA	2001	DBLP DOI BibTeX RDF
17	Henjo Schot, Henk Corporaal	Automated Design of an ASIP for Image Processing Applications (Research Note).	Euro-Par	2000	DBLP DOI BibTeX RDF