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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 120 occurrences of 105 keywords
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Results
Found 126 publication records. Showing 126 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
82 | Martin Sandrieser, Sabri Pllana, Siegfried Benkner |
Evaluation of the SUN UltraSparc T2+ Processor for Computational Science. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS (1) ![In: Computational Science - ICCS 2009, 9th International Conference, Baton Rouge, LA, USA, May 25-27, 2009, Proceedings, Part I, pp. 964-973, 2009, Springer, 978-3-642-01969-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Sun UltraSparc T2+, Niagara2, Evaluation, Computational Science |
82 | Robert Yung |
Design Decisions Influencing the UltraSPARC's Instruction Fetch Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 178-190, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
UltraSPARC, fast cycle time, in-cache prediction, instruction fetch architecture, instruction fetch unit, lower cycle-per-instruction, predictive set-associative cache, prefetch and dispatch unit, trade-off decisions, computer architecture, microprocessor |
72 | Spiros Kalogeropulos |
An Enhanced Trace Scheduler for SPARC Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 597-602, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
67 | Alexander Dalal, Lavi Lev, Sundari Mitra |
Design of an efficient power distribution network for the UltraSPARC-I microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 118-123, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
computer power supplies, UltraSPARC-I, simulation method, exact layout locations, excessive voltage drop, floorplanning constraints, power interconnections, reduced time-to-market, circuit analysis computing, circuit layout CAD, microprocessor chips, electromigration, CAD tools, power distribution network |
67 | Guillermo Maturana, James L. Ball, Jeffery Gee, Amaresh Iyer, J. Michael O'Connor |
Incas: a cycle accurate model of UltraSPARC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 130-137, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
cycle accurate model, UltraSPARC, Incas, message-passing mechanism, simulating concurrent modules, performance evaluation, C++, virtual machines, logic testing, microprocessor chips, performance estimates, diagnostics, tuning, RTL simulations, processor verification |
56 | Vladimir Cakarevic, Petar Radojkovic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero |
Characterizing the resource-sharing levels in the UltraSPARC T2 processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 481-492, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Sun Nigara T2, CMP, job scheduling, simultaneous multithreading, performance characterization, CMT |
56 | Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen, Santosh G. Abraham |
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 93-104, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
56 | Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry |
Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 158-163, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
55 | Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero |
Thread to strand binding of parallel network applications in massive multi-threaded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2010, Bangalore, India, January 9-14, 2010, pp. 191-202, 2010, ACM, 978-1-60558-877-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
ultrasparc t2, simultaneous multithreading, process scheduling, cmt |
53 | Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Ana Sonia Leon |
A dual-core 64b ultraSPARC microprocessor for dense server applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 673-677, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
L2, UltraSPARC, coupling noise, deep submicron technology, dense server, dual-core, throughput computing, cache, multiprocessor, leakage, NBTI, negative bias temperature instability |
43 | Jun Shirako, David M. Peixotto, Vivek Sarkar, William N. Scherer III |
Phaser accumulators: A new reduction construct for dynamic parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-12, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
43 | Myungho Lee, Brian Whitney, Nawal Copty |
Performance and Scalability of OpenMP Programs on the Sun FireTM E25K Throughput Computing Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WOMPAT ![In: Shared Memory Parallel Programming with OpenMP, 5th International Workshopon OpenMP Applications and Tools, WOMPAT 2004, Houston, TX, USA, May 17-18, 2004,Revised Selected Papers, pp. 19-28, 2004, Springer, 3-540-24560-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
41 | Anjali Kinra, Aswin Mehta, Neal Smith, Jackie Mitchell, Fred Valente |
Diagnostic techniques for the UltraSPARC microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 480-486, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
41 | Marc E. Levitt |
Designing UltraSparc for Testability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 14(1), pp. 10-17, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
41 | Andrew Over, Bill Clarke, Peter E. Strazdins |
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: 2007 IEEE International Symposium on Performance Analysis of Systems and Software, April 25-27, 2007, San Jose, California, USA, Proceedings, pp. 12-22, 2007, IEEE Computer Society, 1-4244-1081-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
speedup analysis, Sparc Sulima, UltraSPARC IIICu-based multiprocessor systems, careful locking, simulation time quantum, serial simulation, load-balancing, parallel simulation, parallel discrete event simulation, interconnect model, NAS parallel benchmarks |
29 | Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Rizos Sakellariou, Mateo Valero |
FlexDCP: a QoS framework for CMP architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGOPS Oper. Syst. Rev. ![In: ACM SIGOPS Oper. Syst. Rev. 43(2), pp. 86-96, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Shrenik Mehta, Dwayne Lee |
Industry perspective on chip multi-threading, bridging the gap with academia using OpenSPARC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: Proceedings of the 2007 Workshop on Computer Architecture Education, WCAE 2007, San Diego, California, USA, Saturday, June 9, 2007, pp. 65, 2007, ACM, 978-1-59593-797-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Yonghong Song, Spiros Kalogeropulos, Partha Tirumalai |
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA, pp. 99-109, 2005, IEEE Computer Society, 0-7695-2429-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Spiros Kalogeropulos, Mahadevan Rajagopalan, Vikram Rao, Yonghong Song, Partha Tirumalai |
Processor Aware Anticipatory Prefetching in Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 106-117, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako, Motoki Obata, Keiji Kimura, Hironori Kasahara |
Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for High Performance Computing, 17th International Workshop, LCPC 2004, West Lafayette, IN, USA, September 22-24, 2004, Revised Selected Papers, pp. 319-331, 2004, Springer, 3-540-28009-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Neungsoo Park, Bo Hong, Viktor K. Prasanna |
Tiling, Block Data Layout, and Memory Hierarchy Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 14(7), pp. 640-654, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Block data layout, TLB misses, memory hierarchy, tiling, cache misses |
29 | Victor Melamed, Harry Stuimer, David Wilkins, Lawrence Chang, Kevin Normoyle, Sutikshan Bhutani |
Innovative Verification Techniques Used in the Implementation of a Third-Generation 1.1GHz 64b Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORTE ![In: Formal Techniques for Networked and Distributed Systems - FORTE 2002, 22nd IFIP WG 6.1 International Conference Houston, Texas, USA, November 11-14, 2002, Proceedings, pp. 360-363, 2002, Springer, 3-540-00141-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Anssi Huttunen, Irek Defée |
Performance of desktop software MPEG-2 TS decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 352-355, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
27 | Yu Wang, Linda Wu, Jing Guo |
Multi-Grain Parallel Accelerate System for H.264 Encoder on ULTRASPARC T2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. ![In: J. Comput. 8(12), pp. 3293-3297, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
27 | Azzurra Pulimeno, Mariagrazia Graziano, Gianluca Piccinini |
UDSM Trends Comparison: From Technology Roadmap to UltraSparc Niagara2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 20(7), pp. 1341-1346, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
27 | Lawrence Spracklen |
Sun's 3rd generation on-chip UltraSPARC security accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Chips Symposium ![In: 2009 IEEE Hot Chips 21 Symposium (HCS), Stanford, CA, USA, August 23-25, 2009, pp. 1-25, 2009, IEEE, 978-1-4673-8873-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Thomas A. Ziaja, Poh J. Tan |
Efficient Array Characterization in the UltraSPARC T2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 27th IEEE VLSI Test Symposium, VTS 2009, May 3-7, 2009, Santa Cruz, California, USA, pp. 3-8, 2009, IEEE Computer Society, 978-0-7695-3598-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Georg Hager, Thomas Zeiser, Gerhard Wellein |
Data Access Characteristics and Optimizations for Sun UltraSPARC T2 and T2+ Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Parallel Process. Lett. ![In: Parallel Process. Lett. 18(4), pp. 471-490, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Ishwar Parulkar, Sriram Anandakumar, Gaurav Agarwal, Gordon Liu, Krishna Rajan, Frank Chiu, Rajesh Pendurkar |
DFX of a 3rd Generation, 16-core/32-thread UltraSPARC- CMT Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2008 IEEE International Test Conference, ITC 2008, Santa Clara, California, USA, October 26-31, 2008, pp. 1-10, 2008, IEEE Computer Society, 978-1-4244-2403-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Liang-Chi Chen, Paul Dickinson, Prasad Mantri, Murali M. R. Gala, Peter Dahlgren, Subhra Bhattacharya, Olivier Caty, Kevin Woodling, Thomas A. Ziaja, David Curwen, Wendy Yee, Ellen Su, Guixiang Gu, Tim Nguyen |
Transition Test on UltraSPARC- T2 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2008 IEEE International Test Conference, ITC 2008, Santa Clara, California, USA, October 26-31, 2008, pp. 1-10, 2008, IEEE Computer Society, 978-1-4244-2403-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Peter E. Strazdins, Bill Clarke, Andrew Over |
Efficient Cycle-Accurate Simulation of the Ultrasparc III CPU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSC ![In: Computer Science 2007. Proceedings of the Thirtieth Australasian Computer Science Conference (ACSC2007). Ballarat, Victoria, Australia, January 30 - February 2, 2007. Proceedings, pp. 221-228, 2007, Australian Computer Society, 1-920-68243-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
|
27 | Joseph Antony, Pete P. Janes, Alistair P. Rendell |
Exploring Thread and Memory Placement on NUMA Architectures: Solaris and Linux, UltraSPARC/FirePlane and Opteron/HyperTransport. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings, pp. 338-352, 2006, Springer, 3-540-68039-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Ana Sonia Leon, Brian Langley, Jinuk Luke Shin |
The UltraSPARC T1 Processor: CMT Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006, pp. 555-562, 2006, IEEE, 1-4244-0075-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | P. J. Tan, Tung Le, Keng-Hian Ng, Prasad Mantri, James Westfall |
Testing of UltraSPARC T1 Microprocessor and its Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2006 IEEE International Test Conference, ITC 2006, Santa Clara, CA, USA, October 22-27, 2006, pp. 1-10, 2006, IEEE Computer Society, 1-4244-0292-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Toshinari Takayanagi, Jinuk Luke Shin, Bruce Petrick, Jeffrey Y. Su, Howard Levy, Ha Pham, Jinseung Son, Nathan Moon, Dina Bistry, Umesh Nair, Mandeep Singh, Vikas Mathur, Ana Sonia Leon |
A dual-core 64-bit ultraSPARC microprocessor for dense server applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 40(1), pp. 7-18, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Adam Czezowski, Peter Christen |
How Fast Is -Fast? Performance Analysis of KDD Applications Using Hardware Performance Counters on UltraSPARC-III. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AusDM ![In: The 15th Australian Joint Conference on Artificial Intelligence 2002, Proceedings Australasian Data Mining Workshop, Canberra, Australia, 3rd December 2002, pp. 117-130, 2002, University of Technology Sydney, Australia, 0-9750075-0-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP BibTeX RDF |
|
27 | Hee-Tae Ahn, David J. Allstot |
A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 35(3), pp. 450-454, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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27 | Farideh Golshan |
Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARC-III microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000, pp. 141-150, 2000, IEEE Computer Society, 0-7803-6546-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
27 | Tim Horel, Gary Lauterbach |
UltraSPARC-III: designing third-generation 64-bit performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 19(3), pp. 73-85, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
27 | Hee-Tae Ahn |
A ±25 ps jitter 1.9 V CMOS PLL for UltraSPARC microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, CICC 1999, San Diego, CA, USA, May 16-19, 1999, pp. 303-305, 1999, IEEE, 0-7803-5443-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
27 | Anjali Kinra |
Towards reducing "functional only" fails for the UltraSPARC microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 147-154, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
27 | Kevin Normoyle, Michael A. Csoppenszky, Allan Tzeng, Timothy P. Johnson, Christopher D. Furman, Jamshid Mostoufi |
UltraSPARC-II/: expanding the boundaries of a system on a chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 18(2), pp. 14-24, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Ramesh Radhakrishnan, Lizy Kurian John |
Execution characteristics of object oriented programs on the UltraSPARC-II. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: 5th International Conference On High Performance Computing, HiPC 1998, Madras, India, 20-20 December, 1998, pp. 202-211, 1998, IEEE Computer Society, 0-8186-9194-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Knut Omang |
Performance of a Cluster of PCI Based UltraSparc Workstations Interconnected with SCI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CANPC ![In: Network-Based Parallel Computing: Communication, Architecture, and Applications, Second International Workshop, CANPC '98, Las Vegas, Nevada, USA, January 31 - February 1, 1998, Proceedings, pp. 232-248, 1998, Springer, 3-540-64140-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Marc Tremblay, J. Michael O'Connor |
UltraSparc I: a four-issue processor supporting multimedia. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 16(2), pp. 42-50, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
27 | Zhi-Jian (Alex) Mou, Daniel Rice, Wei Ding |
VIS-based native video processing on UltraSPARC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (2) ![In: Proceedings 1996 International Conference on Image Processing, Lausanne, Switzerland, September 16-19, 1996, pp. 153-156, 1996, IEEE Computer Society, 0-7803-3259-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
27 | Gary Goldman, Partha Tirumalai |
UltraSPARC-II: The Advancement of UltraComputing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: Forty-First IEEE Computer Society International Conference: Technologies for the Information Superhighway, COMPCON 1996, Santa Clara, California, USA, February 25-28, 1996, Digest of Papers., pp. 417-423, 1996, IEEE Computer Society, 0-8186-7414-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
27 | Partha Tirumalai, Dale Greenley, Boris Beylin, Krishna Subramanian 0003 |
UltraSPARC: Compiling for Maximum Floating-Point Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: Forty-First IEEE Computer Society International Conference: Technologies for the Information Superhighway, COMPCON 1996, Santa Clara, California, USA, February 25-28, 1996, Digest of Papers., pp. 408-416, 1996, IEEE Computer Society, 0-8186-7414-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
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27 | Marc Tremblay, Dale Greenley, Kevin Normoyle |
The design of the microarchitecture of UltraSPARC-I. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 83(12), pp. 1653-1663, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
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27 | Chang-Guo Zhou, Leslie Kohn, Daniel Rice, Ihtisham Kabir, Aman Jabbi, Xiao-Ping Hu |
MPEG Video Decoding with the UltraSPARC Visual Instruction Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: COMPCON '95: Technologies for the Information Superhighway, Digest of Papers, San Francisco, California, USA, March 5-9, 1995, pp. 470-475, 1995, IEEE Computer Society, 0-8186-7029-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Dale Greenley, J. Bauman, D. Chang, Dennis Chen, R. Eltejaein, Philip A. Ferolito, P. Fu, Robert B. Garner, D. Greenhill, H. Grewal, Kalon Holdbrook, B. Kim, Leslie Kohn, Hang Kwan, M. Levitt, Guillermo Maturana, D. Mrazek, Chitresh Narasimhaiah, Kevin Normoyle, N. Parveen, P. Patel, A. Prabhu, Marc Tremblay, Michelle Wong, L. Yang, Krishna Yarlagadda, Robert K. Yu, Robert Yung, Gregory B. Zyner |
UltraSPARC: The Next Generation Superscalar 64-bit SPARC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: COMPCON '95: Technologies for the Information Superhighway, Digest of Papers, San Francisco, California, USA, March 5-9, 1995, pp. 442-451, 1995, IEEE Computer Society, 0-8186-7029-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Leslie Kohn, Guillermo Maturana, Marc Tremblay, A. Prabhu, Gregory B. Zyner |
The Visual Instruction Set (VIS) in UltraSPARC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: COMPCON '95: Technologies for the Information Superhighway, Digest of Papers, San Francisco, California, USA, March 5-9, 1995, pp. 462-469, 1995, IEEE Computer Society, 0-8186-7029-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | S. Mehta, S. Ahmed, S. Al-Ashari, Dennis Chen, Dev Chen, S. Cokmez, R. Eltejaein, P. Fu, Jeffery Gee, T. Granvold, Amaresh Iyer, A. K. Lin, Guillermo Maturana, D. McConn, H. Mohammed, Jamshid Mostoufi, A. Moudgal, Srinivas Nori, Gary Peterson, M. Splain, T. Yu |
Verification of the UltraSPARC Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COMPCON ![In: COMPCON '95: Technologies for the Information Superhighway, Digest of Papers, San Francisco, California, USA, March 5-9, 1995, pp. 452-461, 1995, IEEE Computer Society, 0-8186-7029-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | James Gateley, Miriam Blatt, Dennis Chen, Scott Cooke, Piyush Desai, Manjunath Doreswamy, Mark Elgood, Gary Feierbach, Tim Goldsbury, Dale Greenley, Raju Joshi, Mike Khosraviani, Robert Kwong, Manish Motwani, Chitresh Narasimhaiah, Sam J. Nicolino Jr., Tooru Ozeki, Gary Peterson, Chris Salzmann, Nasser Shayesteh, Jeffrey Whitman, Pak Wong |
UltraSPARC-I Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995., pp. 13-18, 1995, ACM Press, 0-89791-725-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Lawrence Yang, David Gao 0001, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein |
System Design Methodology of UltraSPARC-I. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995., pp. 7-12, 1995, ACM Press, 0-89791-725-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | A. Cao, A. Adalal, J. Bauman, P. Delisle, P. Dedood, P. Donehue, M. Dell'OcaKhouja, T. Doan, Manjunath Doreswamy, Philip A. Ferolito, O. Geva, D. Greenhill, S. Gopaladhine, J. Irwin, L. Lev, J. MacDonald, M. Ma, Samir Mitra, P. Patel, A. Prabhu, R. Puranik, S. Rozanski, N. Ross, P. Saggurti, Slobodan Simovich, R. Sunder, B. Sur, W. Vercruysse, Michelle Wong, P. Yip, Robert K. Yu, J. Zhou, Gregory B. Zyner |
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995., pp. 19-22, 1995, ACM Press, 0-89791-725-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
27 | Marc Tremblay, Guillermo Maturana, Atsushi Inoue, Leslie Kohn |
A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 32st Conference on Design Automation, San Francisco, California, USA, Moscone Center, June 12-16, 1995., pp. 2-6, 1995, ACM Press, 0-89791-725-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
26 | Ruken Zilan, Javier Verdú, Jorge García-Vidal, Mario Nemirovsky, Rodolfo A. Milito, Mateo Valero |
An Abstraction Methodology for the Evaluation of Multi-core Multi-threaded Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 2011, 19th Annual IEEE/ACM International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, Singapore, 25-27 July, 2011, pp. 478-481, 2011, IEEE Computer Society, 978-1-4577-0468-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
Fine grain modeling, a methodology to build simulators, a simulation tool for multi�??levels of shared resource architecture modeling, UltraSPARC T2, queueing modeling |
14 | Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi |
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 2(2), pp. 15:1-15:32, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
14 | Kamesh Madduri, David A. Bader |
Compact graph representations and parallel connectivity algorithms for massive dynamic network analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-11, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
14 | Jun Shirako, Jisheng M. Zhao, V. Krishna Nandivada, Vivek Sarkar |
Chunking parallel loops in the presence of synchronization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 181-192, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
loop chunking, phasers, exceptions |
14 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 77-86, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
14 | Sabri Pllana, Siegfried Benkner, Eduard Mehofer, Lasse Natvig, Fatos Xhafa |
Towards an Intelligent Environment for Programming Multi-core Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par Workshops ![In: Euro-Par 2008 Workshops - Parallel Processing, VHPC 2008, UNICORE 2008, HPPC 2008, SGS 2008, PROPER 2008, ROIA 2008, and DPA 2008, Las Palmas de Gran Canaria, Spain, August 25-26, 2008, Revised Selected Papers, pp. 141-151, 2008, Springer, 978-3-642-00954-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Georg Hager, Thomas Zeiser, Gerhard Wellein |
Data access optimizations for highly threaded multi-core CPUs with multiple memory controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-7, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross |
Proactive temperature balancing for low cost thermal management in MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 250-257, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Jiaqi Zhang, Zhiyi Huang 0001, Wenguang Chen, Qihang Huang, Weimin Zheng |
Maotai: View-Oriented Parallel Programming on CMT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 636-643, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Daniel Chen 0001, Gabriela Jacques-Silva, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Bruce G. Mealey |
Error Behavior Comparison of Multiple Computing Systems: A Case Study Using Linux on Pentium, Solaris on SPARC, and AIX on POWER. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 14th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2008, 15-17 December 2008, Taipei, Taiwan, pp. 339-346, 2008, IEEE Computer Society, 978-0-7695-3448-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Tien-Hsiung Weng, Ruey-Kuen Perng, Barbara M. Chapman |
OpenMP Implementation of SPICE3 Circuit Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 35(5), pp. 493-505, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
OpenMP SPICE circuit simulator, Shared-memory programming model |
14 | David A. Bader, Kamesh Madduri |
A Graph-Theoretic Analysis of the Human Protein-Interaction Network Using Multicore Parallel Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-6, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Partha Tirumalai, Yonghong Song, Spiros Kalogeropulos |
Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings, pp. 280-289, 2007, Springer, 978-3-540-74308-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | Paul A. Karger |
Performance and security lessons learned from virtualizing the alpha processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 392-401, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
virtualizability, security, virtual machine monitors, hypervisors |
14 | Jacqueline Chame, Chun Chen 0002, Pedro C. Diniz, Mary W. Hall, Yoon-Ju Lee, Robert F. Lucas |
An overview of the ECO project. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Dan Wallin, Henrik Löf, Erik Hagersten, Sverker Holmgren |
Multigrid and Gauss-Seidel smoothers revisited: parallelization on chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 145-155, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Gauss-Seidel, temporal blocking, CMP, OpenMP, relaxation, orderings, multigrid, Poisson equation, cache blocking |
14 | Wenduo Zhou, David K. Lowenthal |
A Parallel, Out-of-Core Algorithm for RNA Secondary Structure Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2006 International Conference on Parallel Processing (ICPP 2006), 14-18 August 2006, Columbus, Ohio, USA, pp. 74-81, 2006, IEEE Computer Society, 0-7695-2636-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Joseph Bonneau, Ilya Mironov |
Cache-Collision Timing Attacks Against AES. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CHES ![In: Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings, pp. 201-215, 2006, Springer, 3-540-46559-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache, cryptanalysis, AES, side-channel attack, timing attack |
14 | Jason Hiser, Daniel W. Williams, Adrian Filipi, Jack W. Davidson, Bruce R. Childers |
Evaluating fragment construction policies for SDT systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 2nd International Conference on Virtual Execution Environments, VEE 2006, Ottawa, Ontario, Canada, June 14-16, 2006, pp. 122-132, 2006, ACM, 978-1-59593-332-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
dynamic translation performance, software dynamic translator, performance, low overhead |
14 | Paul Fearnhead |
Direct simulation for discrete mixture distributions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Stat. Comput. ![In: Stat. Comput. 15(2), pp. 125-133, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Bayesian model choice, binomial mixture, genetic linkage, Markov-dependent mixtures, Poisson mixture, particle filters, Forward-Backward algorithm |
14 | Paul C. van Oorschot, Anil Somayaji, Glenn Wurster |
Hardware-Assisted Circumvention of Self-Hashing Software Tamper Resistance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Dependable Secur. Comput. ![In: IEEE Trans. Dependable Secur. Comput. 2(2), pp. 82-92, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
self-hashing, operating system kernels, software protection, Tamper resistance, checksumming, application security, processor design |
14 | Andrew Over, Peter E. Strazdins, Bill Clarke |
Cycle Accurate Memory Modelling: A Case-Study in Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 13th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS 2005), 27-29 September 2005, Atlanta, GA, USA, pp. 85-96, 2005, IEEE Computer Society, 0-7695-2458-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Chun Chen 0002, Jacqueline Chame, Mary W. Hall |
Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA, pp. 111-122, 2005, IEEE Computer Society, 0-7695-2298-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Prasad Jayanti, Srdjan Petrovic |
Efficiently Implementing a Large Number of LL/SC Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OPODIS ![In: Principles of Distributed Systems, 9th International Conference, OPODIS 2005, Pisa, Italy, December 12-14, 2005, Revised Selected Papers, pp. 17-31, 2005, Springer, 3-540-36321-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Glenn Wurster, Paul C. van Oorschot, Anil Somayaji |
A Generic Attack on Checksumming-Based Software Tamper Resistance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
S&P ![In: 2005 IEEE Symposium on Security and Privacy (S&P 2005), 8-11 May 2005, Oakland, CA, USA, pp. 127-138, 2005, IEEE Computer Society, 0-7695-2339-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Prasad Jayanti, Srdjan Petrovic |
Efficiently Implementing LL/SC Objects Shared by an Unknown Number of Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWDC ![In: Distributed Computing - IWDC 2005, 7th International Workshop, Kharagpur, India, December 27-30, 2005, Proceedings, pp. 45-56, 2005, Springer, 3-540-30959-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | ManMohan S. Sodhi, Stephen Norris |
A Flexible, Fast, and Optimal Modeling Approach Applied to Crew Rostering at London Underground. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 127(1-4), pp. 259-281, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
crew rostering, rota, cyclic graph, aggregation, decomposition, mixed-integer linear programming |
14 | Joon-Sang Park, Michael Penner, Viktor K. Prasanna |
Optimizing Graph Algorithms for Improved Cache Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 15(9), pp. 769-782, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Cache-friendly algorithms, shortest path, graph algorithms, minimum spanning trees, graph matching, algorithm performance, cache-oblivious algorithms, data layout optimizations |
14 | Michael Krietemeyer, Daniel Versick, Djamshid Tavangarian |
A Mathematical Model for the Transitional Region Between Cache Hierarchy Levels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IICS ![In: Innovative Internet Community Systems, 4th InternationalWorkshop, IICS 2004, Guadalajara, Mexico, June 21-23, 2004, Revised Papers, pp. 178-188, 2004, Springer, 3-540-28880-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Rodric M. Rabbah, Krishna V. Palem |
Data remapping for design space optimization of embedded memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 2(2), pp. 186-218, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
data remapping, embedded systems, caches, memory hierarchy, Design space exploration, compiler optimization, memory subsystem |
14 | José Carlos Rodríguez-Rodríguez, Alexis Quesada-Arencibia, Roberto Moreno-Díaz Jr., K. Nicholas Leibovic |
On Parallel Channel Modeling of Retinal Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2003, 9th International Workshop on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 24-28, 2003, Revised Selected Papers, pp. 471-481, 2003, Springer, 3-540-20221-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Alan E. Charlesworth |
The Sun Fireplane Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 22(1), pp. 36-45, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Daisuke Takahashi |
A Blocking Algorithm for Parallel 1-D FFT on Shared-Memory Parallel Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARA ![In: Applied Parallel Computing Advanced Scientific Computing, 6th International Conference, PARA 2002, Espoo, Finland, June 15-18, 2002, Proceedings, pp. 380-392, 2002, Springer, 3-540-43786-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Toshio Endo, Kenjiro Taura |
Reducing pause time of conservative collectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSP/ISMM ![In: Proceedings of The Workshop on Memory Systems Performance (MSP 2002), June 16, 2002 and The International Symposium on Memory Management (ISMM 2002), June 20-21, 2002, Berlin, Germany, pp. 119-131, 2002, ACM, 1-58113-539-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
memory management, concurrent garbage collection, parallel garbage collection, conservative garbage collection |
14 | Ali Akoglu, Aravind Dasu, Arvind Sudarsanam, Mayur Srinivasan, Sethuraman Panchanathan |
Pattern Recognition Tool to Detect Reconfigurable Patterns in MPEG4 Video Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
reconfigurable media processor, recurring pattern analyzer, mobile multimedia processing, partition, dynamic reconfiguration, reconfigurable architectures, data flow graph, control flow graph, MPEG4, hardware software co-design, hardware software partitioning, routing architecture |
14 | Joon-Sang Park, Michael Penner, Viktor K. Prasanna |
Optimizing Graph Algorithms for Improved Cache Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Hiran Tennakoon, Carl Sechen |
Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, ICCAD 2002, San Jose, California, USA, November 10-14, 2002, pp. 395-402, 2002, ACM / IEEE Computer Society, 0-7803-7607-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | Ishwar Parulkar, Thomas A. Ziaja, Rajesh Pendurkar, Anand D'Souza, Amitava Majumdar 0002 |
A Scalable, Low Cost Design-for-Test Architecture for UltraSPARCTM Chip Multi-Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 726-735, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
14 | C.-J. Richard Shi, Sheldon X.-D. Tan |
Compact representation and efficient generation of s-expandedsymbolic network functions for computer-aided analog circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(7), pp. 813-827, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam |
vEC: virtual energy counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PASTE ![In: Proceedings of the 2001 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, PASTE'01, Snowbird, Utah, USA, June 18-19, 2001, pp. 28-31, 2001, ACM, 1-58113-413-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
system energy consumption, optimizations, embedded systems, signal processing, hardware performance counters |
14 | Daisuke Takahashi |
A Blocking Algorithm for FFT on Cache-Based Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCN ![In: High-Performance Computing and Networking, 9th International Conference, HPCN Europe 2001, Amsterdam, The Netherlands, June 25-27, 2001, Proceedings, pp. 551-554, 2001, Springer, 3-540-42293-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Perry Cheng, Guy E. Blelloch |
A Parallel, Real-Time Garbage Collector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2001 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Snowbird, Utah, USA, June 20-22, 2001, pp. 125-136, 2001, ACM, 1-58113-414-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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