Search results for "VPGA"

Found 8 publication records. Showing 8 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
82	Chetan Patel, Anthony Cozzie, Herman Schmit, Lawrence T. Pileggi	An architectural exploration of via patterned gate arrays.	ISPD	2003	DBLP DOI BibTeX RDF	VPGA, lookup table, interconnect architectures, gate array
76	Aneesh Koorapaty, V. Kheterpal, Padmini Gopalakrishnan, M. Fu, Lawrence T. Pileggi	Exploring Logic Block Granularity for Regular Fabrics.	DATE	2004	DBLP DOI BibTeX RDF
76	Aneesh Koorapaty, Lawrence T. Pileggi, Herman Schmit	Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics.	FPL	2003	DBLP DOI BibTeX RDF
56	R. Reed Taylor, Herman Schmit	Enabling energy efficiency in via-patterned gate array devices.	DAC	2004	DBLP DOI BibTeX RDF	VPGA, optimization, low-power, power, voltage scaling, structured ASIC
42	Abdelwahab Boualouache, Ridha Soua, Thomas Engel 0001	VPGA: An SDN-based Location Privacy Zones Placement Scheme for Vehicular Networks.	IPCCC	2019	DBLP DOI BibTeX RDF
42	Kim Yaw Tong, V. Kheterpal, Vyacheslav Rovner, Lawrence T. Pileggi, Herman Schmit	Regular logic fabrics for a via patterned gate array (VPGA).	CICC	2003	DBLP DOI BibTeX RDF
31	R. Reed Taylor, Herman Schmit	Creating a power-aware structured ASIC.	ISLPED	2004	DBLP DOI BibTeX RDF	VPGA, low-power, voltage scaling, power optimization, gate sizing, structured ASIC
25	Thomas C. P. Chau, Philip Heng Wai Leong, Sam M. H. Ho, Brian P. W. Chan, Steve C. L. Yuen, Kong-Pang Pun, Oliver C. S. Choy, Xinan Wang	A comparison of via-programmable gate array logic cell circuits.	FPGA	2009	DBLP DOI BibTeX RDF	logic cell, via-programmable gate arrays

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