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Publication years (Num. hits)
1986-1991 (33) 1992-1993 (33) 1994 (33) 1995-1996 (48) 1997-1998 (33) 1999 (60) 2000 (56) 2001 (88) 2002 (58) 2003 (143) 2004 (155) 2005 (149) 2006 (185) 2007 (173) 2008 (203) 2009 (170) 2010 (179) 2011 (195) 2012 (241) 2013 (270) 2014 (262) 2015 (305) 2016 (297) 2017 (329) 2018 (344) 2019 (331) 2020 (285) 2021 (287) 2022 (307) 2023 (357) 2024 (71)
Publication types (Num. hits)
article(1962) data(2) incollection(4) inproceedings(3669) phdthesis(10) proceedings(33)
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Found 5680 publication records. Showing 5680 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
82Mahesh Kumar Adimulam, Krishna Kumar Movva, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas A low power, variable resolution two-step flash ADC. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF two-step flash ADC, variable resolution, low power
74Jonas Elbornsson, Fredrik Gustafsson, Jan-Erik Eklund Blind equalization of time errors in a time-interleaved ADC system. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
73Peng Juan, Ma Hong, Tian Chen Modeling of ADC Nonlinearity by Time-Delay-Based Power Series. Search on Bibsonomy Asia International Conference on Modelling and Simulation The full citation details ... 2008 DBLP  DOI  BibTeX  RDF ADC nonlinearity, Time-delay-Based modeling, power series
73Heinz Mattes, Stéphane Kirmser, Sebastian Sattler Next Generation ADC Massive Parallel Testing with Real Time Parameter Evaluation. Search on Bibsonomy J. Electron. Test. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF delta-sigma-converter, ??-modulation, FPGA, mixed-signal test, ADC test
73Yih-Chyun Jenq Digital Signal Processing with Interleaved ADC Systems. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF interleaved ADC, DSP algorithm, aliasing, filter banks, A/D converter
73Chia-Nan Yeh, Yen-Tai Lai A novel flash analog-to-digital converter. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
72Jincheol Yoo, Daegyu Lee, Kyusun Choi, Jongsoo Kim A power and resolution adaptive flash analog-to-digital converter. Search on Bibsonomy ISLPED The full citation details ... 2002 DBLP  DOI  BibTeX  RDF TIQ comparator, flash ADC, inverter quantization, adaptive, threshold, analog-to-digital converter
65Ji Hwan (Paul) Chun, Hak-soo Yu, Jacob A. Abraham An efficient linearity test for on-chip high speed ADC and DAC using loop-back. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF BIST, linearity, ADC, mixed signal test, DAC
65Weng-leng Mok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
65Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
65Degang Chen 0001, Zhongjun Yu, Randall L. Geiger An adaptive, truly background calibration method for high speed pipeline ADC design. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
65Zhongjun Yu, Degang Chen 0001, Randall L. Geiger Accurate testing of ADC's spectral performance using imprecise sinusoidal excitations. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
64W. D. Bartlett Determination of coherence errors in ADC spectral domain testing. Search on Bibsonomy VTS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF coherence errors, ADC spectral domain testing, clock frequencies input, spectral domain based test, effective number of bits test, 10 MHz, 10 bit, analog-to-digital converter, analogue-digital conversion
64Bing Ma, Charles R. Meyer, Martin D. Pickles, Thomas L. Chenevert, Peyton H. Bland, Craig J. Galbán, Alnawaz Rehemtulla, Lindsay W. Turnbull, Brian D. Ross Voxel-by-Voxel Functional Diffusion Mapping for Early Evaluation of Breast Cancer Treatment. Search on Bibsonomy IPMI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
63Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi CMOS flash analog-to-digital converter for high speed and low voltage applications. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF TIQ comparator, fat tree encoder, flash ADC, analog-to-digital converter, low voltage, high speed
63Yuan-Tzu Ting, Li Wei Chao, Wei Chung Chao A Practical Implementation Of Dynamic Testing Of An Ad Converter. Search on Bibsonomy Asian Test Symposium The full citation details ... 1996 DBLP  DOI  BibTeX  RDF AD converter, effective bits, differential nonlinearity, integral nonlinearity, mixed frequency estimation algorithm, weighted least square method, spectral average method, frequency domain estimation, logical analyzer, instrument controller, high speed data acquisition device, GPIB, Datel ADC-HS12B, programmable signal generator, algorithm, software, automatic testing, histogram, PC, signal to noise ratio, analogue-digital conversion, dynamic testing
56R. de Vries, Augustus J. E. M. Janssen Decreasing the Sensitivity of ADC Test Parameters by Means of Wobbling. Search on Bibsonomy J. Electron. Test. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF wobble, ADC, dither, spectral test
55Xiaodong Zhang 0008, Magdy A. Bayoumi A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
55Tae-Hwan Oh, Sang-Min Yoo, Kyoung-Ho Moon, Jae-Whui Kim A 3.0 V 72mW 10b 100 MSample/s Nyquist-rate CMOS pipelined ADC in 0.54 mm2. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
55Young-Jae Cho, Kyung-Hoon Lee, Hee-Cheol Choi, Young-Ju Kim, Kyoung-Jun Moon, Seung-Hoon Lee, Seok-Bong Hyun, Seong-Su Park A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
55Naoki Kurosawa, Haruo Kobayashi 0001, Kensuke Kobayashi Channel linearity mismatch effects in time-interleaved ADC systems. Search on Bibsonomy ISCAS (1) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
55Eric Fogleman, Ian Galton, Henrik Jensen 0001 An area-efficient differential input ADC with digital common mode rejection. Search on Bibsonomy ISCAS (2) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
55Frank Sill, Davies W. de Lima Monteiro Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor. Search on Bibsonomy SBCCI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF pipelined SAC, error correction, ADC
55Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, Thomas Fleischmann An on-chip solution for static ADC test and measurement. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF ADC-BiST, code histogram, linearity measurements, test, system-on-chip, analog to digital converter
55Jaeyong Lee, Sungil Cho, Kwangsub Yoon 12bits 40mhz pipelined ADC with duty-correction circuit. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF adc(analog-to-digital converter), pipeline, cmos, dll
55DongHyun Ko, Ji-Hoon Jung, YoungGun Pu, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam A Design of 14-bits ADC and DAC for CODEC Applications in 0.18 µm CMOS Process. Search on Bibsonomy DELTA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF ADC(Analog-to-Digital Converter), DAC (Digital-to-Analog Converter), Sigma-Delta Modulator
55Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel A Level-Crossing Flash Asynchronous Analog-to-Digital Converter. Search on Bibsonomy ASYNC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
55Le Jin, Degang Chen 0001, Randall L. Geiger A digital self-calibration algorithm for ADCs based on histogram test using low-linearity input signals. Search on Bibsonomy ISCAS (2) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
55Hai Phuong Le, Aladin Zayegh, Jugdutt Singh Noise Analysis of a Reduced Complexity Pipeline Analog-to-Digital Converter. Search on Bibsonomy DELTA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
55Maria del Mar Hershenson Design of pipeline analog-to-digital converters via geometric programming. Search on Bibsonomy ICCAD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
55Pierrick Gachet, Christophe Mauras, Patrice Quinton, Yannick Saouter Alpha du centaur: a prototype environment for the design of parallel regular alorithms. Search on Bibsonomy ICS The full citation details ... 1989 DBLP  DOI  BibTeX  RDF
54Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF flash adc, nano-cmos, ti comparator, process variation, analog-to-digital converter, low voltage, high speed
54Parastoo Nikaeen, Boris Murmann, Robert W. Dutton Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF flash ADC, comparator, SNR, substrate noise
46Sreehari Veeramachaneni, Mahesh Kumar Adimulam, Venkat Tummala, M. B. Srinivas Design of a Low Power, Variable-Resolution Flash ADC. Search on Bibsonomy VLSI Design The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
46Hooman Farkhani, Mohammad Maymandi-Nejad, Manoj Sachdev A fully digital ADC using a new delay element with enhanced linearity. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
46Zheng Yang 0004, Jan Van der Spiegel A 10-bit 8.3MS/s switched-current successive approximation ADC for column-parallel imagers. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
46Liang Rong, Martin Gustafsson 0002, Ana Rusu, Mohammed Ismail 0001 Systematic Design of a Flash ADC for UWB Applications. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
46Masoud Babaie, Hamid Movahedian, Mehrdad Sharif Bakhtiar A Novel Method for Systematic Error Prediction of CMOS Folding and Interpolating ADC. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Youngbok Kim, Anuj Agarwal, Sameer R. Sonkusale Low power current mode ADC for CMOS sensor IC. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Hwang-Cherng Chow, Bo-Wei Chen, Hsiao-Chen Chen, Wu-Shiung Feng A 1.8 V, 0.3 mW, 10-bit SA-ADC with new self-timed timing control for biomedical applications. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Shigeto Tanaka, Yuji Gohda, Yasuhiro Sugimoto The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Zhongjun Yu, Degang Chen 0001, Randall L. Geiger, Ioannis Papantonopoulos Pipeline ADC linearity testing with dramatically reduced data capture time. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Hanqing Xing, Degang Chen 0001, Randall L. Geiger A two-step DDEM ADC for accurate and cost-effective DAC testing. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
46Eugenio Culurciello, Andreas G. Andreou An 8-bit, 1mW successive approximation ADC in SOI CMOS. Search on Bibsonomy ISCAS (1) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
46B. E. Jonsson, Hannu Tenhunen A dual 3-V 32-MS/s CMOS switched-current ADC for telecommunication applications. Search on Bibsonomy ISCAS (2) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
46Aigars Gertners, Valery Zagursky, Dzintra Saldava Behavior model of mixed ADC systems. Search on Bibsonomy J. Electron. Test. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF identification, behavior model, nonlinear system, high-level modeling, mixed system
46Anand Mohan, Aladin Zayegh, Aleksandar Stojcevski A High Speed Analog to Digital Converter for Ultra Wide Band Applications. Search on Bibsonomy EUC Workshops The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Flash Topology, UWB, Power Saving, ADC, CMOS Technology
46Hu Xiao, Ma Hong, Peng Juan, Tian Chen State-of-the-Art in Volterra Series Modeling for ADC Nonlinearity. Search on Bibsonomy Asia International Conference on Modelling and Simulation The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Volterra series, model, memory, nonlinear, analog to digital converter (ADC)
46Ricky Yiu-kee Choi, Chi-Ying Tsui A Low Energy Two-Step Successive Approximation Algorithm for ADC Design. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Successive Approximation Register ADC, Low Power
45Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet A new orthogonal online digital calibration for time-interleaved analog-to-digital converters. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
45Fernando Mourão, Leonardo Rocha 0001, Renata Braga Araújo, Thierson Couto, Marcos André Gonçalves, Wagner Meira Jr. Understanding temporal aspects in document classification. Search on Bibsonomy WSDM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF digital libraries, text classification, temporal analysis
45Mohammad Taherzadeh-Sani, Anas A. Hamoui Analysis of dynamic element matching (DEM) in pipelined ADCs. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
45Kyung-Hoon Lee, Young-Jae Cho, Hee-Cheol Choi, Yong-Hyun Park, Doo-Hwan Sa, Young-Lok Kim, Seung-Hoon Lee A 14b 100MS/s 3.4mm2 145mW 0.18um CMOS Pipeline A/D Converter. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
45Henrik Lundin, Mikael Skoglund, Peter Händel Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters. Search on Bibsonomy IEEE Trans. Signal Process. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Xin Dai, Degang Chen 0001, Randall L. Geiger A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCs. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Shih-Chang Hsia, Wen-Ching Lee A Very Low-Power Flash A/D Converter Based on Cmos Inverter Circuit. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF CMOS inverter, flash, A/D converter
45Yunmei Chen, Weihong Guo 0002, Qingguo Zeng, Xiaolu Yan, Feng Huang 0001, Hao Zhang 0030, Guojun He, Baba C. Vemuri, Yijun Liu Estimation, Smoothing, and Characterization of Apparent Diffusion Coefficient Profiles from High Angular Resolution DWI. Search on Bibsonomy CVPR (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
45Eduardo J. Peralías, Adoración Rueda, José Luis Huertas New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. Search on Bibsonomy J. Electron. Test. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF mixed-signal IC test, testable ADC, BIST, design for test, pipelined analog to digital converters
44Daniela De Venuto, Leonardo Reyneri Fast PWM-Based Test for High Resolution SigmaDelta ADCs. Search on Bibsonomy J. Electron. Test. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Test of high resolution ADC, Sigma-Delta ADC, PWM test signal
38John A. McNeill, Sanjeev Goluguri, Abhilash Nair "Split-ADC" Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity Errors in a 14b Pipeline ADC. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Umar H. Rizvi, Gerard J. M. Janssen, Jos H. Weber BER analysis of single-carrier MPAM in the presence of ADC quantization noise. Search on Bibsonomy PIMRC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Diego Pedro Morales, Antonio García 0001, Alberto J. Palma, Miguel A. Carvajal, Encarnación Castillo, Luis F. Capitán-Vallvey Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Hee-Cheol Choi, Young-Ju Kim, Se-Won Lee, Jae-Yeol Han, Oh-Bong Kwon, Younglok Kim, Seung-Hoon Lee A 52mW 0.56mm2 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Nitz Saputra, Michiel A. P. Pertijs, Kofi A. A. Makinwa, Johan H. Huijsing Sigma delta ADC with a dynamic reference for accurate temperature and voltage sensing. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37He Gong Wei, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
37Santiago Rodriguez-Parera, André Bourdoux, François Horlin, Jordi Carrabina, Liesbet Van der Perre Front-End ADC Requirements for Uniform Bandpass Sampling in SDR. Search on Bibsonomy VTC Spring The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Karim Abdelhalim, Leonard MacEachern, Samy A. Mahmoud A Nanowatt Successive Approximation ADC with Offset Correction for Implantable Sensor Applications. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Cheng Chen, Jiren Yuan A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Jere A. M. Järvinen, Mikko Saukoski, Kari Halonen A 12-bit Ratio-Independent Algorithmic ADC for a Capacitive Sensor Interface. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
37Zhengming Fu, Eugenio Culurciello An ultra-low power silicon-on-sapphire ADC for energy-scavenging sensors. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Alessandro Cabrini, Franco Maloberti, Riccardo Rovatti, Gianluca Setti On-line calibration of offset and gain mismatch in time-interleaved ADC using a sampled-data chaotic bit-stream. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Seogheon Ham, Yonghee Lee, Wunki Jung, Seunghyun Lim, Kwisung Yoo, Youngcheol Chae, Jihyun Cho, Dongmyung Lee, Gunhee Han CMOS image sensor with analog gamma correction using nonlinear single-slope ADC. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37M. R. Nabavi A 1-V 12-bit switched-op amp pipelined ADC with power optimization. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Guo-Ming Sung, Jyi-Hrong Tzeng, Chen-Shen Liao, Shih-Chieh Shu A Low-power 7-b 33-Msamples/s Switched-current Pipelined ADC for Motor Control. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
37Se-Won Kim, Young-Jae Cho, Kyung-Hoon Lee, Seung-Hoon Lee, Jae-Yup Lee, Hyun-Chul Noh, Hee-Sub Lee An 8b 240 MS/s 1.36 mm2 104 mW 0.18 um CMOS ADC for DVDs with dual-mode inputs. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Dinh Hung Dang, Yvon Savaria, Mohamad Sawan A novel approach for implementing ultra-high speed flash ADC using MCML circuits. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Martijn F. Snoeij, Albert J. P. Theuwissen, Johan H. Huijsing A 1.8 V 3.2µW comparator for use in a CMOS imager column-level single-slope ADC. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Qiong Wu 0013, Albert Z. Wang A 12 bits/200 MHz resolution/sampling/power-optimized ADC in 0.25µm SiGe BiCMOS. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Takeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata A 1V supply successive approximation ADC with rail-to-rail input voltage range. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
37Tae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
37Kamal El-Sankary, Mohamad Sawan A new digital background calibration technique for pipelined ADC. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
37F. Esahani, Philipp Basedau, Roland Ryter, Rolf Becker An 82 dB CMOS continuous-time complex bandpass sigma-delta ADC for GSM/EDGE. Search on Bibsonomy ISCAS (1) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37F. Hashemi, Khayrollah Hadidi, Abdollah Khoei Design of a CMOS image sensor with pixel-level ADC in 0.35µm process. Search on Bibsonomy ISCAS (2) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
37S. Mathur, M. Das, Preetam Tadeparthy, S. Ray, S. Mukherjee, B. L. Dinakaran A 115mW 12-bit 50 MSPS pipelined ADC. Search on Bibsonomy ISCAS (1) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
37Kuniyuki Tani, Norihiro Nikai, Atsushi Wada, Tetsuro Sawai A pipelined ADC macro design for multiple applications. Search on Bibsonomy ASP-DAC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
37Zulhakimi Razak, Tughrul Arslan Analog to Digital Converter Specification for UMTS/FDD Receiver Applications. Search on Bibsonomy DELTA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF UMTS/FDD, specification, pipeline, ADC
37Jian Ruan, Chung-Len Lee A Fast Two-Stage Sample-and-Hold Amplifier for Pipelined ADC Application. Search on Bibsonomy DELTA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Sample-and-hold amplifier, Two-stage structure, Bootstrapped switch, Bottom-plate sampling, Pipelined ADC
37Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors. Search on Bibsonomy J. Electron. Test. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF test flow optimization, analog and mixed-signal testing, ADC test
37Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST. Search on Bibsonomy J. Electron. Test. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF Built-In Self-Test (BIST), analog and mixed-signal testing, ADC test
36Ondrej Subrt, Petr Struhovský, Pravoslav Martínek, Jirí Hospodka Virtual Testing Environment for A/D Converters in Verilog-A and Maple Platform. Search on Bibsonomy DDECS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Hanqing Xing, Degang Chen 0001, Randall L. Geiger, Le Jin System identification -based reduced-code testing for pipeline ADCs' linearity test. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Tomoki Tanoue, Munehiko Nagatani, Takao Waho A Ternary Analog-to-Digital Converter System. Search on Bibsonomy ISMVL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Mohammad Taherzadeh-Sani, Anas A. Hamoui Digital background calibration of interstage-gain and capacitor-mismatch errors in pipelined ADCs. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36SeongHwan Cho, Sungmin Ock, Sang-Hoon Lee, Joonsuk Lee A low power pipelined analog-to-digital converter using series sampling capacitors. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Shailesh Radhakrishnan, Mingzhen Wang, Chien-In Henry Chen A low-power 4-b 2.5 Gsample/s pipelined flash analog-to-digital converter using differential comparator and DCVSPG encoder. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Yuh-Shyan Hwang, Lu-Po Liao, Chia-Chun Tsai, Wen-Ta Lee, Trong-Yen Lee, Jiann-Jong Chen A new CCII-based pipelined analog to digital converter. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36George Ginis, John M. Cioffi Optimum bandwidth partitioning with analog-to-digital converter constraints. Search on Bibsonomy IEEE Trans. Commun. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Hanjun Jiang, Haibo Fei, Degang Chen 0001, Randall L. Geiger A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimation. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Roman Genov, Gert Cauwenberghs Algorithmic partial analog-to-digital conversion in mixed-signal array processors. Search on Bibsonomy ISCAS (1) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
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