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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 14 occurrences of 12 keywords
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Results
Found 16 publication records. Showing 16 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
49 | Martín Vázquez 0001, Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps |
Decimal Adders/Subtractors in FPGA: Efficient 6-input LUT Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 42-47, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
BCD, add/subtract, addtion, FPGA, subtraction, decimal arithmetic |
44 | Ayan Palchaudhuri, Anindya Sundar Dhar |
FPGA Fabric Conscious Design and Implementation of Speed-Area Efficient Signed Digit Add-Subtract Logic through Primitive Instantiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSSC ![In: 53rd Asilomar Conference on Signals, Systems, and Computers, ACSCC 2019, Pacific Grove, CA, USA, November 3-6, 2019, pp. 1555-1559, 2019, IEEE, 978-1-7281-4301-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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44 | De Liu, Mingjiang Wang, Shikai Zuo |
Delay-optimized floating point fused add-subtract unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 12(17), pp. 20150642, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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44 | Jongwook Sohn, Earl E. Swartzlander Jr. |
Improved Architectures for a Fused Floating-Point Add-Subtract Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10), pp. 2285-2291, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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44 | Jae Hong Min, Jongwook Sohn, Earl E. Swartzlander Jr. |
A low-power dual-path floating-point fused add-subtract unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSCC ![In: Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers, ACSCC 2012, Pacific Grove, CA, USA, November 4-7, 2012, pp. 998-1002, 2012, IEEE, 978-1-4673-5050-1. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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44 | Ishan A. Patil, Prasanna Palsodkar, Ajay Gurjar |
Floating Point-based Universal Fused Add-Subtract Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SocProS ![In: Proceedings of the Second International Conference on Soft Computing for Problem Solving, SocProS 2012, December 28-30, 2012, JK Lakshmipat University (JKLU), Jaipur, India, pp. 259-270, 2012, Springer, 978-81-322-1601-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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24 | Robert Pasko, Patrick Schaumont, Veerle Derudder, Serge Vernalde, Daniela Duracková |
A new algorithm for elimination of common subexpressions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(1), pp. 58-68, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
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20 | Warren A. Hunt Jr., Sol Swords |
Centaur Technology Media Unit Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 21st International Conference, CAV 2009, Grenoble, France, June 26 - July 2, 2009. Proceedings, pp. 353-367, 2009, Springer, 978-3-642-02657-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
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20 | Neil Burgess |
Prenormalization rounding in IEEE floating-point operations using a flagged prefix adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(2), pp. 266-277, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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20 | Alireza Hodjat, David Hwang 0001, Ingrid Verbauwhede |
A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (1) ![In: International Symposium on Information Technology: Coding and Computing (ITCC 2005), Volume 1, 4-6 April 2005, Las Vegas, Nevada, USA, pp. 538-543, 2005, IEEE Computer Society, 0-7695-2315-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
security, Elliptic Curve Cryptography, side-channel attacks, Galois fields, hardware architecture |
20 | Maya B. Gokhale, Janette Frigo, Christine Ahrens, Justin L. Tripp, Ronald G. Minnich |
Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 95-104, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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20 | Jesús S. Aguilar-Ruiz, Jaume Bacardit, Federico Divina |
Experimental Evaluation of Discretization Schemes for Rule Induction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO (1) ![In: Genetic and Evolutionary Computation - GECCO 2004, Genetic and Evolutionary Computation Conference, Seattle, WA, USA, June 26-30, 2004, Proceedings, Part I, pp. 828-839, 2004, Springer, 3-540-22344-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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20 | Bart Adams, Philip Dutré |
Interactive boolean operations on surfel-bounded solids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Graph. ![In: ACM Trans. Graph. 22(3), pp. 651-656, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
point-based geometry, surfels, boolean operations, free-form modeling |
20 | G. N. Mangalam, Sanjiv Narayan, Paul van Besouw, LaNae J. Avra, Anmol Mathur, Sanjeev Saluja |
Graph Transformations for Improved Tree Height Reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 474-479, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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20 | Amir M. Ben-Amram, Zvi Galil |
Lower Bounds for Dynamic Data Structures on Algebraic RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 32(3), pp. 364-395, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Cell-probe lower bounds, Dynamic prefix sum, Union-find, Random access machine |
20 | Daniel J. Rosenkrantz, Lin Yu, S. S. Ravi |
Efficient Construction of Minimum Makespan Schedules for Tasks with a Fixed Number of Distinct Execution Times. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Algorithmica ![In: Algorithmica 30(1), pp. 83-100, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Cell-probe lower bounds, Dynamic prefix sum, Union-find, Random access machine |
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