Search results for "adiabatic"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
172	Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel	Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	adiabatic logic, adiabatic mode logic, cross coupled domino, dynamic power reduction, low-power design styles
157	Pramod Ramarao, Akhilesh Tyagi	An Adiabatic Framework for a Low Energy µ-Architecture & Compiler.	Interaction between Compilers and Computer Architectures	2003	DBLP DOI BibTeX RDF
150	Dusan Suvakovic, C. André T. Salama	Energy Efficient Adiabatic Multiplier-Accumulator Design.	J. VLSI Signal Process.	2003	DBLP DOI BibTeX RDF	low-power, multiplier, circuits, arithmetic, adiabatic
129	Junyoung Park, Sung Je Hong, Jong Kim 0001	Energy-saving design technique achieved by latched pass-transistor adiabatic logic.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
121	Jürgen Fischer, Philip Teichmann, Doris Schmitt-Landsiedel	Scaling trends in adiabatic logic.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	low power, energy recovery, adiabatic computing
107	Baohua Wang, Pinaki Mazumder	On optimality of adiabatic switching in MOS energy-recovery circuit.	ISLPED	2004	DBLP DOI BibTeX RDF	adiabatic circuit, power clock optimization, variational calculus
107	Baohua Wang, Pinaki Mazumder	On optimality of adiabatic switching in MOS energy-recovery circuit.	ISLPED	2004	DBLP DOI BibTeX RDF	adiabatic circuit, power clock optimization, variational calculus
102	Guoqiang Hang	Adiabatic CMOS gate and adiabatic circuit design for low-power applications.	ASP-DAC	2005	DBLP DOI BibTeX RDF
101	William C. Athas, Lars J. Svensson, Jefferey G. Koller, Nestoras Tzartzanis, E. Ying-Chin Chou	Low-power digital systems based on adiabatic-switching principles.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
93	Ben Reichardt	The quantum adiabatic optimization algorithm and local minima.	STOC	2004	DBLP DOI BibTeX RDF	Ising quantum chain, quantum adiabatic optimization
93	Aiyappan Natarajan, David Jasinski, Wayne P. Burleson, Russell Tessier	A hybrid adiabatic content addressable memory for ultra low-power applications.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	adiabatic switching, ultra-low power, energy recovery
86	Muhammad Arsalan, Maitham Shams	Asynchronous Adiabatic Logic.	ISCAS	2007	DBLP DOI BibTeX RDF
86	Jianping Hu, Hong Li, Yangbo Wu	Low-Power Register File Based on Adiabatic Logic Circuits.	PATMOS	2006	DBLP DOI BibTeX RDF
86	Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel	Power-Clock Gating in Adiabatic Logic Circuits.	PATMOS	2005	DBLP DOI BibTeX RDF
86	Antonio Blotti, Roberto Saletti	Ultralow-power adiabatic circuit semi-custom design.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
86	Dorit Aharonov, Wim van Dam, Julia Kempe, Zeph Landau, Seth Lloyd, Oded Regev 0001	Adiabatic Quantum Computation is Equivalent to Standard Quantum Computation.	FOCS	2004	DBLP DOI BibTeX RDF
86	Vineela Manne, Akhilesh Tyagi	An Adiabatic Charge Pump Based Charge Recycling Design Style.	PATMOS	2003	DBLP DOI BibTeX RDF
86	Antonio Blotti, Maurizio Castellucci, Roberto Saletti	Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library.	PATMOS	2002	DBLP DOI BibTeX RDF
72	V. S. Kanchana Bhaaskaran, S. Salivahanan, D. S. Emmanuel	Semi-Custom Design of Adiabatic Adder Circuits.	VLSI Design	2006	DBLP DOI BibTeX RDF
72	King-Keung Mok, Ka-Hung Tsang, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun	Adiabatic Smart Card.	APCCAS	2006	DBLP DOI BibTeX RDF
72	Wang Pengjun, Yu Junjun, Xu Jian	Design of Clocked Transmission Gate Adiabatic Logic Circuit Based on the 3ECEAC.	APCCAS	2006	DBLP DOI BibTeX RDF
72	Christoph Saas, Andreas Schlaffer, Josef A. Nossek	An Adiabatic Multiplier.	PATMOS	2000	DBLP DOI BibTeX RDF
65	Dorit Aharonov, Amnon Ta-Shma	Adiabatic quantum state generation and statistical zero knowledge.	STOC	2003	DBLP DOI BibTeX RDF	quantum adiabatic computation, quantum sampling, spectral gap, state generation, statistical zero knowledge, Markov chains, Hamiltonian
65	Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada	Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits.	DELTA	2002	DBLP DOI BibTeX RDF	adiabatic logic circuit, power supply circuit, CMOS, dynamic circuit, low power circuit
65	Nestoras Tzartzanis, William C. Athas	Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing.	ARVLSI	1999	DBLP DOI BibTeX RDF	low-power digital CMOS, adiabatic switching, clock-powered logic, energy recovery
65	Saed G. Younis, Thomas F. Knight Jr.	Non-dissipative rail drivers for adiabatic circuits.	ARVLSI	1995	DBLP DOI BibTeX RDF	driver circuits, distributed parameter networks, lumped parameter networks, passive networks, nondissipative rail drivers, adiabatic circuits, CMOS charge recovery logic, energy dissipation per operation, SCRL circuits, rail waveform generation, rail driver circuit, multiple harmonics, harmonic rail driver, passive reactive components, trimmed transmission line segments, CMOS logic circuits, CMOS circuits, harmonics
63	Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou	Charge-Recovery Computing on Silicon.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Energy-recovering circuits, resonant systems, energy efficient computing, voltage scaling, reversible logic, adiabatic computing
58	Ka-Ming Keung, Vineela Manne, Akhilesh Tyagi	A Novel Charge Recycling Design Scheme Based on Adiabatic Charge Pump.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
58	M. V. Panduranga Rao	Bounding Run-Times of Local Adiabatic Algorithms.	TAMC	2007	DBLP DOI BibTeX RDF
58	Evgeniya Khusnitdinova, A. C. Cem Say	Problems of Adiabatic Quantum Program Design.	ISCIS	2006	DBLP DOI BibTeX RDF
58	W. K. Yeung, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun	Clock recovery circuit with adiabatic technology (quasi-static CMOS logic).	ISCAS (2)	2003	DBLP DOI BibTeX RDF
58	Suhwan Kim, Marios C. Papaefthymiou	True single-phase adiabatic circuitry.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
58	Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current	Clocked CMOS adiabatic logic with integrated single-phase power-clock supply.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
58	Stephan Avery, Marwan A. Jabri	A three-port adiabatic register file suitable for embedded applications.	ISLPED	1998	DBLP DOI BibTeX RDF
57	K. Wayne Current, Vojin G. Oklobdzija, Dragan Maksimovic	Low-Energy Logic Circuit Techniques for Multiple-Valued Logic.	ISMVL	1996	DBLP DOI BibTeX RDF
49	Joohee Kim, Conrad H. Ziesler, Marios C. Papaefthymiou	Energy recovering static memory.	ISLPED	2002	DBLP DOI BibTeX RDF	adiabatic circuitry, charge recovery, cache memories, on-chip memories, low-power computing, low-energy design
44	Yasuhiro Takahashi, Youhei Fukuta, Toshikazu Sekine, Michio Yokoyama	2PADCL: Two Phase drive Adiabatic Dynamic CMOS Logic.	APCCAS	2006	DBLP DOI BibTeX RDF
44	G. Y. Liu, N. C. Wang, J. B. Kuo	Energy-efficient CMOS large-load driver circuit with the complementary adiabatic/bootstrap (CAB) technique for low-power TFT-LCD system applications.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
44	Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada	A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits.	DELTA	2004	DBLP DOI BibTeX RDF
44	Massimo Alioto, Gaetano Palumbo	Power estimation in adiabatic circuits: a simple and accurate model.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
44	Hamid Mahmoodi-Meimand, Ali Afzali-Kusha	Efficient power clock generation for adiabatic logic.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
44	Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou	Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier.	ARVLSI	2001	DBLP DOI BibTeX RDF
44	D. V. Averin	Adiabatic Controlled-NOT Gate for Quantum Computation.	QCQC	1998	DBLP DOI BibTeX RDF
43	Seokkee Kim, Soo-Ik Chae	Implementation of a simple 8-bit microprocessor with reversible energy recovery logic.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	clocked power generator (CPG), nMOS reversible energy recovery logic (nRERL), phase scheduling, reversibility breaking, microprocessor
43	Seokkee Kim, Jun-Ho Kwon, Soo-Ik Chae	An 8-b nRERL microprocessor for ultra-low-energy applications.	ASP-DAC	2001	DBLP DOI BibTeX RDF
36	Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou	A resonant clock generator for single-phase adiabatic systems.	ISLPED	2001	DBLP DOI BibTeX RDF	SCAL, SCAL-D, TSEL, adiabatic logic, dynamic circuitry, single phase, VLSI, CMOS, low energy, resonant, clock generator
35	Visvesh S. Sathe 0001, Juang-Ying Chueh, Joohee Kim, Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou	Fast, efficient, recovering, and irreversible.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	charge-recovery circuits, resonant systems, reversible logic, adiabatic computing
35	Catherine H. Gebotys, Y. Zhang	Security wrappers and power analysis for SoC technologies.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	security, performance, design, VLIW, adiabatic
31	Zhenning Cai, Di Fang, Jianfeng Lu 0001	Asymptotic analysis of diabatic surface hopping algorithm in the adiabatic and non-adiabatic limits.	CoRR	2022	DBLP DOI BibTeX RDF
31	Himadri Singh Raghav, V. A. Bartlett	Investigating the influence of adiabatic load on the 4-phase adiabatic system design.	Integr.	2020	DBLP DOI BibTeX RDF
31	Rene Celis-Cordova, Alexei O. Orlov, Gregory L. Snider, Tian Lu, Jason M. Kulick	Adiabatic Flip-Flop and SRAM Design for an Adiabatic Reversible Microprocessor.	ICRC	2020	DBLP DOI BibTeX RDF
31	Sachin Maheshwari, Vivian A. Bartlett, Izzet Kale	Adiabatic flip-flops and sequential circuit design using novel resettable adiabatic buffers.	ECCTD	2017	DBLP DOI BibTeX RDF
31	Rajinder Pal	Second Law Analysis of Adiabatic and Non-Adiabatic Pipeline Flows of Unstable and Surfactant-Stabilized Emulsions.	Entropy	2016	DBLP DOI BibTeX RDF
31	Mitsunaga Kinjo, Katsuhiko Shimabukuro	Speed-up of Neuromorphic Adiabatic Quantum Computation by Local Adiabatic Evolution.	ISMVL	2011	DBLP DOI BibTeX RDF
31	Câncio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine	Resistance against power analysis attacks on adiabatic dynamic and adiabatic differential logics for smart card.	ISPACS	2011	DBLP DOI BibTeX RDF
31	Shilpa Katre, Prachi Palsodkar, Minal Ghute	Adiabatic Amplifier and Power Analysis of Different Adiabatic Inverters.	SocProS (1)	2011	DBLP DOI BibTeX RDF
31	Jiaoyan Chen, Dilip P. Vasudevan, Emanuel M. Popovici, Michel P. Schellekens, Peter Gillen	Design and analysis of a novel 8T SRAM cell for adiabatic and non-adiabatic operations.	ICECS	2010	DBLP DOI BibTeX RDF
31	José C. García 0001, Juan A. Montiel-Nelson, Saeid Nooshabadi	A CMOS adiabatic inverter operating with a single clock power supply to reduce non-adiabatic loss.	APCCAS	2008	DBLP DOI BibTeX RDF
30	Shreevatsa Rajagopalan, Devavrat Shah, Jinwoo Shin	Network adiabatic theorem: an efficient randomized protocol for contention resolution.	SIGMETRICS/Performance	2009	DBLP DOI BibTeX RDF	wireless multi-access, markov chain, mixing time, aloha
30	Aiko Ono, Shigeo Sato, Mitsunaga Kinjo, Koji Nakajima	Study on the performance of neuromorphic adiabatic quantum computation algorithms.	IJCNN	2008	DBLP DOI BibTeX RDF
30	Pui-Tak So, Cheong-Fat Chan, Chiu-sing Choy, Kong-Pang Pun	Ramp voltage supply using adiabatic charging principle.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
30	Muhammad Arsalan, Maitham Shams	Charge-Recovery Power Clock Generators for Adiabatic Logic Circuits.	VLSI Design	2005	DBLP DOI BibTeX RDF
30	Ju Han Lee, Taichi Kogure, Young-Geun Han, Sang Hyuck Kim, Sang Bae Lee, David J. Richardson	40 GHz Adiabatic Soliton Generation from a Dual Frequency Beat Signal Using Dispersion Decreasing Fiber Based Raman Amplification.	OpNeTec	2004	DBLP DOI BibTeX RDF
30	Jürgen Fischer, Ettore Amirante, Agnese Bargagli-Stoffi, Philip Teichmann, Dominik Gruber, Doris Schmitt-Landsiedel	Power Supply Net for Adiabatic Circuits.	PATMOS	2004	DBLP DOI BibTeX RDF
30	Jürgen Fischer, Ettore Amirante, Francesco Randazzo, Giuseppe Iannaccone, Doris Schmitt-Landsiedel	Reduction of the Energy Consumption in Adiabatic Gates by Optimal Transistor Sizing.	PATMOS	2003	DBLP DOI BibTeX RDF
30	Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima	Quantum Adiabatic Evolution Algorithm for a Quantum Neural Network.	ICANN	2003	DBLP DOI BibTeX RDF
30	Jouko Marjonen, Markku Åberg	A Single Clocked Adiabatic Static Logic - A Proposal for Digital Low Power Applications.	J. VLSI Signal Process.	2001	DBLP DOI BibTeX RDF	sinisoidal power source, non-existing DC-path, load capacitance, LC-oscillator, charge recycling
28	Blaz Lampreht, Luka Stepancic, Igor Vizec, Bostjan Zankar, Miha Mraz, Iztok Lebar Bajec, Primoz Pecar	Quantum-Dot Cellular Automata Serial Comparator.	DSD	2008	DBLP DOI BibTeX RDF
28	Min Ni, Seda Ogrenci Memik	Self-heating-aware optimal wire sizing under Elmore delay model.	DATE	2007	DBLP DOI BibTeX RDF
28	Dragan Samardzija	Some Analogies Between Thermodynamics and Shannon Theory.	CISS	2007	DBLP DOI BibTeX RDF
28	Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima	Energy Dissipation Effect on a Quantum Neural Network.	ICONIP (2)	2007	DBLP DOI BibTeX RDF
28	Clemens Schlachta, Manfred Glesner	A CMOS Compatible Charge Recovery Logic Family for Low Supply Voltages.	PATMOS	2006	DBLP DOI BibTeX RDF
28	Seokkee Kim, Soo-Ik Chae	Complexity reduction in an nRERL microprocessor.	ISLPED	2005	DBLP DOI BibTeX RDF	buffer skipping, clocked power generator (CPG), nMOS reversible energy recovery logic (nRERL), reversibility breaking, microprocessor, complexity reduction
28	G. Josemin Bala, J. Raja Paul Perinbam	A Novel Low Power 16X16 Content Addressable Memory Using PA.	VLSI Design	2005	DBLP DOI BibTeX RDF
28	Christoph Saas, Josef A. Nossek	Resonant Multistage Charging of Dominant Capacitances.	PATMOS	2002	DBLP DOI BibTeX RDF
28	Jun-Ho Kwon, Joonho Lim, Soo-Ik Chae	A three-port nRERL register file for ultra-low-energy applications.	ISLPED	2000	DBLP DOI BibTeX RDF
21	Flavio Carbognani, Luca Henzen	Cross-over current suppressing latch compared to state-of-the-art for low-power low-frequency applications with resonant clocking.	ISLPED	2009	DBLP DOI BibTeX RDF	flipflops, low power design, clock, digital circuits, adiabatic
21	Ernst Hairer	Important Aspects of Geometric Numerical Integration.	J. Sci. Comput.	2005	DBLP DOI BibTeX RDF	Geometric numerical integration, reversible differential equations, backward error analysis, modulated Fourier expansion, adiabatic invariants, sine-Gordon equation, energy conservation, Hamiltonian systems
21	Visvesh S. Sathe 0001, Marios C. Papaefthymiou, Conrad H. Ziesler	A GHz-class charge recovery logic.	ISLPED	2005	DBLP DOI BibTeX RDF	resonant systems, energy recovery, adiabatic
21	Daniel B. Miller, Edward Fredkin	Two-state, reversible, universal cellular automata in three dimensions.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	billiard ball model, nanoscale computing, nanotech, cellular automata, reversible computation, reversible computing, reversible logic, massively parallel, adiabatic computing
21	Paul M. B. Vitányi	Time, space, and energy in reversible computing.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	energy dissipation complexity, low-energy computing, reversible simulation, computational complexity, time complexity, space complexity, reversible computing, tradeoffs, adiabatic computing
21	Joohee Kim, Marios C. Papaefthymiou	Constant-load energy recovery memory for efficient high-speed operation.	ISLPED	2004	DBLP DOI BibTeX RDF	adiabatic circuitry, charge recovery, cache memories, on-chip memories, low-power computing, low-energy design
21	David Cohen, Ernst Hairer, Christian Lubich	Modulated Fourier Expansions of Highly Oscillatory Differential Equations.	Found. Comput. Math.	2003	DBLP DOI BibTeX RDF	Modulated Fourier expansion, Adiabatic invariants, Highly oscillatory differential equations, Exponentially small error estimates, Multiple time scales
21	Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy 0001	Energy recovery clocking scheme and flip-flops for ultra low-energy applications.	ISLPED	2003	DBLP DOI BibTeX RDF	flip-flop, clock, clock tree, energy recovery, adiabatic
21	Conrad H. Ziesler, Joohee Kim, Visvesh S. Sathe 0001, Marios C. Papaefthymiou	A 225 MHz resonant clocked ASIC chip.	ISLPED	2003	DBLP DOI BibTeX RDF	adiabatic logic, resonant LC tank, single phase, VLSI, CMOS, flip-flop, low energy, clock generator
21	William C. Athas	Practical considerations of clock-powered logic.	ISLPED	2000	DBLP DOI BibTeX RDF	ER-CMOS, adiabatic charging, clock-powered logic, energy-recovery CMOS, supply-voltage scaling, microprocessors
21	Massoud Pedram	Power minimization in IC design: principles and applications.	ACM Trans. Design Autom. Electr. Syst.	1996	DBLP DOI BibTeX RDF	adiabatic circuits, dynamic power dissipation, low power layout, low power synthesis, lower-power design, power analysis and estimation, power minimization and management, silicon-on-insulator technology, switched capacitance, synthesis, system design, power management, layout, probabilistic analysis, symbolic simulation, CMOS circuits, switching activity, statistical sampling, computer-aided design of VLSI, gated clocks, energy-delay product
15	Yuya Ushioda, Mineo Kaneko	ILP Based Approaches for Optimizing Early Decompute in Two Level Adiabatic Logic Circuits.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2024	DBLP DOI BibTeX RDF
15	Prasanna Date, Dong Jun Woun, Kathleen E. Hamilton, Eduardo Antonio Coello Pérez, Mayanka Chandra Shekar, Francisco Rios, John Gounley, In-Saeng Suh, Travis S. Humble, Georgia D. Tourassi	Adiabatic Quantum Support Vector Machines.	CoRR	2024	DBLP DOI BibTeX RDF
15	Mingyou Wu	Efficiency of k-Local Quantum Search and its Adiabatic Variant on Random k-SAT.	CoRR	2024	DBLP DOI BibTeX RDF
15	Robert S. Aviles, Peter A. Beerel	A Novel Optimization Algorithm for Buffer and Splitter Minimization in Phase-Skipping Adiabatic Quantum-Flux-Parametron Circuits.	CoRR	2024	DBLP DOI BibTeX RDF
15	Marios Gourdouparis, Chengyao Shi, Yuming He, Stefano Stanzione, Robert Ukropec, Pieter Gijsenbergh, Veronique Rochus, Nick Van Helleputte, Wouter A. Serdijn, Yao-Hong Liu	6.2 An Ultrasound-Powering TX with a Global Charge-Redistribution Adiabatic Drive Achieving 69% Power Reduction and 53° Maximum Beam Steering Angle for Implantable Applications.	ISSCC	2024	DBLP DOI BibTeX RDF
15	Krithika Dhananjay, Emre Salman	SEAL-RF: Secure Adiabatic Logic for Wirelessly Powered IoT Devices.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
15	Sagar Ghorai, Daniel Hedlund, Martin Kapuscinski, Peter Svedlindh	A Setup for Direct Measurement of the Adiabatic Temperature Change in Magnetocaloric Materials.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF
15	Benedetto Militello, Anna Napoli	Adiabatic Manipulation of a System Interacting with a Spin Bath.	Symmetry	2023	DBLP DOI BibTeX RDF
15	Eric J. Carlson, Joshua R. Smith 0001	A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
15	A. Venkatesan, P. T. Vanathi, M. Elangovan	Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7 nm FINFET Technology for MIMO Applications.	J. Circuits Syst. Comput.	2023	DBLP DOI BibTeX RDF
15	A. Venkatesan, P. T. Vanathi, M. Elangovan	Erratum: Diode Connected Transistor-Based Low PDP Adiabatic Full Adder in 7nm FINFET Technology for MIMO Applications.	J. Circuits Syst. Comput.	2023	DBLP DOI BibTeX RDF
15	Zachary Kahleifeh, Himanshu Thapliyal, Syed M. Alam	Adiabatic/MTJ-Based Physically Unclonable Function for Consumer Electronics Security.	IEEE Trans. Consumer Electron.	2023	DBLP DOI BibTeX RDF
15	Jan-Nico Zaech, Martin Danelljan, Luc Van Gool	Probabilistic Sampling of Balanced K-Means using Adiabatic Quantum Computing.	CoRR	2023	DBLP DOI BibTeX RDF