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1983-1995 (16) 1996-1999 (25) 2000 (18) 2001 (28) 2002 (15) 2003 (24) 2004 (44) 2005 (49) 2006 (61) 2007 (70) 2008 (59) 2009 (41) 2010 (27) 2011 (28) 2012 (29) 2013 (28) 2014 (24) 2015 (42) 2016 (46) 2017 (30) 2018 (48) 2019 (49) 2020 (48) 2021 (55) 2022 (50) 2023 (66) 2024 (12)
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article(367) inproceedings(664) phdthesis(1)
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Found 1032 publication records. Showing 1032 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
146Juan A. Carrasco Failure Transition Distance-Based Importance Sampling Schemes for theSimulation of Repairable Fault-Tolerant Computer Systems. Search on Bibsonomy IEEE Trans. Reliab. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
109Marvin K. Nakayama A Characterization of the Simple Failure-Biasing Method for Simulations of Highly Reliable Markovian Systems. Search on Bibsonomy ACM Trans. Model. Comput. Simul. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF balanced failure biasing, highly reliable systems, simple failure biasing, importance sampling, likelihood ratios, gradient estimation
78Jun Yuan 0007, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz Modeling design constraints and biasing in simulation using BDDs. Search on Bibsonomy ICCAD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
78Alyssa Bonnoit, Lawrence T. Pileggi Reducing variability in chip-multiprocessors with adaptive body biasing. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF dynamic voltage/frequency scaling, body biasing
78Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma Leakage reduction, delay compensation using partition-based tunable body-biasing techniques. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF low-power design, process variations, leakage current, Body biasing
78Jun Yuan 0007, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz Automatic Vector Generation Using Constraints and Biasing. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF constraint, probability, partitioning, BDD, biasing, vector generation
73Jinseob Jeong, Seungwhun Paik, Youngsoo Shin Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
68Puneet Gupta 0001, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester Gate-length biasing for runtime-leakage control. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
68Andrew B. Kahng, Swamy Muddu, Puneet Sharma Impact of Gate-Length Biasing on Threshold-Voltage Selection. Search on Bibsonomy ISQED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
68Aleksandar Tasic, Wouter A. Serdijn, John R. Long Low-noise biasing of voltage-controlled oscillators by means of resonant inductive degeneration. Search on Bibsonomy ISCAS (1) The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
67Pradip Mandal, V. Visvanathan Design of high performance two stage CMOS cascode op-amps with stable biasing. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF two stage CMOS cascode op-amps, stable biasing, mirror biasing, output voltage, bias variations, low frequency common mode rejection ratios, power supply rejection ratios, systematic offset, circuit analysis computing, performance metrics, integrated circuit design, circuit simulations, operational amplifiers, CMOS analogue integrated circuits, slew rate, circuit stability
63Juan A. Carrasco Adapted Importance Sampling Schemes for the Simulation of Dependability Models of Fault-Tolerant Systems with Deferred Repair. Search on Bibsonomy Annual Simulation Symposium The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
57Sunwoo Kwon, Hoi Lee A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
57Claude R. Gauthier, Jayakumaran Sivagnaname, Richard B. Brown Dynamic Receiver Biasing For Inter-Chip Communication. Search on Bibsonomy ARVLSI The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
57Rino Micheloni, Matteo Zammattio, Giovanni Campardo, Osama Khouri, Guido Torelli Hierarchical Sector Biasing Organization for Flash Memories. Search on Bibsonomy MTDT The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
57Sumanth Amarchinta, Dhireesha Kudithipudi Performance enhancement of subthreshold circuits using substrate biasing and charge-boosting buffers. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF charge-boosters, subthreshold design, biasing
57Zhenhua Wang Adaptive analog biasing: a robustness-enhanced low-power technique for analog baseband design. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF robustness enhancement, sensitivity reduction, low-power, low-energy, analog integrated circuits, biasing
57Sergio Gagliolo, Giacomo Pruzzo, Daniele D. Caviglia Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasing. Search on Bibsonomy SBCCI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF resistor biasing, low power, wireless, CMOS, low voltage, voltage controlled oscillator (VCO), phase noise
52Tom W. Chen, Justin Gregg A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
52Saumil Shah, Puneet Gupta 0001, Andrew B. Kahng Standard cell library optimization for leakage reduction. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF gate-length biasing, library optimization, leakage reduction
47Reza Hashemian Use of local biasing in designing analog integrated circuits. Search on Bibsonomy EIT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
47Liviu Panait, Sean Luke, R. Paul Wiegand Biasing Coevolutionary Search for Optimal Multiagent Behaviors. Search on Bibsonomy IEEE Trans. Evol. Comput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
47Leonard A. MacEachern, Eyad Abou-Allam, L. Wang, Tajinder Manku Low voltage mixer biasing using monolithic integrated transformer dc-coupling. Search on Bibsonomy ISCAS (2) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
46Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dynamic voltage / frequency scaling, body biasing
46Vishal Khandelwal, Ankur Srivastava 0001 Active mode leakage reduction using fine-grained forward body biasing strategy. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF forward body biasing, leakage power optimization
42Liviu Panait, R. Paul Wiegand, Sean Luke A Sensitivity Analysis of a Cooperative Coevolutionary Algorithm Biased for Optimization. Search on Bibsonomy GECCO (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
41Amlan Ghosh, Rahul M. Rao, Richard B. Brown A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation. Search on Bibsonomy ISLPED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF fine-grain body-biasing, process variation compensation, slewrate
41Jabulani Nyathi, Brent Bero Logic circuits operating in subthreshold voltages. Search on Bibsonomy ISLPED The full citation details ... 2006 DBLP  DOI  BibTeX  RDF logic styles, medium-to-high speed, off current, ultra-low power, noise margins, subthreshold, body biasing
41Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy 0001 A forward body-biased low-leakage SRAM cache: device and architecture considerations. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF forward body-biasing, super high VT, SRAM, leakage power
36Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye Experimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF layout, body bias
36Radu Teodorescu, Jun Nakano, Abhishek Tiwari 0002, Josep Torrellas Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. Search on Bibsonomy MICRO The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Chun-Kit Au, Ho-fung Leung Biasing mutations in cooperative coevolution. Search on Bibsonomy IEEE Congress on Evolutionary Computation The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Alexander Fish, Tomer Rothschild, Avichay Hodes, Yonatan Shoshan, Orly Yadid-Pecht Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Dongkyu Park, Byunghoo Jung Low power LC-VCO design using direct cross-coupled cell biasing. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
36Keng Hoong Wee, Ji-Jon Sit, Rahul Sarpeshkar Biasing techniques for subthreshold MOS resistive grids. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Walid Elgharbawy, Pradeep Golconda, Ashok Kumar 0001, Magdy A. Bayoumi A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits. Search on Bibsonomy ISCAS (5) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
36Puneet Gupta 0001, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester Selective gate-length biasing for cost-effective runtime leakage control. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF power, layout, manufacturability, leakage, OPC, lithography
36Arturo Sarmiento-Reyes, Erhan Yildiz, Chris J. M. Verhoeven, Arie van Staveren A CAD-oriented method for optimal biasing of amplifiers. Search on Bibsonomy ISCAS (1) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
36Chris J. M. Verhoeven, Arie van Staveren Systematic Biasing of Negative Feedback Amplifiers. Search on Bibsonomy DATE The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
36Yan Zhang 0028, Mircea R. Stan Temperature-aware circuit design using adaptive body biasing. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF adaptive body biasing, temperature-aware design
31Bipul C. Paul, Kaushik Roy 0001 Impact of Body Bias on Delay Fault Testing of Sub-100 nm CMOS Circuits. Search on Bibsonomy J. Electron. Test. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF adaptive body bias design, statistical analysis, process variation, delay fault testing
31Bo Fu, Paul Ampadu Techniques for robust energy efficient subthreshold domino CMOS circuits. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
31Andrea Lodi 0002, Luca Ciccarelli, Roberto Giansante Combining low-leakage techniques for FPGA routing design. Search on Bibsonomy FPGA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF low leakage, FPGA, power
31Scott McCoy, Peter V. Marks, Christopher L. Carr, Victor Wacham A. Mbarika Electronic Versus Paper Surveys: Analysis of Potential Psychometric Biases. Search on Bibsonomy HICSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31Bipul Chandra Paul, Cassondra Neau, Kaushik Roy 0001 Impact of Body Bias on Delay Fault Testing of Nanoscale CMOS Circuits. Search on Bibsonomy ITC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31S. V. Gopalaiah, A. P. Shivaprasad, Sukanta K. Panigrahi Design of Low Voltage Low Power CMOS OP-AMPS with Rail-to-Rail Input/Output Swing. Search on Bibsonomy VLSI Design The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31Mahipal Dargupally, Lomash Chandra Acharya, Khoirom Johnson Singh, Neha Gupta, Arvind K. Sharma, Sudeb Dasgupta, Anand Bulusu An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime. Search on Bibsonomy APCCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
31Andrew Whetzel, Mircea R. Stan Gate Overdrive with Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI Circuits. Search on Bibsonomy ISVLSI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
31Yuan Cai, Marcus T. Schmitz, Bashir M. Al-Hashimi, Sudhakar M. Reddy Workload-ahead-driven online energy minimization techniques for battery-powered embedded systems with time-constraints. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF adaptive body biasing, embedded systems, Dynamic voltage scaling, battery
31Domenik Helms, Olaf Meyer, Marko Hoyer, Wolfgang Nebel Voltage- and ABB-island optimization in high level synthesis. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF adaptive body biasing, process variation, leakage, voltage islands
31Swaroop Ghosh, Saibal Mukhopadhyay, Keejong Kim, Kaushik Roy 0001 Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF adaptive source biasing, hold failures, low power SRAM
31Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF leakage power, self-adjusting, body-biasing
31Le Yan, Lin Zhong 0001, Niraj K. Jha User-perceived latency driven voltage scaling for interactive applications. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF adaptive body biasing, computer responsiveness, dynamic voltage scaling, power consumption
31Tsung-Chu Huang, Min-Cheng Huang, Kuen-Jong Lee Built-in current sensor designs based on the bulk-driven technique. Search on Bibsonomy Asian Test Symposium The full citation details ... 1997 DBLP  DOI  BibTeX  RDF bulk-driven current mirror, biasing schemes, low power dissipation, power supply voltage drop, circuit speed degradation, external power supply, 0.3 V, 0.3 ns, accuracy, flexibility, simplicity, built-in current sensor, area overhead, I/sub DDQ/ testing, electric current measurement
31A. B. Bhattacharyya, Ram Singh Rana, S. K. Guha, Rajendar Bahl, R. Anand, M. J. Zarabi, P. A. Govindacharyulu, U. Gupta, V. Mohan, Jatin Roy, Amul Atri A micropower analog hearing aid on low voltage CMOS digital process. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF differential amplifiers, automatic gain control, micropower analog hearing aid, low voltage CMOS digital process, adaptive biasing, MOS translinear loop circuit, degenerating linearising resistor, input differential stage, AGC block, conversion efficiency, 3 micron, 1.0 V, power consumption, CMOS analogue integrated circuits, hearing aids
31Guido Rovetta, Patrizia Monteforte, Gerolamo Bianchi, Stefano Rovetta, Rodolfo Zunino Validation of a Large Medical Database. Search on Bibsonomy CBMS The full citation details ... 1995 DBLP  DOI  BibTeX  RDF large medical database, database validation, clinical problems, experimental evidence, observed data validation, incorrect sampling, sample distribution, data-inherent regularities, unsupervised models, clinical records analysis, osteoporosis, data distribution uniformity, unbiased sampling, neural networks, data integrity, probability, unsupervised learning, neural nets, medical information systems, very large databases, biasing
26Xin He, Syed Al-Kadry, Afshin Abdollahi Adaptive leakage control on body biasing for reducing power consumption in CMOS VLSI circuit. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Matthew Zucker 0001, James Kuffner, James A. Bagnell Adaptive workspace biasing for sampling-based planners. Search on Bibsonomy ICRA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
26Zhenyu Qi, Mircea R. Stan NBTI resilient circuits using adaptive body biasing. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF reliability, body bias, nbti
26Justin Gregg, Tom W. Chen Post Silicon Power/Performance Optimization in the Presence of Process Variations Using Individual Well-Adaptive Body Biasing. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Shawna L. Thomas, Marco Morales 0001, Xinyu Tang, Nancy M. Amato Biasing Samplers to Improve Motion Planning Performance. Search on Bibsonomy ICRA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Kyung Ki Kim, Yong-Bin Kim Optimal Body Biasing for Minimum Leakage Power in Standby Mode. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Afshin Nourivand, Chunyan Wang 0004, M. Omair Ahmad An Adaptive Sleep Transistor Biasing Scheme for Low Leakage SRAM. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Byunghee Choi, Youngsoo Shin Lookup Table-Based Adaptive Body Biasing of Multiple Macros. Search on Bibsonomy ISQED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. Search on Bibsonomy VLSI Design The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
26Po-Kuan Huang, Soheil Ghiasi Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
26Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar Power-adaptive operational amplifier with positive-feedback self biasing. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
26Le Yan, Jiong Luo, Niraj K. Jha Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Giridhar Kumaran, Rosie Jones, Omid Madani Biasing web search results for topic familiarity. Search on Bibsonomy CIKM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF personalization, web search, familiarity
26Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba Device technology for body biasing scheme. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez Limits to performance spread tuning using adaptive voltage and body biasing. Search on Bibsonomy ISCAS (1) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Louie Pylarinos, Khoman Phang Low-voltage programmable gm-C filter for hearing aids using dynamic gate biasing. Search on Bibsonomy ISCAS (3) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
26Sean Nicolson, Khoman Phang Improvements in biasing and compensation of CMOS opamps. Search on Bibsonomy ISCAS (1) The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
26Le Yan, Jiong Luo, Niraj K. Jha Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
26Steven M. Martin, Krisztián Flautner, Trevor N. Mudge, David T. Blaauw Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads. Search on Bibsonomy ICCAD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
26Esteban Tlelo-Cuautle An efficient biasing technique suitable for any kind of the four basic amplifiers designed at or level. Search on Bibsonomy ISCAS (3) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
26Martin V. Butz Biasing Exploration in an Anticipatory Learning Classifier System. Search on Bibsonomy IWLCS The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
26Giuseppe Palmisano, Salvatore Pennisi Low-voltage continuous-time CMOS current amplifier with dynamic biasing. Search on Bibsonomy ISCAS (1) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
21Anuj Pushkarna, Hamid Mahmoodi Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF reliability, aging, SRAM, power gating
21Martin Pelikan, Kumara Sastry Initial-population bias in the univariate estimation of distribution algorithm. Search on Bibsonomy GECCO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF noisy onemax, onemax, population bias, time to convergence, scalability, estimation of distribution algorithms, population size, edas, univariate marginal distribution algorithm, umda
21Kwangok Jeong, Andrew B. Kahng, Hailong Yao Revisiting the linear programming framework for leakage power vs. performance optimization. Search on Bibsonomy ISQED The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
21Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David T. Blaauw A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
21Andrew B. Kahng, Sudhakar Muddu, Puneet Sharma Defocus-Aware Leakage Estimation and Control. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
21Josef Haid, Bernd Zimek, Thomas Leutgeb, Thomas Künemund Impact of Leakage Current on Data Retention of RF-powered Devices During Amplitude-Modulation-based Communication. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
21Vinay Agarwal, Sameer R. Sonkusale A PVT independent subthreshold constant-Gm stage for very low frequency applications. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
21Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin Substrate Noise Reduction Based On Noise Aware Cell Design. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
21Guochen Hua, Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Xue Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. Search on Bibsonomy EUC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
21Günther R. Raidl, Gabriele Koller, Bryant A. Julstrom Biased Mutation Operators for Subgraph-Selection Problems. Search on Bibsonomy IEEE Trans. Evol. Comput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
21Tianbin Wo, Peter Adam Hoeher, Ansgar Scherb, Karl-Dirk Kammeyer Performance Analysis of Maximum-Likelihood Semiblind Estimation of MIMO Channels. Search on Bibsonomy VTC Spring The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
21Dan Kamosny, Vit Novotyny, Miroslav Balík Bandwidth Redistribution Algorithm for Single Source Multicast. Search on Bibsonomy ICN/ICONS/MCL The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
21Xian Ping Fan, Pak Kwong Chan Improving Source-Follower Buffer for High-Speed ADC Testing. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
21Andrew B. Kahng, Swamy Muddu, Puneet Sharma Defocus-aware leakage estimation and control. Search on Bibsonomy ISLPED The full citation details ... 2005 DBLP  DOI  BibTeX  RDF ACLV, yield, leakage, lithography
21Philomena C. Brady, Paul E. Hasler Offset compensation in flash ADCs using floating-gate circuits. Search on Bibsonomy ISCAS (6) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
21Xiaohui Cui, C. Tim Hardin, Rammohan K. Ragade, Adel Said Elmaghraby A Swarm Approach for Emission Sources Localization. Search on Bibsonomy ICTAI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
21S. V. Gopalaiah, A. P. Shivaprasad Low Voltage CMOS op-amp with Rail-to-Rail Input/Output Swing. Search on Bibsonomy DELTA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
21Daniela De Venuto, Michael J. Ohletz On-Chip Test for Mixed-Signal ASICs using Two-Mode Comparators with Bias-Programmable Reference Voltages. Search on Bibsonomy J. Electron. Test. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF mixed-signal ASIC, hardware conversion, GO/NOGO test, bias programming, DfT, power consumption, overhead
21Tommy Kwong-Kin Tsang, Mourad N. El-Gamal A fully integrated 1 V 5.8 GHz bipolar LNA. Search on Bibsonomy ISCAS (4) The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
21Damon S. Love, Sudhakar Yalamanchili, José Duato, María Blanca Caminero, Francisco J. Quiles 0001 Switch Scheduling in the Multimedia Router (MMR). Search on Bibsonomy IPDPS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF Quality of Service (QoS), Multimedia traffic, Router architecture, Switch scheduling
21Yu-Chuan Shih, Chung-Yu Wu The design of high-performance 128×128 CMOS image sensors using new current-readout techniques. Search on Bibsonomy ISCAS (5) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
21Ashok K. Chandra, Vijay S. Iyengar, D. Jameson, R. V. Jawalekar, Indira Nair, Barry K. Rosen, Michael P. Mullen, J. Yoon, R. Armoni, Daniel Geist, Yaron Wolfsthal AVPGEN-A test generator for architecture verification. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
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