|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2188 occurrences of 1228 keywords
|
|
|
Results
Found 2600 publication records. Showing 2600 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
66 | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri |
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(9), pp. 1169-1181, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
66 | Mihaela Enachescu, Yashar Ganjali, Ashish Goel, Nick McKeown, Tim Roughgarden |
Part III: routers with very small buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Commun. Rev. ![In: Comput. Commun. Rev. 35(3), pp. 83-90, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
all-optical routers, congestion control, TCP, buffer size |
55 | Mitrajit Chatterjee, Savita Banerjee, Dhiraj K. Pradhan |
Buffer Assignment Algorithms on Data Driven ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(1), pp. 16-32, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
throughput, Application specific integrated circuits, buffers, data flow graph, wave-pipelining, data driven architecture |
53 | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri |
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANCS ![In: Proceedings of the 2007 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2007, Orlando, Florida, USA, December 3-4, 2007, pp. 47-56, 2007, ACM, 978-1-59593-945-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
network-on-chip, low-power design |
52 | James H. Anderson, Philip Holman |
Efficient pure-buffer algorithms for real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 7th International Workshop on Real-Time Computing and Applications Symposium (RTCSA 2000), 12-14 December 2000, Cheju Island, South Korea, pp. 57-64, 2000, IEEE Computer Society, 0-7695-0930-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
efficient pure-buffer algorithms, multiprocessor real-time systems, multi-writer read/write pure-buffers, overwritten data, client processes, handshaking mechanisms, concurrent read/write operations safety, quantum-scheduled systems, priority-scheduled systems, buffer word length, real-time systems, computational complexity, distributed algorithms, safety, multiprocessing systems, time complexity, processor scheduling, optimized algorithms, buffer storage, space complexity, wait-free algorithms, shared buffers, processor number |
50 | Lei Chen 0010, Zhiquan Zhang, Zhiping Wen 0001 |
A novel BIST approach for testing input/output buffers in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 285, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
i/o buffers, built-in self-test, fpga testing |
50 | Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino |
Dynamic thermal clock skew compensation using tunable delay buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 162-167, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
temperature aware design methodology, tunable delay buffers, clock skew, clock tree |
47 | Yelena Rykalova, Lev B. Levitin, Richard Brower |
Multiprocessor networks with small buffers: theory and simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SpringSim ![In: Proceedings of the 2009 Spring Simulation Multiconference, SpringSim 2009, San Diego, California, USA, March 22-27, 2009, 2009, SCS/ACM. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
critical phenomena in networks, network saturation, latency, queueing networks, supercomputers, network performance |
47 | Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang |
Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 10th International Symposium on Quality of Electronic Design (ISQED 2009), 16-18 March 2009, San Jose, CA, USA, pp. 826-832, 2009, IEEE Computer Society, 978-1-4244-2952-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
47 | Songqing Chen, Bo Shen 0003, Yong Yan 0003, Sujoy Basu, Xiaodong Zhang 0001 |
Fast proxy delivery of multiple streaming sessions in shared running buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Multim. ![In: IEEE Trans. Multim. 7(6), pp. 1157-1169, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
47 | Nikolai Joukov, Aditya Kashyap, Gopalan Sivathanu, Erez Zadok |
An electric fence for kernel buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
StorageSS ![In: Proceedings of the 2005 ACM Workshop On Storage Security And Survivability, StorageSS 2005, Fairfax, VA, USA, November 11, 2005, pp. 37-43, 2005, ACM, 1-59593-233-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
security, file systems, buffer overflow |
47 | Atsushi Matsumura, Sei Naito, Ryoichi Kawada, Atsushi Koike, Shuichi Matsumoto |
Effective interpolation for free viewpoint images using multi-layered dynamic background buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings of the 2004 International Conference on Image Processing, ICIP 2004, Singapore, October 24-27, 2004, pp. 1377-1380, 2004, IEEE, 0-7803-8554-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
47 | Guido Appenzeller, Isaac Keslassy, Nick McKeown |
Sizing router buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM SIGCOMM 2004 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, August 30 - September 3, 2004, Portland, Oregon, USA, pp. 281-292, 2004, ACM, 1-58113-862-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
TCP, buffer size, internet router, bandwidth delay product |
47 | Songqing Chen, Bo Shen 0003, Yong Yan 0003, Sujoy Basu, Xiaodong Zhang 0001 |
SRB: Shared Running Buffers in Proxy to Exploit Memory Locality of Multiple Streaming Media Sessions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 24th International Conference on Distributed Computing Systems (ICDCS 2004), 24-26 March 2004, Hachioji, Tokyo, Japan, pp. 787-794, 2004, IEEE Computer Society, 0-7695-2086-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
47 | Enric Gibert, F. Jesús Sánchez, Antonio González 0001 |
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003, pp. 315-325, 2003, IEEE Computer Society, 0-7695-2043-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
46 | Huamin Qu, Arie E. Kaufman |
O-Buffer: A Framework for Sample-Based Graphics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 10(4), pp. 410-421, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
44 | Iskander R. Gilmanov, Dmitry V. Samigullin, Frantisek Vyskocil, Eugeny E. Nikolsky, Ellya A. Bukharaeva |
Modeling of quantal neurotransmitter release kinetics in the presence of fixed and mobile calcium buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Neurosci. ![In: J. Comput. Neurosci. 25(2), pp. 296-307, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Neuromuscular junction, Time course of secretion, Calcium buffers, Mathematical modeling |
42 | Enric Gibert, F. Jesús Sánchez, Antonio González 0001 |
An interleaved cache clustered VLIW processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 210-219, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
attraction buffers, modulo scheduling, VLIW processors, distributed cache, clustered microarchitectures |
41 | Derek C. W. Pao, W. N. Chau |
Design of ATM switch using hypercube with distributed shared input buffers and dedicated output buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: 1995 International Conference on Network Protocols, ICNP 1995, November 7-10, 1995, Tokyo, Japan, pp. 92-99, 1995, IEEE Computer Society, 0-8186-7216-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
40 | Neda Beheshti, Yashar Ganjali, Ashish Goel, Nick McKeown |
Obtaining High Throughput in Networks with Tiny Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWQoS ![In: 16th International Workshop on Quality of Service, IWQoS 2008, University of Twente, Enskede, The Netherlands, 2-4 June 2008., pp. 65-69, 2008, IEEE, 978-1-4244-2084-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Arun Vishwanath, Vijay Sivaraman |
Routers With Very Small Buffers: Anomalous Loss Performance for Mixed Real-Time and TCP Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWQoS ![In: 16th International Workshop on Quality of Service, IWQoS 2008, University of Twente, Enskede, The Netherlands, 2-4 June 2008., pp. 80-89, 2008, IEEE, 978-1-4244-2084-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
39 | Vikram S. Adve, Mary K. Vernon |
Performance Analysis of Mesh Interconnection Networks with Deterministic Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(3), pp. 225-246, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
mesh interconnection networks, single-hit buffers, infinite buffers, nonadaptive deadlock-free routing scheme, closedqueueing network, message blocking, message pipelining, arbitrary source-destinationprobability distribution, 2D networks, shared-memory traffic, two dimensional network, performance evaluation, performance analysis, concurrency control, probability, multiprocessor interconnection networks, queueing theory, wormhole routing, network routing, virtual channels, deterministic routing, k-ary n-cube networks, deadlock-free routing algorithm, performance issues |
39 | Baosheng Wang, Yuejian Wu, André Ivanov |
Designs for Reducing Test Time of Distributed Small Embedded SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings, pp. 120-128, 2004, IEEE Computer Society, 0-7695-2241-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Distributed Small Embedded SRAMs, Data Retention Fault Test, Response Analysis, Test Time |
39 | Ilkka Saastamoinen, M. Alho, Jari Nurmi |
Buffer implementation for Proteo network-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 113-116, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
39 | Cheng-Shang Chang, Duan-Shin Lee, Ching-Ming Lien |
Load balanced Birkhoff-von Neumann switches with resequencing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 29(3), pp. 23-24, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
39 | K. K. Bagchi, Pradip K. Das, B. B. Bhaumik |
An approach to parallel architecture modelling (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the 15th ACM Annual Conference on Computer Science, St. Louis, Missouri, USA, February 16-19, 1987, pp. 462, 1987, ACM, 0-89791-218-7. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
37 | Binggang Wang, Yunqing Rao, Xinyu Shao, Mengchang Wang |
Sequencing Mixed-Model Assembly Lines with Limited Intermediate Buffers by a GA/SA-Based Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIC (3) ![In: Advanced Intelligent Computing Theories and Applications. With Aspects of Contemporary Intelligent Computing Techniques, 4th International Conference on Intelligent Computing, ICIC 2008, Shanghai, China, September 15-18, 2008, Proceedings, pp. 15-22, 2008, Springer, 978-3-540-85929-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Mixed-model assembly lines, Limited intermediate buffers, GA/SA-based algorithms, Genetic algorithms, Sequencing |
37 | Jorge García-Vidal, Maribel March, Llorenç Cerdà, Jesús Corbal, Mateo Valero |
A DRAM/SRAM Memory Scheme for Fast Packet Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(5), pp. 588-602, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
high-performance memory systems, Router architecture, storage schemes, packet buffers |
37 | Harlen Costa Batagelo, Ilaim Costa Júnior |
Real-Time Shadow Generation Using BSP Trees and Stencil Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIBGRAPI ![In: XII Brazilian Symposium on Computer Graphics and Image Processing (SIBGRAPI '99), October 17-20, 1999, Campinas, Brazil, pp. 93-, 1999, IEEE Computer Society, 0-7695-0481-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Stencil Buffers, Shadows, BSP Trees |
37 | Sanjoy K. Baruah, Steve Goddard, Kevin Jeffay |
Feasibility concerns in PGM graphs with bounded buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 3rd IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '97), 8-12 September 1997, Lake Como, Italy, pp. 130-, 1997, IEEE Computer Society, 0-8186-8126-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
feasibility concerns, processing graph method, embedded signal processing, co-NP-complete, optimal preemptive scheduling algorithm, system architects, real-time scheduling, data flow graphs, memory requirements, computational resources, feasibility test, dataflow model, bounded buffers |
37 | Aristotel Tentov, Aksenti L. Grnarov |
Performance Analysis of Packet Switching Interconnection Networks with Finite Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 22rd EUROMICRO Conference '96, Beyond 2000: Hardware and Software Design Strategies, September 2-5, 1996, Prague, Czech Republic, pp. 390-396, 1996, IEEE Computer Society, 0-8186-7487-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
buffered interconnection networksop of Form Bottom of Form, performance analysis, interconnection networks, packet switching, packet switching, finite buffers |
36 | Vijay Sivaraman, Hossam A. ElGindy, David Moreland, Diethelm Ostry |
Packet pacing in small buffer optical packet switched networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 17(4), pp. 1066-1079, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
small buffers, traffic burstiness, traffic pacing, optical packet switch |
36 | Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli |
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 130-135, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
systems-on-chip, networks-on-chip, buffers, area |
36 | Suleyman Sair, Timothy Sherwood, Brad Calder |
A Decoupled Predictor-Directed Stream Prefetching Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(3), pp. 260-276, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Data prefetching, address prediction, stream buffers |
36 | Sunil Kumar, R. Srikant 0001, P. R. Kumar 0001 |
Bounding blocking probabilities and throughput in queueing networks with buffer capacity constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Queueing Syst. Theory Appl. ![In: Queueing Syst. Theory Appl. 28(1-3), pp. 55-77, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
performance evaluation, communication networks, queueing networks, blocking, finite buffers |
34 | Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino |
Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(6), pp. 639-649, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Sundar Iyer, Ramana Rao Kompella, Nick McKeown |
Designing packet buffers for router linecards. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 16(3), pp. 705-717, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hit-rate, line-card, cache, memory hierarchy, router, switches, packet buffer |
34 | Massimo Alioto, Gaetano Palumbo |
Power-delay optimization in MCML tapered buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 141-144, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | João Pedro 0001, Paulo P. Monteiro, João Pires 0001 |
Efficient optical burst-switched networks using only fiber delay line buffers for contention resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BROADNETS ![In: Fourth International Conference on Broadband Communications, Networks and Systems, (BROADNETS 2007), 10-14 September 2007, Raleigh, North-Carolina, USA, pp. 2-11, 2007, IEEE, 978-1-4244-1432-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Tao Zhang 0043, Kejie Lu, Jason P. Jue |
Shared fiber delay line buffers in asynchronous optical packet switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Sel. Areas Commun. ![In: IEEE J. Sel. Areas Commun. 24(S-4), pp. 118-127, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Tong Chen 0001, Zehra Sura, Kathryn M. O'Brien, John K. O'Brien |
Optimizing the Use of Static Buffers for DMA on a CELL Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 19th International Workshop, LCPC 2006, New Orleans, LA, USA, November 2-4, 2006. Revised Papers, pp. 314-329, 2006, Springer, 978-3-540-72520-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Gerrit Färber, Anna M. Coves Moreno |
Performance Study of a Genetic Algorithm for Sequencing in Mixed Model Non-permutation Flowshops Using Constrained Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (3) ![In: Computational Science and Its Applications - ICCSA 2006, International Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part III, pp. 638-648, 2006, Springer, 3-540-34075-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Alex Garthwaite, David Dice, Derek White |
Supporting per-processor local-allocation buffers using lightweight user-level preemption notification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 1st International Conference on Virtual Execution Environments, VEE 2005, Chicago, IL, USA, June 11-12, 2005, pp. 24-34, 2005, ACM, 1-59593-047-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
restartable critical sections, locality, memory allocation |
34 | Payam Heydari, Ravindran Mohanavelu |
Design of ultrahigh-speed low-voltage CMOS CML buffers and latches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(10), pp. 1081-1093, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Ju-Whan Song, Ou-Bong Gwun, Seung-Wan Kim, Yong-Guk Kim |
A Boundary Surface Based Ray Casting Using 6-Depth Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIS ![In: Computational and Information Science, First International Symposium, CIS 2004, Shanghai, China, December 16-18, 2004, Proceedings, pp. 1134-1140, 2004, Springer, 3-540-24127-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Sharath Kodase, Shige Wang, Zonghua Gu 0001, Kang G. Shin |
Improving Scalability of Task Allocation and Scheduling in Large Distributed Real-Time Systems Using Shared Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real Time Technology and Applications Symposium ![In: Proceedings of the 9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), May 27-30, 2003, Toronto, Canada, pp. 181-188, 2003, IEEE Computer Society, 0-7695-1956-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Payam Heydari, Ravindran Mohanavelu |
Design of ultra high-speed CMOS CML buffers and latches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 208-211, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Payam Heydari |
Design issues in low-voltage high-speed current-mode logic buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 21-26, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
VLSI, noise, integrated circuit, high-speed, current-mode logic |
34 | Payam Heydari |
Design and Analysis of Low-Voltage Current-Mode Logic Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 293-298, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Alberto García-Martínez, Jesús Fernández-Conde, Ángel Viña |
Single Pair of Buffers: Reducing Memory Requirements in VBR Media Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDMS ![In: Interactive Distributed Multimedia Systems and Telecommunication Services, 5th International Workshop, IDMS '98, Oslo, Norway, September 8-11, 1998, Proceedings, pp. 312-323, 1998, Springer, 3-540-64955-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
34 | Brian S. Cherkauer, Eby G. Friedman |
A unified design methodology for CMOS tapered buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 3(1), pp. 99-111, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
33 | Thomas Moscibroda, Onur Mutlu |
A case for bufferless routing in on-chip networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 196-207, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
routing, multi-core, memory systems, on-chip networks |
33 | Faisal Ghias Mir, Jesper Larsson Träff |
Constructing MPI Input-output Datatypes for Efficient Transpacking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PVM/MPI ![In: Recent Advances in Parallel Virtual Machine and Message Passing Interface, 15th European PVM/MPI Users' Group Meeting, Dublin, Ireland, September 7-10, 2008. Proceedings, pp. 141-150, 2008, Springer, 978-3-540-87474-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
33 | Mark Shifrin, Isaac Keslassy |
Modeling TCP in Small-Buffer Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Networking ![In: NETWORKING 2008, Ad Hoc and Sensor Networks, Wireless Networks, Next Generation Internet , 7th International IFIP-TC6 Networking Conference, Singapore, May 5-9, 2008, Proceedings, pp. 667-678, 2008, Springer, 978-3-540-79548-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Small-Buffer Network, Backbone Routers, Network Model |
33 | Lotfi Mhamdi |
A Partially Buffered Crossbar packet switching architecture and its scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the 13th IEEE Symposium on Computers and Communications (ISCC 2008), July 6-9, Marrakech, Morocco, pp. 942-948, 2008, IEEE Computer Society, 978-1-4244-2702-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
33 | Robert Shorten, Douglas J. Leith |
On queue provisioning, network efficiency and the transmission control protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 15(4), pp. 866-877, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
TCP, TCP/IP, buffer sizing, AIMD |
33 | Zvi Rosberg, Andrew Zalesky, Moshe Zukerman |
Packet delay in optical circuit-switched networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 14(2), pp. 341-354, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
fixed point approximation, circuit switching, packet delay, WDM network |
33 | King Ho Tam, Lei He 0001 |
Power optimal dual-Vdd buffered tree considering buffer stations and blockages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 497-502, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low power, buffer insertion, detail routing |
33 | Iris Hui-Ru Jiang, Yao-Wen Chang, Jing-Yang Jou, Kai-Yuan Chao |
Simultaneous floor plan and buffer-block optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5), pp. 694-703, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Costas Busch |
Õ(Congestion + Dilation) Hot-Potato Routing on Leveled Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Comput. Syst. ![In: Theory Comput. Syst. 37(3), pp. 371-396, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
33 | Eugin Hyun, Kwang-Su Seong |
The Effective Buffer Architecture for Data Link Layer of PCI Express. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC (1) ![In: International Conference on Information Technology: Coding and Computing (ITCC'04), Volume 1, April 5-7, 2004, Las Vegas, Nevada, USA, pp. 809-, 2004, IEEE Computer Society, 0-7695-2108-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
PCI, Data Link Layer, Buffer management, Buffer, PCI Express |
33 | Li-Shiuan Peh, William J. Dally |
Flit-Reservation Flow Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 73-84, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
flit-reservation, interconnection networks, communication networks, flow control, multicomputers, virtual-channel, wormhole |
31 | Aamer Jaleel, Bruce L. Jacob |
In-Line Interrupt Handling and Lock-Up Free Translation Lookaside Buffers (TLBs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(5), pp. 559-574, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Reorder-buffer (ROB), exception handlers, in-line interrupt, lock-up free, translation lookaside buffers (TLBs), performance modeling, precise interrupts |
31 | Veronique Inghelbrecht, Bart Steyaert, Sabine Wittevrongel, Herwig Bruneel |
Burst loss and delay in optical buffers with offset-time management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Telecommun. Syst. ![In: Telecommun. Syst. 31(2-3), pp. 247-258, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Fiber delay lines, Offset time, Scheduling horizon, Quality of service, Optical buffers |
31 | Daniel M. Pressel |
Fundamental limitations on the use of prefetching and stream buffers for scientific applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2001 ACM Symposium on Applied Computing (SAC), March 11-14, 2001, Las Vegas, NV, USA, pp. 554-559, 2001, ACM, 1-58113-287-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
UML, C++, high performance computing, prefetching, supercomputer, stream buffers |
31 | Wladek Olesinski, Pawel Gburzynski |
Asynchronous Deflection with Transient Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCN ![In: Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1998), October 12-15, 1998, Lafayette, Louisiana, USA, pp. 338-345, 1998, IEEE Computer Society, 0-8186-9014-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
asynchronous deflection networks, simulation, buffers |
31 | Emmanouel A. Varvarigos, Vishal Sharma |
The ready-to-go virtual circuit protocol: a loss-free protocol for multigigabit networks using FIFO buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 5(5), pp. 705-718, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
FIFO buffers, flow control protocols, switch design |
31 | Friedhelm Meyer auf der Heide, Christian Scheideler |
Deterministic Routing with Bounded Buffers: Turning Offline into Online Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 37th Annual Symposium on Foundations of Computer Science, FOCS '96, Burlington, Vermont, USA, 14-16 October, 1996, pp. 370-379, 1996, IEEE Computer Society, 0-8186-7594-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
online protocols, deterministic protocol, arbitrary permutations, r-replicated s-ary Multibutterflies, multiprocessor interconnection networks, deterministic routing, arbitrary networks, bounded buffers |
31 | Andrei Z. Broder, Alan M. Frieze, Eli Upfal |
A General Approach to Dynamic Packet Routing with Bounded Buffers (extended abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 37th Annual Symposium on Foundations of Computer Science, FOCS '96, Burlington, Vermont, USA, 14-16 October, 1996, pp. 390-399, 1996, IEEE Computer Society, 0-8186-7594-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
general approach, dynamic packet routing, static routing, injection rate, stability, packet switching, routing algorithm, sufficient condition, butterfly, steady state analysis, worst case bounds, bounded buffers |
31 | Satoshi Nishimura, Tosiyasu L. Kunii |
VC-1: A Scalable Graphics Computer with Virtual Local Frame Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGGRAPH ![In: Proceedings of the 23rd Annual Conference on Computer Graphics and Interactive Techniques, SIGGRAPH 1996, New Orleans, LA, USA, August 4-9, 1996, pp. 365-372, 1996, ACM, 0-89791-746-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
frame buffers, parallel polygon rendering, scalable, demand paging |
31 | Jelio Todorov Yantchev, C. G. Huang, Mark B. Josephs, Ivailo M. Nedelchev |
Low-latency asynchronous FIFO buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: Second Working Conference on Asynchronous Design Methodologies, May 30-31, 1995, London, England, UK, pp. 24-31, 1995, IEEE Computer Society, 0-8186-7098-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
buffer circuits, low-latency asynchronous FIFO buffers, parallel asynchronous implementation, interface circuitry, inter-chip communication wires, acknowledge signal, high-throughput multiple-burst signalling scheme, packet switching, asynchronous circuits, pipeline processing, propagation delay |
31 | Andrew Choi, Manfred Ruschitzka |
Managing Locality Sets: The Model and Fixed-Size Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(2), pp. 190-204, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
fixed-size buffers, memory-management model, reference behavior, locality-set sequences, PSETMIN, SETMIN strategies, prepaging, multiattribute-index catalogs, concomitant performance gains, optimal locality-set management, relational databases, heuristics, storage management, MIN, relational database management systems, page faults |
31 | Raif O. Onvural, Harry G. Perros |
Approximate Throughput Analysis of Cyclic Queueing Networks with Finite Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 15(6), pp. 800-808, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
approximate throughput analysis, cyclic queueing networks, blocking mechanisms, central server model, performance evaluation, computer networks, queueing theory, customers, finite buffers, approximation method, validation tests |
29 | Daniel Lemire, Owen Kaser |
Hierarchical bin buffering: Online local moments for dynamic external memory arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Algorithms ![In: ACM Trans. Algorithms 4(1), pp. 14:1-14:31, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Very large arrays, hierarchical buffers, polynomial fitting, statistical queries |
29 | Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai |
Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(4), pp. 41, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Compilers for low energy, loop buffers, VLIW processors |
29 | Prashant Saxena |
The scaling of interconnect buffer needs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Eigth International Workshop on System-Level Interconnect Prediction (SLIP 2006), Munich, Germany, March 4-5, 2006, Proceedings, pp. 109-112, 2006, ACM, 1-59593-255-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
interconnect, scaling, buffers, repeaters |
29 | Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid |
Techniques for synthesizing binaries to an advanced register/memory structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 118-124, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
smart buffers, FPGA, embedded systems, synthesis, decompilation, binaries |
29 | Hamada Alshaer, Eric Horlait |
Expedited Forwarding End to End Delay Jitter in the Differentiated Services Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HSNMC ![In: High Speed Networks and Multimedia Communications, 7th IEEE International Conference, HSNMC 2004, Toulouse, France, June 30 - July 2, 2004, Proceedings, pp. 14-25, 2004, Springer, 3-540-22262-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Expedited forwarding, e2e jitter, Playout buffers, DiffServ |
29 | Jayaprakash Pisharath, Alok N. Choudhary |
An integrated approach to reducing power dissipation in memory hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002, pp. 88-97, 2002, ACM, 1-58113-575-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
RDRAM, dynamic cache, energy-saver buffers (ESB), power, integrated approach, energy-delay product |
29 | Byungho Kim, Boseob Kwon, Hyunsoo Yoon, Seungryul Maeng, Jung Wan Cho |
Performance Analysis of Multipath Multistage Interconnection Networks with Nonuniform Output Traffic Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), January 24-26, 1996, Portugal, pp. 196-203, 1996, IEEE Computer Society, 0-8186-7376-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
buffer circuits, multipath multistage interconnection networks, nonuniform output traffic distribution, delay-throughput performance, packet arrival rates, output module., performance evaluation, performance analysis, delays, probability, packet switching, multistage interconnection networks, telecommunication traffic, packet delay, losses, output buffers, packet loss probability |
29 | M. Balakrishnan |
Buffer constraints in a variable-rate packetized video system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP ![In: Proceedings 1995 International Conference on Image Processing, Washington, DC, USA, October 23-26, 1995, pp. 29-32, 1995, IEEE Computer Society, 0-8186-7310-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
variable rate codes, variable rate packetized video system, variable rate video encoding system, encoder buffer control mechanism, decoder buffers, logical buffer sizes, channel rate, algorithm, video coding, packet switching, decoding, buffer storage, telecommunication control, necessary conditions, buffer constraints |
29 | Valmir Carneiro Barbosa |
Strategies for the Prevention of Communication Deadlocks in Distributed Parallel Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(11), pp. 1311-1316, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
randomly generated systems, distributed parallel programs, unavailability, message buffers, message buffering space, buffer usage, NP-hard optimization problems, computational complexity, parallel programming, concurrency, heuristic, upper bounds, programming theory, communication channels, deadlock prevention, process execution, communication deadlocks |
28 | Khushboo Rani, Hemangee K. Kapoor |
Write-variation aware alternatives to replace SRAM buffers with non-volatile buffers in on-chip interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 13(6), pp. 481-492, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
28 | Parosh Aziz Abdulla, Mohamed Faouzi Atig, Ahmed Bouajjani, Tuan Phong Ngo |
Replacing Store Buffers by Load Buffers in TSO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VECoS ![In: Verification and Evaluation of Computer and Communication Systems - 12th International Conference, VECoS 2018, Grenoble, France, September 26-28, 2018, Proceedings, pp. 22-28, 2018, Springer, 978-3-030-00358-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Jim Rasmusson, Jacob Ström, Tomas Akenine-Möller |
Error-bounded lossy compression of floating-point color buffers using quadtree decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 26(1), pp. 17-30, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Color buffer compression, Real-time, Quadtree, High dynamic range, Lossy compression, Texture compression |
27 | Guan-Hong Jhou, Woei Lin |
A Frame-Based Architecture with Shared Buffers for Slotted Optical Packet Switching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: 11th IEEE International Conference on High Performance Computing and Communications, HPCC 2009, 25-27 June 2009, Seoul, Korea, pp. 322-328, 2009, IEEE, 978-0-7695-3738-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
27 | Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene |
Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 52(2), pp. 193-210, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
CMOS buffer, Low power design, Trade-offs |
27 | Tjerk Bijlsma, Marco Bekooij, Pierre G. Jansen, Gerard J. M. Smit |
Communication between nested loop programs via circular buffers in an embedded multiprocessor system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 11th International Workshop on Software and Compilers for Embedded Systems, Munich, Germany, March 13-14, 2008, pp. 33-42, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Willem de Bruijn, Herbert Bos |
Beltway Buffers: Avoiding the OS Traffic Jam. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INFOCOM ![In: INFOCOM 2008. 27th IEEE International Conference on Computer Communications, Joint Conference of the IEEE Computer and Communications Societies, 13-18 April 2008, Phoenix, AZ, USA, pp. 136-140, 2008, IEEE, 978-1-4244-2026-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Sami Kirolos, Yehia Massoud, Yehea I. Ismail |
Accurate analytical delay modeling of CMOS clock buffers considering power supply variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 3394-3397, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Fabrizio Marinelli 0001, Maria Elena Nenni, Antonio Sforza |
Capacitated lot sizing and scheduling with parallel machines and shared buffers: A case study in a packaging company. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 150(1), pp. 177-192, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Scheduling, Packaging, Lot sizing |
27 | Paul Bogdan, Radu Marculescu |
Quantum-Like Effects in Network-on-Chip Buffers Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 266-267, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Alexandre J. Aragão, João Navarro Jr., Wilhelmus A. M. Van Noije |
Mismatch effect analyses in CMOS tapered buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Soo-Tae Kwon |
On the Optimal Buffer Allocation of an FMS with Finite In-Process Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (3) ![In: Computational Science and Its Applications - ICCSA 2006, International Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part III, pp. 767-776, 2006, Springer, 3-540-34075-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Throughput, Queueing Network, Buffer, FMS |
27 | Yossi Azar, Nir Levy |
Multiplexing Packets with Arbitrary Deadlines in Bounded Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWAT ![In: Algorithm Theory - SWAT 2006, 10th ScandinavianWorkshop on Algorithm Theory, Riga, Latvia, July 6-8, 2006, Proceedings, pp. 5-16, 2006, Springer, 3-540-35753-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Guillermo Barrenetxea, Baltasar Beferull-Lozano, Martin Vetterli |
Efficient routing with small buffers in dense networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPSN ![In: Proceedings of the Fourth International Symposium on Information Processing in Sensor Networks, IPSN 2005, April 25-27, 2005, UCLA, Los Angeles, California, USA, pp. 277-284, 2005, IEEE, 0-7803-9202-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Enrico Baccaglini, Guillermo Barrenetxea, Baltasar Beferull-Lozano |
Performance of Multiple Description Coding in Sensor Networks with Finite Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICME ![In: Proceedings of the 2005 IEEE International Conference on Multimedia and Expo, ICME 2005, July 6-9, 2005, Amsterdam, The Netherlands, pp. 1460-1463, 2005, IEEE Computer Society, 0-7803-9331-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Soo-Tae Kwon |
On the Optimal Workloads Allocation of an FMS with Finite In-process Buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (4) ![In: Computational Science and Its Applications - ICCSA 2005, International Conference, Singapore, May 9-12, 2005, Proceedings, Part IV, pp. 624-631, 2005, Springer, 3-540-25863-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Throughput, Queueing Network, Workload, FMS |
27 | Chaeseok Im, Soonhoi Ha, Huiseok Kim |
Dynamic voltage scheduling with buffers in low-power multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 3(4), pp. 686-705, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Buffer requirement estimation, dynamic voltage scheduling, multimedia applications, low-power systems |
27 | Adam Smyk, Marek Tudruj |
RDMA Communication Based on Rotating Buffers for Efficient Parallel Fine-Grain Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers, pp. 50-58, 2003, Springer, 3-540-21946-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #100 of 2600 (100 per page; Change: ) Pages: [ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ >>] |
|