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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 61 occurrences of 43 keywords
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Results
Found 50 publication records. Showing 50 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
69 | Per Stenström |
Chip-multiprocessing and beyond. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 12th International Symposium on High-Performance Computer Architecture, HPCA-12 2006, Austin, Texas, USA, February 11-15, 2006, pp. 109, 2006, IEEE Computer Society, 0-7803-9368-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
69 | Luiz André Barroso, Kourosh Gharachorloo, Robert McNamara, Andreas Nowatzyk, Shaz Qadeer, Barton Sano, Scott Smith, Robert Stets, Ben Verghese |
Piranha: a scalable architecture based on single-chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 27th International Symposium on Computer Architecture (ISCA 2000), June 10-14, 2000, Vancouver, BC, Canada, pp. 282-293, 2000, IEEE Computer Society, 978-1-58113-232-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
64 | Michael Gschwind |
Chip multiprocessing and the cell broadband engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Third Conference on Computing Frontiers, 2006, Ischia, Italy, May 3-5, 2006, pp. 1-8, 2006, ACM, 1-59593-302-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compute-transfer parallelism (CTP), cell broadband engine, memory-level parallelism (MLP), chip multiprocessing, heterogeneous chip multiprocessor |
47 | Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu |
Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1158-1163, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Rakesh Kumar 0002, Norman P. Jouppi, Dean M. Tullsen |
Conjoined-Core Chip Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 4-8 December 2004, Portland, OR, USA, pp. 195-206, 2004, IEEE Computer Society, 0-7695-2126-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Gianfranco Bilardi, Andrea Pietracaprina, Geppino Pucci, Sebastiano Fabio Schifano, Raffaele Tripiccione |
The Potential of On-Chip Multiprocessing for QCD Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings, pp. 386-397, 2005, Springer, 3-540-30936-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | James Laudon, Lawrence Spracklen |
The Coming Wave of Multithreaded Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 35(3), pp. 299-330, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
performance, parallel programming, multithreading, Chip multiprocessing |
42 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry |
The STAMPede approach to thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 23(3), pp. 253-300, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache coherence, automatic parallelization, Thread-level speculation, chip-multiprocessing |
41 | Qingying Deng, Minxuan Zhang, Jiang Jiang |
A Parallel Infrastructure on Dynamic EPIC SMT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 7th International Conference, ICA3PP 2007, Hangzhou, China, June 11-14, 2007, Proceedings, pp. 165-176, 2007, Springer, 978-3-540-72904-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Annie P. Foong, Gary L. McAlpine, Dave B. Minturn, Greg J. Regnier, Vikram A. Saletore |
An Architecture for Software-Based iSCSI: Experiences and Analyses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NETWORKING ![In: NETWORKING 2005: Networking Technologies, Services, and Protocols; Performance of Computer and Communication Networks; Mobile and Wireless Communication Systems, 4th International IFIP-TC6 Networking Conference, Waterloo, Canada, May 2-6, 2005, Proceedings, pp. 65-77, 2005, Springer, 3-540-25809-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Asymmetric Multiprocessing, TCP optimization, iSCSI |
32 | Yuxing Tang, Kun Deng, Xingming Zhou |
The Design Space of CMP vs. SMT for High Performance Embedded Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 30-38, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Tomasz Madajczak, Henryk Krawczyk |
Integrating SHECS-Based Critical Sections with Hardware SMP Scheduler in TLP-CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 13-17 September 2006, Bialystok, Poland, pp. 62-67, 2006, IEEE Computer Society, 0-7695-2554-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | David K. Tam, Reza Azimi, Michael Stumm |
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroSys ![In: Proceedings of the 2007 EuroSys Conference, Lisbon, Portugal, March 21-23, 2007, pp. 47-58, 2007, ACM, 978-1-59593-636-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache behavior, detecting sharing, performance monitoring unit, single-chip multiprocessors, thread placement, resource allocation, CMP, multithreading, sharing, SMP, simultaneous multithreading, SMT, shared caches, cache locality, thread scheduling, thread migration, hardware performance monitors, hardware performance counters, affinity scheduling |
26 | Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv, Prashant R. Chandra |
Latency Hiding in Multi-Threading and Multi-Processing of Network Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 270-279, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Eberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos |
On ESL verification of memory consistency for system-on-chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, pp. 9-14, 2012, IEEE, 978-1-4577-2145-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
25 | Simone Campanoni, Timothy M. Jones 0001, Glenn H. Holloway, Vijay Janapa Reddi, Gu-Yeon Wei, David M. Brooks |
HELIX: automatic parallelization of irregular programs for chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2012, San Jose, CA, USA, March 31 - April 04, 2012, pp. 84-93, 2012, ACM, 978-1-4503-1206-6. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
25 | Wolfgang Puffitsch, Martin Schoeberl |
On the scalability of time-predictable chip-multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: The 10th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES '12, Copenhagen, Denmark, October 24-26, 2012, pp. 98-104, 2012, ACM, 978-1-4503-1688-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
25 | Eberle A. Rambo, Olav P. Henschel, Luiz C. V. dos Santos |
Automatic generation of memory consistency tests for chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011, pp. 542-545, 2011, IEEE, 978-1-4577-1845-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
25 | Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras |
Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 125-134, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
25 | Martin Schoeberl, Peter P. Puschner |
Is Chip-Multiprocessing the End of Real-Time Scheduling?. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCET ![In: 9th Intl. Workshop on Worst-Case Execution Time Analysis, WCET 2009, Dublin, Ireland, July 1-3, 2009, 2009, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP BibTeX RDF |
|
25 | Kazutoshi Kobayashi, Masao Aramoto, Hidetoshi Onodera |
A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 88-C(4), pp. 552-558, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Kazutoshi Kobayashi, Masao Aramoto, Yoichi Yuyama, Akihiko Higuchi, Hidetoshi Onodera |
A resource-shared VLIW processor architecture for area-efficient on-chip multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 619-622, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Per Stenström |
The Chip-Multiprocessing Paradigm Shift: Opportunities and Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings, pp. 5, 2005, Springer, 3-540-30317-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Bernard Goossens, Duc Thang Vu |
On-Chip Multiprocessing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. II ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume II, pp. 789-796, 1996, Springer, 3-540-61627-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
23 | Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie 0001, Narayanan Vijaykrishnan, Mahmut T. Kandemir |
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA, pp. 130-141, 2006, IEEE Computer Society, 0-7695-2608-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Guochun Shi, Volodymyr V. Kindratenko, Frederico Pratas, Pedro Trancoso, Michael Gschwind |
Application Acceleration with the Cell Broadband Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Eng. ![In: Comput. Sci. Eng. 12(1), pp. 76-81, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
PowerXCell 8i processor, chip architecture, data-intensive application architectures, compute-intensive processing, Cell Broadband Engine, chip multiprocessing |
22 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry |
Incrementally parallelizing database transactions with thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 26(1), pp. 2:1-2:50, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
incremental parallelization, Thread-level speculation, chip-multiprocessing, optimistic concurrency |
22 | Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry |
Compiler and hardware support for reducing the synchronization of speculative threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(1), pp. 3:1-3:33, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
automatic parallelization, instruction scheduling, Thread-level speculation, chip-multiprocessing |
22 | Guangyu Chen, Feihui Li, Seung Woo Son 0001, Mahmut T. Kandemir |
Application mapping for chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 620-625, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
NoC (Network on Chip), compilers, power optimization, chip multiprocessing, application mapping |
22 | Ozcan Ozturk 0001, Guilin Chen, Mahmut T. Kandemir |
Optimizing code parallelization through a constraint network based approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 863-688, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compiler, constraint network, chip multiprocessing |
22 | Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir |
Understanding the energy efficiency of SMT and CMP with multiclustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 48-53, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
energy efficiency, simultaneous multithreading, chip multiprocessing |
20 | Christof Pitter, Martin Schoeberl |
Performance evaluation of a java chip-multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: IEEE Third International Symposium on Industrial Embedded Systems, SIES 2008, Montpellier / La Grande Motte, France, June 11-13, 2008, pp. 34-42, 2008, IEEE, 978-1-4244-1994-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Lawrence Spracklen, Santosh G. Abraham |
Chip Multithreading: Opportunities and Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 248-252, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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20 | Björn Jäger, Jörg-Christian Niemann, Ulrich Rückert 0001 |
Analytical approach to massively parallel architectures for nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 268-275, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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20 | Mahmut T. Kandemir, Wei Zhang 0002, Mustafa Karaköy |
Runtime Code Parallelization for On-Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10510-10515, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Christof Pitter, Martin Schoeberl |
Towards a Java multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
JTRES ![In: Proceedings of the 5th International Workshop on Java Technologies for Real-time and Embedded Systems, JTRES 2007, Institute of Computer Engineering, Vienna University of Technology, 26-28 September 2007, Vienna, Austria, pp. 144-151, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Java, multiprocessor, shared memory |
18 | Xiaofang Wang, Sotirios G. Ziavras |
Performance-Energy Tradeoffs for Matrix Multiplication on FPGA-Based Mixed-Mode Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 386-391, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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18 | Björn Jäger, Mario Porrmann, Ulrich Rückert 0001 |
Bio-inspired massively parallel architectures for nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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18 | Yingmin Li, David M. Brooks, Zhigang Hu, Kevin Skadron |
Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 12-16 February 2005, San Francisco, CA, USA, pp. 71-82, 2005, IEEE Computer Society, 0-7695-2275-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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18 | Alexandra Fedorova, Christopher Small 0001, Daniel Nussbaum, Margo I. Seltzer |
Chip multithreading systems need a new operating system scheduler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGOPS European Workshop ![In: Proceedings of the 11st ACM SIGOPS European Workshop, Leuven, Belgium, September 19-22, 2004, pp. 9, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu |
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2001 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2001, Atlanta, Georgia, USA, November 16-17, 2001, pp. 211-220, 2001, ACM, 1-58113-399-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
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15 | Chen-Yong Cher, Michael Gschwind |
Cell GC: using the cell synergistic processor as a garbage collection coprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 4th International Conference on Virtual Execution Environments, VEE 2008, Seattle, WA, USA, March 5-7, 2008, pp. 141-150, 2008, ACM, 978-1-59593-796-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
BDW, SPU, explicitly managed memory hierarchies, local store, garbage collection, accelerator, SPE, coprocessor, cell, mark-sweep |
15 | Miquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero |
MLP-Aware Dynamic Cache Partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 418, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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15 | Christof Pitter, Martin Schoeberl |
Time Predictable CPU and DMA Shared Memory Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 317-322, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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15 | Dimitrios S. Nikolopoulos |
Facing the challenges of multicore processor technologies using autonomic system software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Luiz André Barroso |
The price of performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Queue ![In: ACM Queue 3(7), pp. 48-53, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen, Santosh G. Abraham |
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain, pp. 93-104, 2005, IEEE Computer Society, 0-7695-2440-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Scott Schneider 0001, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos |
Factory: An Object-Oriented Parallel Programming Substrate for Deep Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: High Performance Computing and Communications, First International Conference, HPCC 2005, Sorrento, Italy, September 21-23, 2005, Proceedings, pp. 223-232, 2005, Springer, 3-540-29031-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Multithreading substrate, Object-oriented parallel programming, Deep parallel architectures, Multiparadigm parallelism, Portability, Programmability |
15 | Annie P. Foong, Gary L. McAlpine, Dave B. Minturn, Greg J. Regnier, Vikram A. Saletore |
An Architecture for Software-Based iSCSI on Multiprocessor Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Ruchira Sasanka, Sarita V. Adve, Yen-Kuang Chen, Eric Debes |
The energy efficiency of CMP vs. SMT for multimedia workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 196-206, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multimedia, energy efficiency, CMP, SMT |
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