Search results for "cycle-true"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
47	Lovic Gauthier, Ahmed Amine Jerraya	Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	cycle-true, simulator, microcontroller
34	Shankar Mahadevan, Federico Angiolini, Jens Sparsø, Luca Benini, Jan Madsen	A Reactive and Cycle-True IP Emulator for MPSoC Exploration.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
34	Daniel Eckerbert, Per Larsson-Edefors	Cycle-true leakage current modeling for CMOS gates.	ISCAS (5)	2001	DBLP DOI BibTeX RDF
19	Luca Zulberti, Pietro Nannipieri, Luca Fanucci	A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design of System-on-Chip exploiting RISC-V Architecture.	DTIS	2021	DBLP DOI BibTeX RDF
19	Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie	Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models.	SCOPES	2003	DBLP DOI BibTeX RDF
19	Lovic Gauthier, Ahmed Amine Jerraya	Cycle-True Simulation of the ST10 Microcontroller.	DATE	2000	DBLP DOI BibTeX RDF
18	Mladen Berekovic, Tim Niggemeier	A Distributed, Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	clustering, distributed computing, DSP, MPEG-4, multi-threading, processor architecture, SMT
15	Shailesh Sutarwala, Pierre G. Paulin	Flexible modeling environment for embedded systems design.	CODES	1994	DBLP DOI BibTeX RDF
11	Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens	Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications.	ED&TC	1997	DBLP DOI BibTeX RDF
11	Patrick Schaumont, Bo-Cheng Charles Lai, Wei Qin, Ingrid Verbauwhede	Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design.	DAC	2005	DBLP DOI BibTeX RDF
7	Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit	Monotonicity and run-time scheduling.	EMSOFT	2009	DBLP DOI BibTeX RDF	simulation, real-time, dataflow, multi-processor
7	Raymond Frijns, Hamed Fatemi, Bart Mesman, Henk Corporaal	DC-SIMD : Dynamic communication for SIMD processors.	IPDPS	2008	DBLP DOI BibTeX RDF
7	Jason Cong, Karthik Gururaj, Guoling Han, Adam Kaplan, Mishali Naik, Glenn Reinman	MC-Sim: an efficient simulation tool for MPSoC designs.	ICCAD	2008	DBLP DOI BibTeX RDF
7	Patrick Schaumont, Doris Ching, Ingrid Verbauwhede	An interactive codesign environment for domain-specific coprocessors.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	hardware description language, hardware-software codesign, Cosimulation
7	Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede	Design with race-free hardware semantics.	DATE	2006	DBLP DOI BibTeX RDF
7	Milan Pastrnak, Peter H. N. de With, Jef L. van Meerbergen	Realization of QoS management using negotiation algorithms for multiprocessor NoC.	ISCAS	2006	DBLP DOI BibTeX RDF
7	Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede	Extended abstract: a race-free hardware modeling language.	MEMOCODE	2005	DBLP DOI BibTeX RDF
7	Shankar Mahadevan, Federico Angiolini, Michael Storgaard, Rasmus Grøndahl Olsen, Jens Sparsø, Jan Madsen	A Network Traffic Generator Model for Fast Network-on-Chip Simulation.	DATE	2005	DBLP DOI BibTeX RDF
7	Frédéric Pétrot, Pascal Gomez	Lightweight Implementation of the POSIX Threads API for an On-Chip MIPS Multiprocessor with VCI Interconnect.	DATE	2003	DBLP DOI BibTeX RDF
7	Abhijit K. Deb, Johnny Öberg, Axel Jantsch	Simulation and Analysis of Embedded DSP Systems Using Petri Nets.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
7	Volker Aue, Johannes Kneip, Matthias Weiss, Michael Bolle, Gerhard P. Fettweis	A Design Methodology for High Performance IC's: Wireless Broadband Radio Baseband Case Study.	DSD	2001	DBLP DOI BibTeX RDF