Search results for "designers"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
69	S. Joy Mountford	Designers: meet your users (panel).	CHI	1990	DBLP DOI BibTeX RDF	Apple Computer, HyperCard, Inc
63	Matthew Canton	The presence table: a reactive surface for ambient connection.	TEI	2011	DBLP DOI BibTeX RDF
55	Neff Walker, John B. Smelcer	A comparison of selection time from walking and pull-down menus.	CHI	1990	DBLP DOI BibTeX RDF
55	Terry Winograd	What can we teach about human-computer interaction? (plenary address).	CHI	1990	DBLP DOI BibTeX RDF
55	Hans Brunner	A snapshot of natural language interfaces (panel).	CHI	1990	DBLP DOI BibTeX RDF
55	Jakob Nielsen	Designing for international use (panel).	CHI	1990	DBLP DOI BibTeX RDF
55	Marcy Telles	Updating an older interface.	CHI	1990	DBLP DOI BibTeX RDF	WordStar
47	Han-Hong Lin, Teng-Wen Chang	A Camera-Based Multi-touch Interface Builder for Designers.	HCI (4)	2007	DBLP DOI BibTeX RDF	toolkit for designers, MToolkit, camera-based framework, processing, Multitouch
45	Juanjo Noguera, Luis Baldez, Narcis Simon, Lluis Abello	Software-friendly HW/SW co-simulation: an industrial case study.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
45	Pierluigi Daglio	A complete and fully qualified design flow for verification of mixed-signal SoC with embedded flash memories.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
45	Nico Bannow, Karsten Haug, Wolfgang Rosenstiel	Automatic systemC design configuration for a faster evaluation of different partitioning alternatives.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
43	Ilari Jounila	How to Make Tailored User Interface Guideline for Software Designers.	HCI (1)	2007	DBLP DOI BibTeX RDF	User interface guidelines, software designers
43	Solomon R. Antony, Dinesh Batra	CODASYS: a consulting tool for novice database designers.	Data Base	2002	DBLP DOI BibTeX RDF	novice designers, expert system, patterns, problem solving, database design, relational, human error, entity-relationship, Consulting system
42	Sun Young Park, Brad A. Myers, Amy J. Ko	Designers' natural descriptions of interactive behaviors.	VL/HCC	2008	DBLP DOI BibTeX RDF
41	Georges G. E. Gielen (eds.)	Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006	DATE Designers' Forum	2006	DBLP BibTeX RDF
41	Maurice Meijer, Rohini Krishnan, Martijn T. Bennebroek	Energy-efficient FPGA interconnect design.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Jan-Hendrik Oetjens, Joachim Gerlach, Wolfgang Rosenstiel	Flexible specification and application of rule-based transformations in an automotive design flow.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Giuseppe Campobello, Marco Castano, Carmine Ciofi, Daniele Mangano	GALS networks on chip: a new solution for asynchronous delay-insensitive links.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr	ASIP design and synthesis for non linear filtering in image processing.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Vassilis Papaefstathiou, Ioannis Papaefstathiou	A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Michael D. Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo	A methodology for FPGA to structured-ASIC synthesis and verification.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti 0001	Synthesis of system verilog assertions.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Javier Davila, Alfonso de Torres, Jose Manuel Sanchez, Marcos Sánchez-Élez, Nader Bagherzadeh, Fredy Rivera	Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys).	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Sergio Saponara, Pierangelo Terreni	Mixed-signal design of a digital input power amplifier for automotive audio applications.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Christopher K. Lennard, Victor Berman, Saverio Fazzari, Mark A. Indovina, Cary Ussery, Marino Strik, John Wilson, Olivier Florent, François Rémond, Pierre Bricaud	Industrially proving the SPIRIT consortium specifications for design chain integration.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Najwa Aaraj, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha	Architectures for efficient face authentication in embedded systems.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Franco Fummi, Davide Quaglia, Fabio Ricciato, Maura Turolla	Modeling and simulation of mobile gateways interacting with wireless sensor networks.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Nachiketh R. Potlapally, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha, Ruby B. Lee	Satisfiability-based framework for enabling side-channel attacks on cryptographic software.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Dmitry Akselrod, Asaf Ashkenazi, Yossi Amon	Platform independent debug port controller architecture with security protection for multi-processor system-on-chip ICs.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Frits Steenhof, Harry Duque, Björn Nilsson, Kees Goossens, Rafael Peset Llopis	Networks on chips for high-end consumer-electronics TV system architectures.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Götz Kappen, Tobias G. Noll	Application specific instruction processor based implementation of a GNSS receiver on an FPGA.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Giuseppe Bonfini, Monica Chiavacci, Riccardo Mariani, Egidio Pescari	A mixed-signal verification kit for verification of analogue-digital circuits.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Luciano Bononi, Nicola Concer	Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Ali Habibi, Haja Moinudeen, Sofiène Tahar	Generating finite state machines from SystemC.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Kuo-Hsing Cheng, Yu-Lung Lo	A fast-lock mixed-mode DLL with wide-range operation and multiphase outputs.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Nicolas Mäding, Jens Leenstra, Jürgen Pille, Rolf Sautter, Stefan Büttner, Sebastian Ehrenreich, W. Haller	The vector fixed point unit of the synergistic processor element of the cell architecture processor.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Chingwei Yeh, Chao-Ching Wang, Lin-Chi Lee, Jinn-Shyan Wang	A 124.8Msps, 15.6mW field-programmable variable-length codec for multimedia applications.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta 0001, Melvin A. Breuer	STAX: statistical crosstalk target set compaction.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF	compaction degree, fault-producing target, pruning power, safe target, statistical static timing analyzer, ATPG
41	Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, Luigi Sportiello	Software implementation of Tate pairing over GF(2m).	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Florin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya	Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Fabiano Costa Carvalho, Carlos Eduardo Pereira, Elias Teodoro Silva Jr., Edison Pignaton de Freitas	A practical implementation of the fault-tolerant daisy-chain clock synchronization algorithm on CAN.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Luca Serafini, F. Carrai, Tommaso Ramacciotti, V. Zolesi	Multi-sensor configurable platform for automotive applications.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	John Dielissen, Andries Hekstra, Vincent Berg	Low cost LDPC decoder for DVB-S2.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo	Design and test of fixed-point multimedia co-processor for mobile applications.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Michele Sama, Vincenzo Pacella, Elisabetta Farella, Luca Benini, Bruno Riccò	3dID: a low-power, low-cost hand motion capture device.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	G. Zarri, Federico Colucci, F. Dupuis, Riccardo Mariani, Mario Pasquariello, G. Risaliti, C. Tibaldi	On the verification of automotive protocols.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang	Optimization of regular expression pattern matching circuits on FPGA.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Federico Baronti, Paolo D'Abramo, Martin Knaipp, Rainer Minixhofer, Roberto Roncella, Roberto Saletti, Martin Schrems, Riccardo Serventi, Verena Vescoli	FlexRay transceiver in a 0.35 µm CMOS high-voltage technology.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Francisco-Javier Veredas, Michael Scheppler, Hans-Jörg Pfleiderer	Automated conversion from a LUT-based FPGA to a LUT-based MPGA with fast turnaround time.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Kai Richter 0001, Rolf Ernst	How OEMs and suppliers can face the network integration challenges.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Sutjipto Arifin, Peter Y. K. Cheung	A novel FPGA-based implementation of time adaptive clustering for logical story unit segmentation.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Andreas Raabe, Stefan Hochgürtel, Joachim K. Anlauf, Gabriel Zachmann	Space-efficient FPGA-accelerated collision detection for virtual prototyping.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Monu Kedia	Design and implementation of a modular and portable IEEE 754 compliant floating-point unit.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Federico Quaglio, Fabrizio Vacca, Cristiano Castellano, Alberto Tarable, Guido Masera	Interconnection framework for high-throughput, flexible LDPC decoders.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Daniele Lo Iacono, J. Zory, Ettore Messina, Nicolo Piazzese, G. Saia, A. Bettinelli	ASIP architecture for multi-standard wireless terminals.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante	A new approach to compress the configuration information of programmable devices.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
41	Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shyan Wang, Nai-Jen Chang	An 830mW, 586kbps 1024-bit RSA chip design.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
39	Kylie A. Peppler, Yasmin B. Kafai	Youth as media art designers: workshops for creative coding.	IDC	2008	DBLP DOI BibTeX RDF	children designers, programming, creativity, media arts, community technology
39	Gerhard Fischer, Andreas Girgensohn, Kumiyo Nakakoji, David F. Redmiles	Supporting Software Designers with Integrated Domain-Oriented Design Environments.	IEEE Trans. Software Eng.	1992	DBLP DOI BibTeX RDF	problem reformulation, human-computer cooperative problem-solving tools, knowledge-based design environments, CATALOGEXPLORER, EXPLAINER, user interfaces, expert systems, programming environments, software designers, location, comprehension, MODIFIER, modification, domain-oriented design environments
39	Albrecht Schmidt 0001	Engineering interactive ubiquitous computing systems.	EICS	2011	DBLP DOI BibTeX RDF
38	Mary Lou Maher, Mi Jeong Kim	Studying Designers using a Tabletop System for 3D Design with a Focus on the Impact on Spatial Cognition.	Tabletop	2006	DBLP DOI BibTeX RDF
38	Seok-Hyung Bae, Won-Sup Kim, Eun-Sook Kwon	Digital Styling for Designers: Sketch Emulation in Computer Environment.	ICCSA (3)	2003	DBLP DOI BibTeX RDF
35	Victor Berman	Conflicting International Standards Pressure Chip Designers.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	communications, standards, China, chip designers
35	Gilbert Vanburen Wilkes	XML and the new design regime: disputes between designers, application developers, authors, and readers in changing technological conditions and perceptions of social and professional need.	ACM J. Comput. Documentation	2002	DBLP DOI BibTeX RDF	XML, designers, data modelers
34	André Schüppen, Otto Spaniol, Dirk Thißen 0001, Ingo Assenmacher, Edmund Haberstroh, Torsten W. Kuhlen	MultEdmundedia and VR Support for Direct Communication of Designers.	Results of the IMPROVE Project	2008	DBLP DOI BibTeX RDF
34	Alexander Lang, Masood Masoodian	Graphic designers' quest for the right music.	CHINZ	2007	DBLP DOI BibTeX RDF	motion graphic design, music search, user study, interactive media
33	Mark D. Gross, Ellen Yi-Luen Do	Diagram query and image retrieval in design.	ICIP	1995	DBLP DOI BibTeX RDF	architectural CAD, diagram query, architectural education, visual references, key word retrieval schemes, texture retrieval schemes, color retrieval schemes, shape based retrieval, free hand drawing, Drawing Analogies, diagram keys, architecture, digital libraries, query processing, image retrieval, image recognition, educational technology, visual databases, image indexing, architectural designers, conceptual design, creative design, visual images
30	Jieun Kim, Carole Bouchard, Jean-François Omhover, Améziane Aoussat	TRENDS: a content-based information retrieval system for designers.	SIGGRAPH Posters	2010	DBLP DOI BibTeX RDF
30	Brad A. Myers, Sun Young Park, Yoko Nakano, Greg Mueller, Amy J. Ko	How designers design and program interactive behaviors.	VL/HCC	2008	DBLP DOI BibTeX RDF
30	Per Sökjer	Interaction designers' use of their repertoire in meetings with clients.	BCS HCI (2)	2007	DBLP DOI BibTeX RDF	repertoire, objects, procurement, clients
30	Joy Goodman, Susannah Clarke, Patrick Langdon, P. John Clarkson	Designers' Perceptions of Methods of Involving and Understanding Users.	HCI (5)	2007	DBLP DOI BibTeX RDF
30	Young Sang Choi, Ji Soo Yi, Chris M. Law, Julie A. Jacko	Are "universal design resources" designed for designers?	ASSETS	2006	DBLP DOI BibTeX RDF	assistive technology, universal design, heuristic evaluation, design resources
30	Umberto Giraudo, Monica Bordegoni	Using observations of real designers at work to inform the development of a novel haptic modeling system.	ICMI	2005	DBLP DOI BibTeX RDF	haptic interaction, virtual prototyping, haptic modeling
30	Brian H. Philips, Moin Rahman, Jari Järvinen	Building a human factors "knowledge shelf" as a collaborative information tool for designers.	CHI	2001	DBLP DOI BibTeX RDF	knowledge shelf, information sharing, collaborative work, engineering, industrial design, product development
30	Daniel Gajski, Reinaldo A. Bergamaschi	Panel Statement: System-Level Design: Designers' Wish List vs. Reality.	ISSS	1999	DBLP DOI BibTeX RDF
29	Henry Lieberman	The Visual Language of Experts in Graphic Design.	VL	1995	DBLP DOI BibTeX RDF	graphic design experts, visual problem solving experts, computer-based image-editing tools, inference techniques, design professionals, informal knowledge engineering study, design communication, beginning designer teaching, knowledge acquisition system, computer graphics, knowledge acquisition, visual languages, visual language, problem solving, inference mechanisms, student, graphic designers, computer aided instruction, intelligent assistance, novices, learning by example, books, design knowledge, graphical editors, artificial intelligence techniques, intelligent design assistants, learning techniques
29	Oscar Díaz, Norman W. Paton	Extending ODBMSs Using Metaclasses.	IEEE Softw.	1994	DBLP DOI BibTeX RDF	model level extension, data structures, constraints, database management systems, object-oriented databases, database designers, relationships, metaclasses, object oriented DBMS, Adam
28	Reem S. Al-Mansoori, Dena Al-Thani, Raian Ali, Alhasan Alsammarraie	Designing for User's Digital Wellbeing: Co-creating Nudges with Designers: Designing for user's digital wellbeingCo-creating nudges with designers.	GoodIT	2023	DBLP DOI BibTeX RDF
28	Farrah Dina Yusop, Ana-Paula Correia	The civic-minded instructional designers framework: An alternative approach to contemporary instructional designers' education in higher education.	Br. J. Educ. Technol.	2012	DBLP DOI BibTeX RDF
28	Sander Huiberts	Listen! - Improving the Cooperation between Game Designers and Audio Designers.	DiGRA Conference	2011	DBLP BibTeX RDF
28	Aline Chevalier, Nicolas Fouquereau, Jean Vanderdonckt	The influence of a knowledge-based system on designers' cognitive activities: a study involving professional web designers.	Behav. Inf. Technol.	2009	DBLP DOI BibTeX RDF
28	Anna Mieczakowski, Patrick Langdon, P. John Clarkson	Designers, users and a shared understanding of the product: a case study with product designers.	ECCE	2009	DBLP BibTeX RDF
28	Valentina Grigoreanu, Roland Fernandez, Kori Inkpen, George G. Robertson	What designers want: Needs of interactive application designers.	VL/HCC	2009	DBLP DOI BibTeX RDF
28	Mary Jane Irwin	Power-Aware Designers at Odds with Power Grid Designers?	IEEE Des. Test Comput.	2003	DBLP BibTeX RDF
28	Cary Staples, Jamison Abart, Tim Parker	Designers Designing a Web Site to Teach Designers to Design for the Web.	WebNet	1997	DBLP BibTeX RDF
28	Randy Pausch, Rich Gold, Tim Skelly, David Thiel	What HCI designers can learn from video game designers.	CHI Conference Companion	1994	DBLP DOI BibTeX RDF
28	Hector Ouilhet	Google Sky Map: using your phone as an interface.	Mobile HCI	2010	DBLP DOI BibTeX RDF
26	Fatih Kursat Ozenc, Miso Kim, John Zimmerman, Stephen Oney, Brad A. Myers	How to support designers in getting hold of the immaterial material of software.	CHI	2010	DBLP DOI BibTeX RDF	communication, tools, design process, interactive controls
26	Zhen Lu, Zuhua Jiang, Liu Chao, Liang Jun	Capturing Designers' Knowledge Demands in Collaborative Team.	CDVE	2007	DBLP DOI BibTeX RDF	Knowledge demand, Knowledge Management, Workflow, Collaborative design
26	Pedro Valderas, Vicente Pelechano, Oscar Pastor 0001	Introducing Graphic Designers in a Web Development Process.	CAiSE	2007	DBLP DOI BibTeX RDF
26	Masahiro Fujita, Tasuku Nishihara, Daisuke Ando	System LSI distributed collaborative design environment for both designers and CAD developers/engineers.	C5	2006	DBLP DOI BibTeX RDF
26	Amy Voida, Elizabeth D. Mynatt	Conveying user values between families and designers.	CHI Extended Abstracts	2005	DBLP DOI BibTeX RDF	design, values, probes, domestic technology
26	Caroline Francis	Designers Search Strategies Influenced by the Interaction with Information Retrieval Systems (IRS): Within the Early Stages of the Design Process.	APCHI	2004	DBLP DOI BibTeX RDF
26	Sara Ljungblad, Tobias Skog, Lalya Gaye	Are designers ready for ubiquitous computing?: a formative study.	CHI Extended Abstracts	2003	DBLP DOI BibTeX RDF	smart-its, design, ubiquitous computing
26	Christopher D. Ryan	The human-computer interface: challenges for educational multimedia and web designers.	ACM SIGCSE Bull.	2001	DBLP DOI BibTeX RDF
26	Tuomo Tuikka	User Actions as a Mediator for Concept Designers.	HICSS	2001	DBLP DOI BibTeX RDF	User Action, Activity Theory, Virtual Prototype, Concept Design
26	Giorgio De Michelis, Flavio De Paoli, Costanza Pluchinotta, Marco Susani	Weakly augmented reality: observing and designing the work-place of creative designers.	Designing Augmented Reality Environments	2000	DBLP DOI BibTeX RDF	spatial arrangements, augmented reality, knowledge management systems, creative design
25	Scott Davidson 0001, Helen Davidson	The Psychology of Electronic Test.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	DFT engineers, psychology of electronic test, psychological factors, designers, test engineers
25	Anne Gattiker	Guest Editor's Introduction: Getting More Out of Test.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	electronic test, designers, debugging, diagnosis, International Test Conference, ITC, test engineers
25	Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee	Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling.	ASP-DAC	2007	DBLP DOI BibTeX RDF	wire-length driven floorplan, noise-direct, power supply noise aware floorplanning, microarchitecture profiling, aggressive power saving techniques, power delivery network, power consumption reduction, self weighting, correlation weighting, force-directed floorplanning algorithm, power pin affinity, current consumption, di/dt control, supply-noise margin violations, clock-gating, microprocessor designers, power constraints, inductive noise, decoupling capacitances