Search results for "deskew"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
233	Shuo Wang, Lei Wang 0003	Analysis of Deskew Signaling Via Adaptive Timing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
158	Lei Wang 0003, Shuo Wang	Adaptive timing for analysis of skew tolerance.	ISCAS	2006	DBLP DOI BibTeX RDF
75	Dirk Woitha, Dietmar Janich	Error Tolerant Color Deskew.	Reading and Learning	2004	DBLP DOI BibTeX RDF
45	Lei Wang 0003	An energy-efficient skew compensation technique for high-speed skew-sensitive signaling.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
31	Eric S. Fetzer	Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	dual core, Itanium microprocessor, Montecito, adaptive circuits, cache safe technology, active clock deskew, process variation, power measurement
31	San-Lung Zhao, Hsi-Jian Lee	High-Precision Two-Kernel Chinese Character Recognition in General Document Processing Systems.	ICDAR	2001	DBLP DOI BibTeX RDF	deskew, candidate selection, Optical character recognition
31	Utpal Desai, Simon M. Tam, Robert Kim, Ji Zhang, Stefan Rusu	Itanium processor clock design.	ISPD	2000	DBLP DOI BibTeX RDF	Itanium processor, deskew, on-die-clock-shrink, clock distribution, IA-64
30	Fran Silavong, Sean J. Moran, Antonios Georgiadis, Rohan Saphal, Robert Otter	DeSkew-LSH based Code-to-Code Recommendation Engine.	CoRR	2021	DBLP BibTeX RDF
30	Marco Grossi, Martin Omaña 0001	Impact of Bias Temperature Instability (BTI) Aging Phenomenon on Clock Deskew Buffers.	J. Electron. Test.	2019	DBLP DOI BibTeX RDF
30	Ching-Che Chung, Chien-Ying Yu	An area-efficient and wide-range digital DLL for per-pin deskew applications.	Turkish J. Electr. Eng. Comput. Sci.	2017	DBLP DOI BibTeX RDF
30	Ching-Che Chung, Chi-Yu Hou	An all-digital delay-locked loop for 3-D ICs die-to-die clock deskew applications.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
30	Ting-Li Chu, Wen-Yu Chu, Yasuyoshi Fujii, Chorng-Sii Hwang	All-digital deskew buffer using a hybrid control scheme.	SoCC	2015	DBLP DOI BibTeX RDF
30	Ilya Kurilin, Ilia V. Safonov, Michael N. Rychagov, Hokeun Lee, Sang Ho Kim	High-performance automatic cropping and deskew of multiple objects on scanned images.	IQSP	2014	DBLP DOI BibTeX RDF
30	Jung-Hyun Park, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung	ADDLL for Clock-Deskew Buffer in High-Performance SoCs.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
30	You-Gang Chen, Hen-Wai Tsao, Chorng-Sii Hwang	A Fast-Locking All-Digital Deskew Buffer With Duty-Cycle Correction.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
30	Hyung-Joon Chi, Young-Ho Choi, Soo-Min Lee, Jae-Yoon Sim, Hong-June Park, Jong-Jin Lim, Pil-Sung Kang, Bu-Yeol Lee, Jin-Cheol Hong, Hee-Sub Lee	A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL.	IEEE Trans. Circuits Syst. II Express Briefs	2011	DBLP DOI BibTeX RDF
30	Yu Pu, Xin Zhang 0025, Katsuyuki Ikeuchi, Atsushi Muramatsu, Atsushi Kawasumi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai	Post-Silicon Clock Deskew Employing Hot-Carrier Injection Trimming With On-Chip Skew Monitoring and Auto-Stressing Scheme for Sub/Near Threshold Digital Circuits.	IEEE Trans. Circuits Syst. II Express Briefs	2011	DBLP DOI BibTeX RDF
30	Masum Hossain, Anthony Chan Carusone	CMOS Oscillators for Clock Distribution and Injection-Locked Deskew.	IEEE J. Solid State Circuits	2009	DBLP DOI BibTeX RDF
30	David C. Keezer, Dany Minier, Patrice Ducharme	Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications.	DATE	2008	DBLP DOI BibTeX RDF
30	Lin Zhang, Berkehan Ciftcioglu, Hui Wu	Active deskew in injection-locked clocking.	CICC	2008	DBLP DOI BibTeX RDF
30	Shao-Ku Kao, Shen-Iuan Liu	All-Digital Clock Deskew Buffer with Variable Duty Cycles.	IEICE Trans. Electron.	2006	DBLP DOI BibTeX RDF
30	Amer H. Atrash, Brian Butka	A technique to deskew differential PCB traces.	ISCAS (2)	2004	DBLP BibTeX RDF
30	Martin Omaña 0001, Daniele Rossi 0001, Cecilia Metra	Fast and Low-Cost Clock Deskew Buffer.	DFT	2004	DBLP DOI BibTeX RDF
30	Guang-Kaai Dehng, June-Ming Hsu, Ching-Yuan Yang, Shen-Iuan Liu	Clock-deskew buffer using a SAR-controlled delay-locked loop.	IEEE J. Solid State Circuits	2000	DBLP DOI BibTeX RDF
30	Shen-Iuan Liu, Jiunn-Hwa Lee, Hen-Wai Tsao	Low-power clock-deskew buffer for high-speed digital circuits.	IEEE J. Solid State Circuits	1999	DBLP DOI BibTeX RDF
30	Satoru Tanoi, Tetsuya Tanabe, Kazuhiko Takahashi, Sanpei Miyamoto, Masaru Uesugi	A 250-622 MHz deskew and jitter-suppressed clock buffer using two-loop architecture.	IEEE J. Solid State Circuits	1996	DBLP DOI BibTeX RDF
23	Lin Zhang, Aaron Carpenter, Berkehan Ciftcioglu, Alok Garg, Michael C. Huang 0001, Hui Wu	Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
23	Ashok Narasimhan, Ramalingam Sridhar	A low power and low area active clock deskewing technique for sub-90nm technologies.	SoCC	2008	DBLP DOI BibTeX RDF
23	Michael S. Brown, Charles J. Pisula	Conformal Deskewing of Non-Planar Documents.	CVPR (1)	2005	DBLP DOI BibTeX RDF
23	Jian Fan, Xiaofan Lin, Steven J. Simske	A Comprehensive Image Processing Suite for Book Re-mastering.	ICDAR	2005	DBLP DOI BibTeX RDF
23	David M. Harris, Sam Naffziger	Statistical clock skew modeling with data delay variations.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
23	David J. Fleet, David J. Heeger	Embedding Invisible Information in Color Images.	ICIP (1)	1997	DBLP DOI BibTeX RDF	embedding invisible information, human color vision model, embedded signal, sinusoidal signals, coordinate frame, watermarking, decoding, color images, image colour analysis, signal detection