Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
88 | Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, Nicolas Vaucher |
Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 386-391, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
layout synthesis, radix-2 dividers, pseudo-radix-4 dividers, redundant number notation, carry-propagation-free addition/subtraction, VLSI, logic CAD, circuit layout CAD, CMOS logic circuits, VLSI implementation, integrated circuit layout, redundant number systems, dividing circuits, digit-recurrence division |
64 | Ullas Singh, Michael Green |
Dynamics of high-frequency CMOS dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 421-424, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
64 | W. Lynn Gallagher, Earl E. Swartzlander Jr. |
Fault-Tolerant Newton-Raphson and Goldschmidt Dividers Using Time Shared TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(6), pp. 588-595, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
fault-tolerant arithmetic, Newton-Raphson division, Goldschmidt division, time shared TMR, Division |
59 | Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi |
A C-testable carry-free divider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 2(4), pp. 472-488, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
49 | Stephan Henzler, Siegmar Koeppe |
Design and Application of Power Optimized High-Speed CMOS Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(11), pp. 1513-1520, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
49 | Uroschanit Yodprasit, Christian C. Enz |
On an implementation of differential and quadrature Colpitts injection-locked frequency dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
49 | Zhipeng Ye, Tao Xu, Michael Peter Kennedy |
Locking range analysis for injection-locked frequency dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
49 | Tung N. Pham, Earl E. Swartzlander Jr. |
Design of Radix-4 SRT Dividers in 65 Nanometer CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 105-108, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
49 | Gustavo Sutter, Jean-Pierre Deschamps, Gery Bioul, Eduardo I. Boemo |
Power Aware Dividers in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings, pp. 574-584, 2004, Springer, 3-540-23095-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
49 | W. Lynn Gallagher, Earl E. Swartzlander Jr. |
Error-Correcting Goldschmidt Dividers Using Time Shared TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 2-4 November 1998, Austin, TX, USA, Proceedings, pp. 224-232, 1998, IEEE Computer Society, 0-8186-8832-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Goldschmidt's algorithm, time shared TMR, TSTMR fault tolerance, fault tolerant arithmetic, division |
49 | W. Lynn Gallagher, Earl E. Swartzlander Jr. |
Fast Error-Correcting Newton-Raphson Dividers Using Time Shared TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 20-22 October 1997, Paris, France, pp. 243-251, 1997, IEEE Computer Society, 0-8186-8168-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
46 | Jean-Paul Theis, Harald Schlimper |
Ultrafast compact CMOS dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 116-121, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
CMOS dividers, ultrafast, restoring division, floating-point division, 0.3 mum, parallelization, timing, layout, compact, dividing circuits, divider circuits |
46 | A. Houelle, Habib Mehrez, Nicolas Vaucher, Luis A. Montalvo, Alain Guyot |
Application of fast layout synthesis environment to dividers evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 12th Symposium on Computer Arithmetic (ARITH-12 '95), July 19-21, 1995, Bath, England, UK, pp. 67-74, 1995, IEEE Computer Society, 0-8186-7089-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
layout synthesis environment, dividers evaluation, GenOptim, IEEE 754 floating-point macro-cell generators, programming environments, generator programs, division, floating point arithmetic, square root, dividing circuits |
46 | Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao |
Berger Check Prediction for Array Multipliers and Array Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(7), pp. 892-896, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
Berger check prediction, array dividers, closed-form check-predicting equations, digital arithmetic, multiplying circuits, array multipliers, dividing circuits |
44 | Eric M. Schwarz, Michael J. Flynn |
Cost-efficient high-radix division. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 3(4), pp. 293-305, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
41 | B. Hamdi, Hakim Bederr, Michael Nicolaidis |
A tool for automatic generation of self-checking data paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 460-466, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
self-checking data paths, ALUs, shifters, double rail checkers, logic testing, built-in self test, microprocessors, adders, circuit CAD, multipliers, microcontrollers, register files, circuit design, CAD tools, automatic generation, automatic test software, dividers, circuit testing, parity checkers |
39 | Weiqiang Liu 0001, Tao Xu, Jing Li, Chenghua Wang, Paolo Montuschi, Fabrizio Lombardi |
Design of Unsigned Approximate Hybrid Dividers Based on Restoring Array and Logarithmic Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Emerg. Top. Comput. ![In: IEEE Trans. Emerg. Top. Comput. 10(1), pp. 339-350, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
34 | Haridimos T. Vergos |
An Efficient BIST Scheme for Non-Restoring Array Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 664-667, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija |
A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 724-732, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Amin Q. Safarian, Payam Heydari |
A study of high-frequency regenerative frequency dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2695-2698, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps |
Comparative Study of SRT-Dividers in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 209-220, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Ullas Singh, Michael Green |
New structures for very high-frequency CMOS clock dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 622-625, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
34 | Takafumi Aoki, Kimihiko Nakazawa, Tatsuo Higuchi 0001 |
High-Radix Parallel VLSI Dividers without Using Quotient Digit Selection Tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 30th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2000, Portland, Oregon, USA, May 23-25, 2000, Proceedings, pp. 345-354, 2000, IEEE Computer Society, 0-7695-0692-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Quotient digit selection tables, High-radix division, VLSI, Computer arithmetic, Signed-digit number systems, SRT division |
34 | G. Sidiropoulos, Haridimos T. Vergos, Dimitris Nikolos |
Easily Path Delay Fault Testable Non-Restoring Cellular Array Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 47-52, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | W. Lynn Gallagher, Earl E. Swartzlander Jr. |
Power Consumption in Fast Dividers Using Time Shared TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), November 1-3, 1999, Albuquerque, NM, USA, Proceedings, pp. 256-264, 1999, IEEE Computer Society, 0-7695-0325-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Goldschmidt, time shared TMR, fault tolerant arithmetic, fault tolerance, division, TMR, Newton-Raphson |
34 | Niraj K. Jha, Abha Ahuja |
Easily testable nonrestoring and restoring gate-level cellular array dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(1), pp. 114-123, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
29 | Ramen Dutta, T. K. Bhattacharyya |
A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 439-444, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Melina Apostolidou, Peter G. M. Baltus, Cicero S. Vaucher |
Phase noise in frequency divider circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2538-2541, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Stuart F. Oberman, Michael J. Flynn |
Minimizing the complexity of SRT tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(1), pp. 141-149, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
29 | David L. Harris, Stuart F. Oberman, Mark Horowitz |
SRT Division Architectures and Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 13th Symposium on Computer Arithmetic (ARITH-13 '97), 6-9 July 1997, Asilomar, CA, USA, pp. 18-25, 1997, IEEE Computer Society, 0-8186-7846-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
skew-tolerant, Computer arithmetic, floating point units, SRT division, domino circuits |
27 | Janak H. Patel, Leona Y. Fung |
Concurrent Error Detection in Multiply and Divide Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 32(4), pp. 417-422, 1983. The full citation details ...](Pics/full.jpeg) |
1983 |
DBLP DOI BibTeX RDF |
RESO, multipliers, concurrent error detection, dividers, Cellular logic |
19 | Tatsuji Yamada, Hidekazu Muramatsu, Norihiko Sakamoto, Katsuya Tachibana, Toshiaki Shioda |
A Flexible Evaluation System for the Complex Calibration of Inductive and Resistive Voltage Dividers up to 100 kHz. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 73, pp. 1-7, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Samin Hanifi, Steven M. Bowers |
Low-Additive Phase Noise Low-Power Static Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RWS ![In: IEEE Radio and Wireless Symposium, RWS 2024, San Antonio, TX, USA, January 21-24, 2024, pp. 5-7, 2024, IEEE, 979-8-3503-4045-7. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
19 | Hossein Razavi, Behzad Razavi |
A Study of Injection Locking in Oscillators and Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(8), pp. 2129-2140, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Asif I. Omi, Ahammad, Md Hedayatullah Maktoomi, Mohammad A. Maktoomi, Praveen Kumar Sekhar |
Miniaturized Wideband Three-Way Power Dividers With Arbitrary Band Ratio Using a New Analytical Design Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 72148-72158, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Farah Bilawal, Fatemeh Babaeian, Kim Tuyen Trinh, Nemai Chandra Karmakar |
The Art of Substrate-Integrated-Waveguide Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 9311-9325, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Hao Chen, Mingtong Liu, Aoqi Li, Erwin H. W. Chan |
Microwave Frequency Dividers With Reconfigurable Fractional 2/N and 3/N Division Ratios. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 29128-29137, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Yiming Zhang 0015, Xu Li, Shuai Zhang 0003, Shaoqiu Xiao |
Decoupling Network Integrated With CSRR-Based Filtering Power Dividers for Antenna Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(12), pp. 4334-4338, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Zhenghai Luo, Gang Zhang 0004, Huaiwei Wang, Na Li, Kam-Weng Tam, Liming Tang, Wanchun Tang, Jiquan Yang |
Dual-Band and Triple-Band Filtering Power Dividers Using Coupled Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(4), pp. 1440-1444, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar 0001 |
RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3), pp. 712-725, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Komathy Vanitha Krishnan, Anila Satish, Pradeev raj Krishnan |
Design of energy efficient approximate subtractors and restoring dividers for error tolerant applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 131, pp. 105668, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Xiaochen Tang, Shanshan Liu 0001, Farzad Niknia, Ziheng Wang, Siting Liu 0001, Pedro Reviriego, Fabrizio Lombardi |
Delta Sigma Modulator-Based Dividers for Accurate and Low Latency Stochastic Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1), pp. 270-284, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Hongyu Bao, Sang Lam |
Compact Design of 60-GHz Wilkinson Power Dividers in a 65-nm CMOS Process for Monolithic Microwave Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEIC ![In: International Conference on Electronics, Information, and Communication, ICEIC 2023, Singapore, February 5-8, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-2021-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Xiaowei Liu, Edoardo Bonizzoni, Franco Maloberti, Alper Akdikmen, Haibin Liu, Yao Liu 0013 |
Design of Phase-Interpolator Based Open-Loop Fractional Output Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023, Istanbul, Turkey, December 4-7, 2023, pp. 1-4, 2023, IEEE, 979-8-3503-2649-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Batuhan Sutbas, Mohamed Hussein Eissa, Gerhard Kahmen |
A Ka-Band VCO Chip with Integrated Dividers Using 1.5 V Supply in 130-nm SiGe BiCMOS Technology for Low-Power Radar Sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BCICTS ![In: IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, BCICTS 2023, Monterey, CA, USA, October 16-18, 2023, pp. 102-105, 2023, IEEE, 979-8-3503-0764-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Ceyhun Karpuz, Ali Kürsad Görür, Mehmet Çakir, Alperen Cengiz, Adnan Gorur |
Compact Wilkinson Power Dividers Based on Narrow Slits Loaded Transmission Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RWS ![In: IEEE Radio and Wireless Symposium, RWS 2023, Las Vegas, NV, USA, January 22-25, 2023, pp. 174-177, 2023, IEEE, 978-1-6654-9344-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Jiteshri Dasari, Maciej J. Ciesielski |
Formal Verification of Restoring Dividers made Fast and Simple. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-2348-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
19 | Qiyao Jiang, Quan Pan 0002 |
Analysis and Design of Tuning-Less mm-Wave Injection-Locked Frequency Dividers With Wide Locking Range Using 8th-Order Transformer-Based Resonator in 40 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 57(9), pp. 2812-2828, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Chi-Feng Chen, Hsin-Ya Tseng, Yi-Hua He, Wen-Jie Le |
Design of Bandpass Multiplexer-Integrated Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 65562-65571, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Wei Zhao, Yongle Wu, Yuhao Yang 0001, Weimin Wang 0008 |
Novel On-Chip Wideband Filtering Power Dividers With High Selectivity and Ultra-Wide Out-of-Band Suppression in LTCC Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 69(11), pp. 4288-4292, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Hui-Yang Li, Jin-Xu Xu, Xiu Yin Zhang |
Miniaturized Balanced Filtering Power Dividers With Arbitrary Power Division Ratio Using Multimode Dielectric Resonator in Single Cavity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 69(6), pp. 2707-2711, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Lazhar Fekih-Ahmed |
Analysis of Injection Locking in Ring-Based Divide-By-Two Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 31(11), pp. 2250195:1-2250195:25, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar 0001 |
RAPID: AppRoximAte Pipelined Soft Multipliers and Dividers for High-Throughput and Energy-Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2206.13970, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Biljana P. Stosic, Marin Nedelchev |
On Differences Between Transmission Line-based Wave Digital Models of Gysel Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BlackSeaCom ![In: 10th IEEE International Black Sea Conference on Communications and Networking, BlackSeaCom 2022, Sofia, Bulgaria, June 6-9, 2022, pp. 336-340, 2022, IEEE, 978-1-6654-9749-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Xicong Chen, Fumin Lin |
Research and Design of Dual-Band 1: 8 Wilkinson Power Dividers for 5G Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCT ![In: 22nd IEEE International Conference on Communication Technology, ICCT 2022, Nanjing, China, November 11-14, 2022, pp. 1406-1410, 2022, IEEE, 978-1-6654-7067-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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19 | Md. Sazzad Hossain, Mateus Bernardino Moreira, Francois Sandrez, Francois Rivet, Hervé Lapuyade, Yann Deval |
Low Power Frequency Dividers using TSPC logic in 28nm FDSOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 13th IEEE Latin America Symposium on Circuits and System, LASCAS 2022, Puerto Varas, Chile, March 1-4, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-2008-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Biljana P. Stosic, Marin Nedelchev |
Transmission Line-based Wave Digital Models of Inphase Gysel Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TSP ![In: 45th International Conference on Telecommunications and Signal Processing, TSP 2022, Prague, Czech Republic, July 13-15, 2022, pp. 23-26, 2022, IEEE, 978-1-6654-6948-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Oleksandr Drozd, Anatoliy Sachenko, Kostiantyn Zashcholkin, Yulian Sulima, Julia Drozd, Maciej Dobrowolski, Mykola Kuznietsov, Liliia Ivanova, Igor Kovalev |
Recovering From a Failure and Improving the Checkability of Iterative Array Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSIT ![In: 17th IEEE International Conference on Computer Sciences and Information Technologies, CSIT 2022, Lviv, Ukraine, November 10-12, 2022, pp. 523-526, 2022, IEEE, 979-8-3503-3431-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
19 | Gang Zhang 0004, Zhenyao Qian, Xinde Zhang, Jiquan Yang |
A General and Effective Design Method of Multi-Way Filtering Power Dividers on a New Multi-Port Topology for Industrial Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 68(6), pp. 5436-5447, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Udayan S. Patankar, Ants Koel |
Review of Basic Classes of Dividers Based on Division Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 23035-23069, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Shanshan Liu 0001, Xiaochen Tang, Farzad Niknia, Pedro Reviriego, Weiqiang Liu 0001, Ahmed Louri, Fabrizio Lombardi |
Stochastic Dividers for Low Latency Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(10), pp. 4102-4115, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti, Gaetano Palumbo |
Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(2), pp. 680-691, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Yan-Yuan Zhu, Jianpeng Wang, Jiasheng Hong, Jian-Xin Chen, Wen Wu 0005 |
Two- and Three-Way Filtering Power Dividers With Harmonic Suppression Using Triangle Patch Resonator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(12), pp. 5007-5017, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | He Zhu 0003, Y. Jay Guo |
Dual-Band and Tri-Band Balanced-to-Single Ended Power Dividers With Wideband Common-Mode Suppression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(7), pp. 2332-2336, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Batuhan Sutbas, Ekmel Özbay, Abdullah Atalar |
Accurate Isolation Networks in Quadrature Couplers and Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(4), pp. 1148-1152, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Christoph Scholl 0001, Alexander Konrad, Alireza Mahzoon, Daniel Große, Rolf Drechsler |
Verifying Dividers Using Symbolic Computer Algebra and Don't Care Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2021, Grenoble, France, February 1-5, 2021, pp. 1110-1115, 2021, IEEE, 978-3-9819263-5-4. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Udayan Sunil Patankar, Miguel E. Flores, Ants Koel |
Study of Estimation Based Functional Iteration Approximation Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2021, Las Vegas, NV, USA, January 10-12, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-9766-1. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
19 | Mingyu Zhu, Dixian Zhao |
Geometric Analysis and Systematic Design of Millimeter-Wave Low-Power Frequency Dividers in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 20658-20665, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Anna Piacibello, Marco Pirola, Giovanni Ghione |
Generalized Symmetrical 3 dB Power Dividers With Complex Termination Impedances. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 38239-38247, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Sheng-Lyang Jang, Ho-Chang Lee, Miin-Horng Juang |
2: 1 Injection-Locked Frequency Dividers Using Multi-Resonance Spiral-Inductor Resonator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 8, pp. 202240-202248, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Elizabeth Adams, Suganthi Venkatachalam, Seok-Bum Ko |
Approximate Restoring Dividers Using Inexact Cells and Estimation From Partial Remainders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 69(4), pp. 468-474, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma 0001 |
Bit significance based reconfigurable approximate restoring dividers and square rooters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 104, pp. 104861, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Sahar Saleh, Widad Ismail, Intan Sorfina Zainal Abidin, Mohd Haizal Jamaluddin, Mohammed H. Bataineh, Asem Alzoubi |
Simple UWB Linear Antenna Array Based On Compact Wilkinson And Bagley Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISTT ![In: 5th IEEE International Symposium on Telecommunication Technologies, ISTT 2020, Shah Alam, Malaysia, November 9-11, 2020, pp. 45-50, 2020, IEEE, 978-1-7281-8161-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran |
WEID: Worst-case Error Improvement in Approximate Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 25th Asia and South Pacific Design Automation Conference, ASP-DAC 2020, Beijing, China, January 13-16, 2020, pp. 593-598, 2020, IEEE, 978-1-7281-4123-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Patrícia Ücker, Miguel R. Weirich, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi |
Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 11th IEEE Latin American Symposium on Circuits & Systems, LASCAS 2020, San Jose, Costa Rica, February 25-28, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3427-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Xu Cheng 0002, Jue Wang, Jun Han 0003, Xiaoyang Zeng |
Design Methodology of Clock Polarity Inversion Technique for Frequency Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Chandan Kumar Jha 0001, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie |
FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Marcus Penttinen, Timo Holopainen, Lauri Raitala, Lassi Rosala, Jussi Kantola |
The Dividers for Continuum of Business in Business Transfer Situations and Impacts to Cash Flow Earnings: A Study from SME-Companies in Finland. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHFE (9) ![In: Advances in Human Factors, Business Management and Leadership - Proceedings of the AHFE 2020 Virtual Conferences on Human Factors, Business Management and Society, and Human Factors in Management and Leadership, July 16-20, 2020, USA, pp. 180-186, 2020, Springer, 978-3-030-50790-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
19 | Hee-Ran Ahn, Manos M. Tentzeris |
Ultra-Compact and Wideband V(U)HF 3-dB Power Dividers Consisting of Novel Asymmetric Impedance Transformers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 76367-76375, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Hee-Ran Ahn, Manos M. Tentzeris |
In-Phase T-Junction: Study and Application to Gysel Power Dividers for High Power-Division Ratios Requiring No High-Impedance Transmission-Line Section. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 18146-18154, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Yun-Peng Lyu, Lei Zhu 0009, Chong-Hu Cheng |
A New Design of Filtering Power Dividers With Arbitrary Constant Phase Difference, Impedance Transformation, and Good Isolation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 169495-169507, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Zhaomin Shi, Jiangtao Zhang, Xianlin Pan, Ying Song, Jun Lin 0003, Qing He |
Self-Calibration and Verification of Phase Angle Errors of Two Voltage Dividers at High Frequencies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 68(6), pp. 2053-2059, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Wei Yan, Wei Zhao 0030, Yi Li 0016 |
Effect of Step Response Measurement Arrangement on the Correction of Ultrahigh-Voltage Lightning Impulse Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Instrum. Meas. ![In: IEEE Trans. Instrum. Meas. 68(6), pp. 1666-1670, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Fei Xiao |
Lumped-element filtering power dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 47(1), pp. 133-151, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Anusha Gorantla, Deepa P |
Design of Approximate Subtractors and Dividers for Error Tolerant Image Processing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 35(6), pp. 901-907, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Roberto Gómez-García, José Maria Muñoz-Ferreras, Dimitra Psychogiou |
RF Reflectionless Filtering Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(6), pp. 933-937, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Wenjie Feng 0002, Xueke Ma, Roberto Gómez-García, Yongrong Shi, Wenquan Che, Quan Xue |
Multi-Functional Balanced-to-Unbalanced Filtering Power Dividers With Extended Upper Stopband. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(7), pp. 1154-1158, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Kyoungwoon Kim, Cam Nguyen |
A V-Band Power Amplifier With Integrated Wilkinson Power Dividers-Combiners and Transformers in 0.18- $\mu$ m SiGe BiCMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(2), pp. 337-341, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Soheil Hashemi, Sherief Reda |
Approximate Multipliers and Dividers Using Dynamic Bit Selection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Approximate Circuits ![In: Approximate Circuits, Methodologies and CAD., pp. 25-44, 2019, Springer, 978-3-319-99321-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski |
Formal Verification of Integer Dividers: Division by a Constant. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019, pp. 76-81, 2019, IEEE, 978-1-7281-3391-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski |
Functional Verification of Hardware Dividers using Algebraic Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 27th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cuzco, Peru, October 6-9, 2019, pp. 257-262, 2019, IEEE, 978-1-7281-3915-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Chandan Kumar Jha 0001, Joycee Mekie |
Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 22nd Euromicro Conference on Digital System Design, DSD 2019, Kallithea, Greece, August 28-30, 2019, pp. 174-181, 2019, IEEE, 978-1-7281-2862-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Mikko Hietanen, Janne Aikio, Alok Sethi, Rehman Akbar, Timo Rahkonen, Aarno Pärssinen |
Optimizing Inductorless Static CML Frequency Dividers up to 23GHz Output Using 45nm CMOS PD-SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip (SoC), Helsinki, Finland, October 29-30, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2769-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Suganthi Venkatachalam, Elizabeth Adams, Seok-Bum Ko |
Design of Approximate Restoring Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Hassaan Saadat, Haris Javaid, Sri Parameswaran |
Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 2019, pp. 161, 2019, ACM, 978-1-4503-6725-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
19 | Linbin Chen, Jie Han 0001, Weiqiang Liu 0001, Paolo Montuschi, Fabrizio Lombardi |
Design, Evaluation and Application of Approximate High-Radix Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Multi Scale Comput. Syst. ![In: IEEE Trans. Multi Scale Comput. Syst. 4(3), pp. 299-312, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Jingzhi Zhang, Yixuan Cheng, Chenxi Zhao, Yunqiu Wu, Kai Kang |
Analysis and Design of Ultra-Wideband mm-Wave Injection-Locked Frequency Dividers Using Transformer-Based High-Order Resonators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 53(8), pp. 2177-2189, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Ahmed Elkholy, Saurabh Saxena, Guanghua Shu, Amr Elshazly, Pavan Kumar Hanumolu |
Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 53(6), pp. 1806-1817, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Armin Mohammadjany, Ali Reza Hazeri, Hossein Miar Naimi |
Exact analyses for locking range in injection-locked frequency dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 63, pp. 93-100, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
19 | Tiku Yu |
Design of Length-Saving Multiway Wilkinson Power Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 6, pp. 14093-14105, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|