Search results for "dividers"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
88	Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, Nicolas Vaucher	Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers.	VLSI Design	1995	DBLP DOI BibTeX RDF	layout synthesis, radix-2 dividers, pseudo-radix-4 dividers, redundant number notation, carry-propagation-free addition/subtraction, VLSI, logic CAD, circuit layout CAD, CMOS logic circuits, VLSI implementation, integrated circuit layout, redundant number systems, dividing circuits, digit-recurrence division
64	Ullas Singh, Michael Green	Dynamics of high-frequency CMOS dividers.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
64	W. Lynn Gallagher, Earl E. Swartzlander Jr.	Fault-Tolerant Newton-Raphson and Goldschmidt Dividers Using Time Shared TMR.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	fault-tolerant arithmetic, Newton-Raphson division, Goldschmidt division, time shared TMR, Division
59	Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi	A C-testable carry-free divider.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
49	Stephan Henzler, Siegmar Koeppe	Design and Application of Power Optimized High-Speed CMOS Frequency Dividers.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
49	Uroschanit Yodprasit, Christian C. Enz	On an implementation of differential and quadrature Colpitts injection-locked frequency dividers.	ISCAS	2006	DBLP DOI BibTeX RDF
49	Zhipeng Ye, Tao Xu, Michael Peter Kennedy	Locking range analysis for injection-locked frequency dividers.	ISCAS	2006	DBLP DOI BibTeX RDF
49	Tung N. Pham, Earl E. Swartzlander Jr.	Design of Radix-4 SRT Dividers in 65 Nanometer CMOS Technology.	ASAP	2006	DBLP DOI BibTeX RDF
49	Gustavo Sutter, Jean-Pierre Deschamps, Gery Bioul, Eduardo I. Boemo	Power Aware Dividers in FPGA.	PATMOS	2004	DBLP DOI BibTeX RDF
49	W. Lynn Gallagher, Earl E. Swartzlander Jr.	Error-Correcting Goldschmidt Dividers Using Time Shared TMR.	DFT	1998	DBLP DOI BibTeX RDF	Goldschmidt's algorithm, time shared TMR, TSTMR fault tolerance, fault tolerant arithmetic, division
49	W. Lynn Gallagher, Earl E. Swartzlander Jr.	Fast Error-Correcting Newton-Raphson Dividers Using Time Shared TMR.	DFT	1997	DBLP DOI BibTeX RDF
46	Jean-Paul Theis, Harald Schlimper	Ultrafast compact CMOS dividers.	ICPADS	1997	DBLP DOI BibTeX RDF	CMOS dividers, ultrafast, restoring division, floating-point division, 0.3 mum, parallelization, timing, layout, compact, dividing circuits, divider circuits
46	A. Houelle, Habib Mehrez, Nicolas Vaucher, Luis A. Montalvo, Alain Guyot	Application of fast layout synthesis environment to dividers evaluation.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	layout synthesis environment, dividers evaluation, GenOptim, IEEE 754 floating-point macro-cell generators, programming environments, generator programs, division, floating point arithmetic, square root, dividing circuits
46	Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao	Berger Check Prediction for Array Multipliers and Array Dividers.	IEEE Trans. Computers	1993	DBLP DOI BibTeX RDF	Berger check prediction, array dividers, closed-form check-predicting equations, digital arithmetic, multiplying circuits, array multipliers, dividing circuits
44	Eric M. Schwarz, Michael J. Flynn	Cost-efficient high-radix division.	J. VLSI Signal Process.	1991	DBLP DOI BibTeX RDF
41	B. Hamdi, Hakim Bederr, Michael Nicolaidis	A tool for automatic generation of self-checking data paths.	VTS	1995	DBLP DOI BibTeX RDF	self-checking data paths, ALUs, shifters, double rail checkers, logic testing, built-in self test, microprocessors, adders, circuit CAD, multipliers, microcontrollers, register files, circuit design, CAD tools, automatic generation, automatic test software, dividers, circuit testing, parity checkers
39	Weiqiang Liu 0001, Tao Xu, Jing Li, Chenghua Wang, Paolo Montuschi, Fabrizio Lombardi	Design of Unsigned Approximate Hybrid Dividers Based on Restoring Array and Logarithmic Dividers.	IEEE Trans. Emerg. Top. Comput.	2022	DBLP DOI BibTeX RDF
34	Haridimos T. Vergos	An Efficient BIST Scheme for Non-Restoring Array Dividers.	DSD	2007	DBLP DOI BibTeX RDF
34	Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija	A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers.	PATMOS	2005	DBLP DOI BibTeX RDF
34	Amin Q. Safarian, Payam Heydari	A study of high-frequency regenerative frequency dividers.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
34	Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps	Comparative Study of SRT-Dividers in FPGA.	FPL	2004	DBLP DOI BibTeX RDF
34	Ullas Singh, Michael Green	New structures for very high-frequency CMOS clock dividers.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
34	Takafumi Aoki, Kimihiko Nakazawa, Tatsuo Higuchi 0001	High-Radix Parallel VLSI Dividers without Using Quotient Digit Selection Tables.	ISMVL	2000	DBLP DOI BibTeX RDF	Quotient digit selection tables, High-radix division, VLSI, Computer arithmetic, Signed-digit number systems, SRT division
34	G. Sidiropoulos, Haridimos T. Vergos, Dimitris Nikolos	Easily Path Delay Fault Testable Non-Restoring Cellular Array Dividers.	Asian Test Symposium	1999	DBLP DOI BibTeX RDF
34	W. Lynn Gallagher, Earl E. Swartzlander Jr.	Power Consumption in Fast Dividers Using Time Shared TMR.	DFT	1999	DBLP DOI BibTeX RDF	Goldschmidt, time shared TMR, fault tolerant arithmetic, fault tolerance, division, TMR, Newton-Raphson
34	Niraj K. Jha, Abha Ahuja	Easily testable nonrestoring and restoring gate-level cellular array dividers.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
29	Ramen Dutta, T. K. Bhattacharyya	A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock.	VLSI Design	2009	DBLP DOI BibTeX RDF
29	Melina Apostolidou, Peter G. M. Baltus, Cicero S. Vaucher	Phase noise in frequency divider circuits.	ISCAS	2008	DBLP DOI BibTeX RDF
29	Stuart F. Oberman, Michael J. Flynn	Minimizing the complexity of SRT tables.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
29	David L. Harris, Stuart F. Oberman, Mark Horowitz	SRT Division Architectures and Implementations.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	skew-tolerant, Computer arithmetic, floating point units, SRT division, domino circuits
27	Janak H. Patel, Leona Y. Fung	Concurrent Error Detection in Multiply and Divide Arrays.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF	RESO, multipliers, concurrent error detection, dividers, Cellular logic
19	Tatsuji Yamada, Hidekazu Muramatsu, Norihiko Sakamoto, Katsuya Tachibana, Toshiaki Shioda	A Flexible Evaluation System for the Complex Calibration of Inductive and Resistive Voltage Dividers up to 100 kHz.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
19	Samin Hanifi, Steven M. Bowers	Low-Additive Phase Noise Low-Power Static Frequency Dividers.	RWS	2024	DBLP DOI BibTeX RDF
19	Hossein Razavi, Behzad Razavi	A Study of Injection Locking in Oscillators and Frequency Dividers.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
19	Asif I. Omi, Ahammad, Md Hedayatullah Maktoomi, Mohammad A. Maktoomi, Praveen Kumar Sekhar	Miniaturized Wideband Three-Way Power Dividers With Arbitrary Band Ratio Using a New Analytical Design Technique.	IEEE Access	2023	DBLP DOI BibTeX RDF
19	Farah Bilawal, Fatemeh Babaeian, Kim Tuyen Trinh, Nemai Chandra Karmakar	The Art of Substrate-Integrated-Waveguide Power Dividers.	IEEE Access	2023	DBLP DOI BibTeX RDF
19	Hao Chen, Mingtong Liu, Aoqi Li, Erwin H. W. Chan	Microwave Frequency Dividers With Reconfigurable Fractional 2/N and 3/N Division Ratios.	IEEE Access	2023	DBLP DOI BibTeX RDF
19	Yiming Zhang 0015, Xu Li, Shuai Zhang 0003, Shaoqiu Xiao	Decoupling Network Integrated With CSRR-Based Filtering Power Dividers for Antenna Arrays.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
19	Zhenghai Luo, Gang Zhang 0004, Huaiwei Wang, Na Li, Kam-Weng Tam, Liming Tang, Wanchun Tang, Jiquan Yang	Dual-Band and Triple-Band Filtering Power Dividers Using Coupled Lines.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
19	Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar 0001	RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
19	Komathy Vanitha Krishnan, Anila Satish, Pradeev raj Krishnan	Design of energy efficient approximate subtractors and restoring dividers for error tolerant applications.	Microelectron. J.	2023	DBLP DOI BibTeX RDF
19	Xiaochen Tang, Shanshan Liu 0001, Farzad Niknia, Ziheng Wang, Siting Liu 0001, Pedro Reviriego, Fabrizio Lombardi	Delta Sigma Modulator-Based Dividers for Accurate and Low Latency Stochastic Computing Systems.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
19	Hongyu Bao, Sang Lam	Compact Design of 60-GHz Wilkinson Power Dividers in a 65-nm CMOS Process for Monolithic Microwave Integrated Circuits.	ICEIC	2023	DBLP DOI BibTeX RDF
19	Xiaowei Liu, Edoardo Bonizzoni, Franco Maloberti, Alper Akdikmen, Haibin Liu, Yao Liu 0013	Design of Phase-Interpolator Based Open-Loop Fractional Output Dividers.	ICECS	2023	DBLP DOI BibTeX RDF
19	Batuhan Sutbas, Mohamed Hussein Eissa, Gerhard Kahmen	A Ka-Band VCO Chip with Integrated Dividers Using 1.5 V Supply in 130-nm SiGe BiCMOS Technology for Low-Power Radar Sensors.	BCICTS	2023	DBLP DOI BibTeX RDF
19	Ceyhun Karpuz, Ali Kürsad Görür, Mehmet Çakir, Alperen Cengiz, Adnan Gorur	Compact Wilkinson Power Dividers Based on Narrow Slits Loaded Transmission Lines.	RWS	2023	DBLP DOI BibTeX RDF
19	Jiteshri Dasari, Maciej J. Ciesielski	Formal Verification of Restoring Dividers made Fast and Simple.	DAC	2023	DBLP DOI BibTeX RDF
19	Qiyao Jiang, Quan Pan 0002	Analysis and Design of Tuning-Less mm-Wave Injection-Locked Frequency Dividers With Wide Locking Range Using 8th-Order Transformer-Based Resonator in 40 nm CMOS.	IEEE J. Solid State Circuits	2022	DBLP DOI BibTeX RDF
19	Chi-Feng Chen, Hsin-Ya Tseng, Yi-Hua He, Wen-Jie Le	Design of Bandpass Multiplexer-Integrated Power Dividers.	IEEE Access	2022	DBLP DOI BibTeX RDF
19	Wei Zhao, Yongle Wu, Yuhao Yang 0001, Weimin Wang 0008	Novel On-Chip Wideband Filtering Power Dividers With High Selectivity and Ultra-Wide Out-of-Band Suppression in LTCC Technology.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
19	Hui-Yang Li, Jin-Xu Xu, Xiu Yin Zhang	Miniaturized Balanced Filtering Power Dividers With Arbitrary Power Division Ratio Using Multimode Dielectric Resonator in Single Cavity.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
19	Lazhar Fekih-Ahmed	Analysis of Injection Locking in Ring-Based Divide-By-Two Frequency Dividers.	J. Circuits Syst. Comput.	2022	DBLP DOI BibTeX RDF
19	Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar 0001	RAPID: AppRoximAte Pipelined Soft Multipliers and Dividers for High-Throughput and Energy-Efficiency.	CoRR	2022	DBLP DOI BibTeX RDF
19	Biljana P. Stosic, Marin Nedelchev	On Differences Between Transmission Line-based Wave Digital Models of Gysel Power Dividers.	BlackSeaCom	2022	DBLP DOI BibTeX RDF
19	Xicong Chen, Fumin Lin	Research and Design of Dual-Band 1: 8 Wilkinson Power Dividers for 5G Application.	ICCT	2022	DBLP DOI BibTeX RDF
19	Md. Sazzad Hossain, Mateus Bernardino Moreira, Francois Sandrez, Francois Rivet, Hervé Lapuyade, Yann Deval	Low Power Frequency Dividers using TSPC logic in 28nm FDSOI Technology.	LASCAS	2022	DBLP DOI BibTeX RDF
19	Biljana P. Stosic, Marin Nedelchev	Transmission Line-based Wave Digital Models of Inphase Gysel Power Dividers.	TSP	2022	DBLP DOI BibTeX RDF
19	Oleksandr Drozd, Anatoliy Sachenko, Kostiantyn Zashcholkin, Yulian Sulima, Julia Drozd, Maciej Dobrowolski, Mykola Kuznietsov, Liliia Ivanova, Igor Kovalev	Recovering From a Failure and Improving the Checkability of Iterative Array Dividers.	CSIT	2022	DBLP DOI BibTeX RDF
19	Gang Zhang 0004, Zhenyao Qian, Xinde Zhang, Jiquan Yang	A General and Effective Design Method of Multi-Way Filtering Power Dividers on a New Multi-Port Topology for Industrial Application.	IEEE Trans. Ind. Electron.	2021	DBLP DOI BibTeX RDF
19	Udayan S. Patankar, Ants Koel	Review of Basic Classes of Dividers Based on Division Algorithm.	IEEE Access	2021	DBLP DOI BibTeX RDF
19	Shanshan Liu 0001, Xiaochen Tang, Farzad Niknia, Pedro Reviriego, Weiqiang Liu 0001, Ahmed Louri, Fabrizio Lombardi	Stochastic Dividers for Low Latency Neural Networks.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
19	Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti, Gaetano Palumbo	Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
19	Yan-Yuan Zhu, Jianpeng Wang, Jiasheng Hong, Jian-Xin Chen, Wen Wu 0005	Two- and Three-Way Filtering Power Dividers With Harmonic Suppression Using Triangle Patch Resonator.	IEEE Trans. Circuits Syst. I Regul. Pap.	2021	DBLP DOI BibTeX RDF
19	He Zhu 0003, Y. Jay Guo	Dual-Band and Tri-Band Balanced-to-Single Ended Power Dividers With Wideband Common-Mode Suppression.	IEEE Trans. Circuits Syst. II Express Briefs	2021	DBLP DOI BibTeX RDF
19	Batuhan Sutbas, Ekmel Özbay, Abdullah Atalar	Accurate Isolation Networks in Quadrature Couplers and Power Dividers.	IEEE Trans. Circuits Syst. II Express Briefs	2021	DBLP DOI BibTeX RDF
19	Christoph Scholl 0001, Alexander Konrad, Alireza Mahzoon, Daniel Große, Rolf Drechsler	Verifying Dividers Using Symbolic Computer Algebra and Don't Care Optimization.	DATE	2021	DBLP DOI BibTeX RDF
19	Udayan Sunil Patankar, Miguel E. Flores, Ants Koel	Study of Estimation Based Functional Iteration Approximation Dividers.	ICCE	2021	DBLP DOI BibTeX RDF
19	Mingyu Zhu, Dixian Zhao	Geometric Analysis and Systematic Design of Millimeter-Wave Low-Power Frequency Dividers in 65-nm CMOS.	IEEE Access	2020	DBLP DOI BibTeX RDF
19	Anna Piacibello, Marco Pirola, Giovanni Ghione	Generalized Symmetrical 3 dB Power Dividers With Complex Termination Impedances.	IEEE Access	2020	DBLP DOI BibTeX RDF
19	Sheng-Lyang Jang, Ho-Chang Lee, Miin-Horng Juang	2: 1 Injection-Locked Frequency Dividers Using Multi-Resonance Spiral-Inductor Resonator.	IEEE Access	2020	DBLP DOI BibTeX RDF
19	Elizabeth Adams, Suganthi Venkatachalam, Seok-Bum Ko	Approximate Restoring Dividers Using Inexact Cells and Estimation From Partial Remainders.	IEEE Trans. Computers	2020	DBLP DOI BibTeX RDF
19	Neelam Arya, Teena Soni, Manisha Pattanaik, G. K. Sharma 0001	Bit significance based reconfigurable approximate restoring dividers and square rooters.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
19	Sahar Saleh, Widad Ismail, Intan Sorfina Zainal Abidin, Mohd Haizal Jamaluddin, Mohammed H. Bataineh, Asem Alzoubi	Simple UWB Linear Antenna Array Based On Compact Wilkinson And Bagley Power Dividers.	ISTT	2020	DBLP DOI BibTeX RDF
19	Hassaan Saadat, Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran	WEID: Worst-case Error Improvement in Approximate Dividers.	ASP-DAC	2020	DBLP DOI BibTeX RDF
19	Patrícia Ücker, Miguel R. Weirich, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi	Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design.	LASCAS	2020	DBLP DOI BibTeX RDF
19	Xu Cheng 0002, Jue Wang, Jun Han 0003, Xiaoyang Zeng	Design Methodology of Clock Polarity Inversion Technique for Frequency Dividers.	ISCAS	2020	DBLP DOI BibTeX RDF
19	Chandan Kumar Jha 0001, Kailash Prasad, Vibhor Kumar Srivastava, Joycee Mekie	FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers.	ISCAS	2020	DBLP DOI BibTeX RDF
19	Marcus Penttinen, Timo Holopainen, Lauri Raitala, Lassi Rosala, Jussi Kantola	The Dividers for Continuum of Business in Business Transfer Situations and Impacts to Cash Flow Earnings: A Study from SME-Companies in Finland.	AHFE (9)	2020	DBLP DOI BibTeX RDF
19	Hee-Ran Ahn, Manos M. Tentzeris	Ultra-Compact and Wideband V(U)HF 3-dB Power Dividers Consisting of Novel Asymmetric Impedance Transformers.	IEEE Access	2019	DBLP DOI BibTeX RDF
19	Hee-Ran Ahn, Manos M. Tentzeris	In-Phase T-Junction: Study and Application to Gysel Power Dividers for High Power-Division Ratios Requiring No High-Impedance Transmission-Line Section.	IEEE Access	2019	DBLP DOI BibTeX RDF
19	Yun-Peng Lyu, Lei Zhu 0009, Chong-Hu Cheng	A New Design of Filtering Power Dividers With Arbitrary Constant Phase Difference, Impedance Transformation, and Good Isolation.	IEEE Access	2019	DBLP DOI BibTeX RDF
19	Zhaomin Shi, Jiangtao Zhang, Xianlin Pan, Ying Song, Jun Lin 0003, Qing He	Self-Calibration and Verification of Phase Angle Errors of Two Voltage Dividers at High Frequencies.	IEEE Trans. Instrum. Meas.	2019	DBLP DOI BibTeX RDF
19	Wei Yan, Wei Zhao 0030, Yi Li 0016	Effect of Step Response Measurement Arrangement on the Correction of Ultrahigh-Voltage Lightning Impulse Dividers.	IEEE Trans. Instrum. Meas.	2019	DBLP DOI BibTeX RDF
19	Fei Xiao	Lumped-element filtering power dividers.	Int. J. Circuit Theory Appl.	2019	DBLP DOI BibTeX RDF
19	Anusha Gorantla, Deepa P	Design of Approximate Subtractors and Dividers for Error Tolerant Image Processing Applications.	J. Electron. Test.	2019	DBLP DOI BibTeX RDF
19	Roberto Gómez-García, José Maria Muñoz-Ferreras, Dimitra Psychogiou	RF Reflectionless Filtering Power Dividers.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
19	Wenjie Feng 0002, Xueke Ma, Roberto Gómez-García, Yongrong Shi, Wenquan Che, Quan Xue	Multi-Functional Balanced-to-Unbalanced Filtering Power Dividers With Extended Upper Stopband.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
19	Kyoungwoon Kim, Cam Nguyen	A V-Band Power Amplifier With Integrated Wilkinson Power Dividers-Combiners and Transformers in 0.18- $\mu$ m SiGe BiCMOS.	IEEE Trans. Circuits Syst. II Express Briefs	2019	DBLP DOI BibTeX RDF
19	Soheil Hashemi, Sherief Reda	Approximate Multipliers and Dividers Using Dynamic Bit Selection.	Approximate Circuits	2019	DBLP DOI BibTeX RDF
19	Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski	Formal Verification of Integer Dividers: Division by a Constant.	ISVLSI	2019	DBLP DOI BibTeX RDF
19	Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski	Functional Verification of Hardware Dividers using Algebraic Model.	VLSI-SoC	2019	DBLP DOI BibTeX RDF
19	Chandan Kumar Jha 0001, Joycee Mekie	Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs.	DSD	2019	DBLP DOI BibTeX RDF
19	Mikko Hietanen, Janne Aikio, Alok Sethi, Rehman Akbar, Timo Rahkonen, Aarno Pärssinen	Optimizing Inductorless Static CML Frequency Dividers up to 23GHz Output Using 45nm CMOS PD-SOI.	NORCAS	2019	DBLP DOI BibTeX RDF
19	Suganthi Venkatachalam, Elizabeth Adams, Seok-Bum Ko	Design of Approximate Restoring Dividers.	ISCAS	2019	DBLP DOI BibTeX RDF
19	Hassaan Saadat, Haris Javaid, Sri Parameswaran	Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias.	DAC	2019	DBLP DOI BibTeX RDF
19	Linbin Chen, Jie Han 0001, Weiqiang Liu 0001, Paolo Montuschi, Fabrizio Lombardi	Design, Evaluation and Application of Approximate High-Radix Dividers.	IEEE Trans. Multi Scale Comput. Syst.	2018	DBLP DOI BibTeX RDF
19	Jingzhi Zhang, Yixuan Cheng, Chenxi Zhao, Yunqiu Wu, Kai Kang	Analysis and Design of Ultra-Wideband mm-Wave Injection-Locked Frequency Dividers Using Transformer-Based High-Order Resonators.	IEEE J. Solid State Circuits	2018	DBLP DOI BibTeX RDF
19	Ahmed Elkholy, Saurabh Saxena, Guanghua Shu, Amr Elshazly, Pavan Kumar Hanumolu	Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers.	IEEE J. Solid State Circuits	2018	DBLP DOI BibTeX RDF
19	Armin Mohammadjany, Ali Reza Hazeri, Hossein Miar Naimi	Exact analyses for locking range in injection-locked frequency dividers.	Integr.	2018	DBLP DOI BibTeX RDF
19	Tiku Yu	Design of Length-Saving Multiway Wilkinson Power Dividers.	IEEE Access	2018	DBLP DOI BibTeX RDF