Search results for "fault-emulation"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
123	Jan Torben Weinkopf, Klaus Harbich, Erich Barke	Parsifal: A Generic and Configurable Fault Emulation Environment with Non-Classical Fault Models.	FPL	2006	DBLP DOI BibTeX RDF
64	Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, Raimund Ubar	Improved Fault Emulation for Synchronous Sequential Circuits.	DSD	2005	DBLP DOI BibTeX RDF
62	Jan Torben Weinkopf, Klaus Harbich, Erich Barke	Incremental Fault Emulation.	FPL	2007	DBLP DOI BibTeX RDF
59	João Durães, Henrique Madeira	Emulation of Software Faults: A Field Data Study and a Practical Approach.	IEEE Trans. Software Eng.	2006	DBLP DOI BibTeX RDF	software reliability, Fault injection, software faults
56	Kwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai	Fault emulation: a new approach to fault grading.	ICCAD	1995	DBLP DOI BibTeX RDF
53	Kwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai	Fault emulation: A new methodology for fault grading.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
49	Shih-Arn Hwang, Jin-Hua Hong, Cheng-Wen Wu	Sequential circuit fault simulation using logic emulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
46	David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil	Fault Emulation for Dependability Evaluation of VLSI Systems.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
45	Henrique Madeira, João Durães, Marco Vieira	Emulation of Software Faults: Representativeness and Usefulness.	LADC	2003	DBLP DOI BibTeX RDF
35	P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis	A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs.	IOLTS	2006	DBLP DOI BibTeX RDF
35	João Durães, Henrique Madeira	Definition of Software Fault Emulation Operators: A Field Data Study.	DSN	2003	DBLP DOI BibTeX RDF
32	Reza Sedaghat-Maman	Fault emulation: reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping. (PDF / PS)		1999	RDF
32	Seyed Ghassem Miremadi, Ali Reza Ejlali	Switch Level Fault Emulation.	FPL	2003	DBLP DOI BibTeX RDF
32	Henrique Madeira, Diamantino Costa, Marco Vieira	On the Emulation of Software Faults by Software Fault Injection.	DSN	2000	DBLP DOI BibTeX RDF	Fault injection, software faults, fault classification
27	Fatih Kocan, Mehmet Hadi Gunes	Acyclic circuit partitioning for path delay fault emulation.	AICCSA	2005	DBLP DOI BibTeX RDF
24	Richard W. Wieler, Zaifu Zhang, Robert D. McLeod	Emulating static faults using a Xilinx based emulator.	FCCM	1995	DBLP DOI BibTeX RDF
21	Sezer Gören 0001, Cemil Cem Gürsoy, Abdullah Yildiz	Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection.	J. Electron. Test.	2016	DBLP DOI BibTeX RDF
21	Ralph Nyberg, Johann Heyszl, Dietmar Heinz, Georg Sigl	Enhancing Fault Emulation of Transient Faults by Separating Combinational and Sequential Fault Propagation.	ACM Great Lakes Symposium on VLSI	2016	DBLP DOI BibTeX RDF
21	Sezer Gören 0001, Cemil Cem Gürsoy, Abdullah Yildiz	Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection.	J. Electron. Test.	2015	DBLP DOI BibTeX RDF
21	Johannes Grinschgl, Armin Krieg, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid	Efficient fault emulation based on post-injection fault effect analysis (PIFEA).	MWSCAS	2012	DBLP DOI BibTeX RDF
21	Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes	Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading.	IOLTS	2005	DBLP DOI BibTeX RDF
18	Mario García-Valderas, Luis Entrena, Raúl Fernández Cardenal, Celia López-Ongil, Marta Portela-García	SET Emulation Under a Quantized Delay Model.	J. Electron. Test.	2009	DBLP DOI BibTeX RDF	Fault emulation, Fault tolerance, Fault injection, Single event transients
18	Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda	Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	fault-emulation, software-based testing, FPGA, path-delay
18	Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante	An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	FPGA-based fault emulation, fault injection, single event upset, dependability evaluation, fault tolerant circuits
16	Endri Kaja, Nicolas Gerlin, Monideep Bora, Gabriel Rutsch, Keerthikumara Devarajegowda, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker	Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation.	VLSI-SoC	2022	DBLP DOI BibTeX RDF
16	Paolo Maistri, Jiayun Po	A Low-Cost Methodology for EM Fault Emulation on FPGA.	DATE	2022	DBLP DOI BibTeX RDF
16	Andrea Floridia, Ernesto Sánchez 0001	A JTAG-based Fault Emulation Platform for Dependability Analyses of Processor-based ASICs.	LASCAS	2021	DBLP DOI BibTeX RDF
16	Ibrahim Mezzah, Omar Kermia, Hamimi Chemali	Extensive Fault Emulation on RFID Tags.	DTIS	2020	DBLP DOI BibTeX RDF
16	Ralph Nyberg, Johann Heyszl, Dirk Rabe, Georg Sigl	Closing the gap between speed and configurability of multi-bit fault emulation environments for security and safety-critical designs.	Microprocess. Microsystems	2015	DBLP DOI BibTeX RDF
16	Ioana Mot, Oana Boncalo, Alexandru Amaricai	Performance Enhancement of Serial Based FPGA Probabilistic Fault Emulation Techniques.	DDECS	2015	DBLP DOI BibTeX RDF
16	David May 0003, Walter Stechele	Design of fine-grained sequential approximate circuits using probability-aware fault emulation.	ISLPED	2015	DBLP DOI BibTeX RDF
16	Ralph Nyberg, Jürgen Nolles, Johann Heyszl, Dirk Rabe, Georg Sigl	Closing the Gap between Speed and Configurability of Multi-bit Fault Emulation Environments for Security and Safety-Critical Designs.	DSD	2014	DBLP DOI BibTeX RDF
16	Oana Boncalo, Alexandru Amaricai, Christian Spagnol, Emanuel M. Popovici	Cost effective FPGA probabilistic fault emulation.	NORCHIP	2014	DBLP DOI BibTeX RDF
16	Armin Krieg, Christopher Preschern, Johannes Grinschgl, Christian Steger, Christian Kreiner, Reinhold Weiss, Holger Bock, Josef Haid	Power And Fault Emulation for Software Verification and System Stability Testing in Safety Critical Environments.	IEEE Trans. Ind. Informatics	2013	DBLP DOI BibTeX RDF
16	John Paul Walters, Kenneth M. Zick, Matthew French	A practical characterization of a NASA SpaceCube application through fault emulation and laser testing.	DSN	2013	DBLP DOI BibTeX RDF
16	Johannes Grinschgl, Armin Krieg, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid	Efficient fault emulation using automatic pre-injection memory access analysis.	SoCC	2012	DBLP DOI BibTeX RDF
16	Qiang Zhang, Jun Zhou, Xiaozhou Yu	A Kind of Low-cost Non-intrusive Autonomous Fault Emulation System.	Comput. Inf. Sci.	2011	DBLP DOI BibTeX RDF
16	Carson Dunbar, Kundan Nepal	Using Platform FPGAs for Fault Emulation and Test-set Generation to Detect Stuck-at Faults.	J. Comput.	2011	DBLP DOI BibTeX RDF
16	Uros Legat, Anton Biasizzo, Franc Novak	Automated SEU fault emulation using partial FPGA reconfiguration.	DDECS	2010	DBLP DOI BibTeX RDF
16	Peter Ming-Han Lee, Reza Sedaghat	FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration.	Microelectron. Reliab.	2008	DBLP DOI BibTeX RDF
16	Peeter Ellervee, Jaan Raik, Kalle Tammemäe, Raimund Ubar	FPGA-based fault emulation of synchronous sequential circuits.	IET Comput. Digit. Tech.	2007	DBLP DOI BibTeX RDF
16	Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena-Arrontes	An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories.	DDECS	2006	DBLP DOI BibTeX RDF
16	David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil	FADES: a fault emulation tool for fast dependability assessment.	FPT	2006	DBLP DOI BibTeX RDF
16	Lucía Costas, Juan Jose Rodríguez-Andina, Elena Lago	FPGA-based Stuck-at Fault Emulation in Wavelet-based Image Coding Systems.	LATW	2006	DBLP BibTeX RDF
16	Abilio Parreira, Marcelino B. Santos, João Paulo Teixeira 0001	BIST Architectures and Fault Emulation.	LATW	2006	DBLP BibTeX RDF
16	Juan-Carlos Ruiz-Garcia, José Carlos Campelo, Pedro J. Gil, Juan Pardo	On-chip Debugging-based Fault Emulation for Robustness Evaluation of Embedded Software Components.	PRDC	2005	DBLP DOI BibTeX RDF
16	Abilio Parreira, João Paulo Teixeira 0001, Marcelino B. Santos	Built-In Self-Test Quality Assessment Using Hardware Fault Emulation In FPGAs.	Comput. Artif. Intell.	2004	DBLP BibTeX RDF
16	Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, Kalle Tammemäe	Evaluating Fault Emulation on FPGA.	FPL	2004	DBLP DOI BibTeX RDF
16	Mario García-Valderas, Celia López-Ongil, Marta Portela-García, Luis Entrena	Transient Fault Emulation of Hardened Circuits in FPGA Platforms.	IOLTS	2004	DBLP DOI BibTeX RDF
16	João Durães, Henrique Madeira	Characterization of Operating Systems Behavior in the Presence of Faulty Drivers through Software Fault Emulation.	PRDC	2002	DBLP DOI BibTeX RDF
16	Reza Sedaghat-Maman, Erich Barke	A new approach to fault emulation.	IEEE International Workshop on Rapid System Prototyping	1997	DBLP DOI BibTeX RDF
16	Luc Burgun, Frédéric Reblewski, Gérard Fenelon, Jean Barbier, Olivier Lepape	Serial Fault Emulation.	DAC	1996	DBLP DOI BibTeX RDF
16	Mehdi Baradaran Tahoori, Subhasish Mitra	Techniques and algorithms for fault grading of FPGA interconnect test configurations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
16	Mehdi Baradaran Tahoori	A high resolution diagnosis technique for open and short defects in FPGA interconnects.	FPGA	2003	DBLP DOI BibTeX RDF
16	Monica Alderighi, Sergio D'Angelo, Marcello Mancini, Giacomo R. Sechi	A Fault Injection Tool for SRAM-based FPGAs.	IOLTS	2003	DBLP DOI BibTeX RDF
16	Monica Alderighi, Fabio Casini, Sergio D'Angelo, Marcello Mancini, A. Marmo, Sandro Pastore, Giacomo R. Sechi	A Tool for Injecting SEU-Like Faults into the Configuration Control Mechanism of Xilinx Virtex FPGAs.	DFT	2003	DBLP DOI BibTeX RDF
16	Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey	Fault Grading FPGA Interconnect Test Configurations.	ITC	2002	DBLP DOI BibTeX RDF
13	Miron Abramovici, Prem R. Menon	Fault simulation on reconfigurable hardware.	FCCM	1997	DBLP DOI BibTeX RDF
11	Ian Harris, Dhiraj Pradhan	Guest Editorial Special Section on Design Verification and Validation.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF