Search results for "layout-aware"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
59	Raoul F. Badaoui, Hemanth Sampath, Anuradha Agarwal, Ranga Vemuri	A high level language for pre-layout extraction in parasite-aware analog circuit synthesis.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	MSL, pre-layout extraction, parasitics, analog VLSI
47	Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri	Fast and accurate parasitic capacitance models for layout-aware.	DAC	2004	DBLP DOI BibTeX RDF	layout aware, parasitic estimation, analog synthesis
38	Hua Tang, Hui Zhang 0057, Alex Doboli	Layout-Aware Analog System Synthesis Based on Symbolic Layout Description and Combined Block Parameter Exploration, Placement and Global Routing.	ISVLSI	2003	DBLP DOI BibTeX RDF
31	Almitra Pradhan, Ranga Vemuri	A layout-aware analog synthesis procedure inclusive of dynamic module geometry selection.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	layout-aware, matrix-models, sizing
29	Vyas Krishnan, Srinivas Katkoori	A 3D-Layout Aware Binding Algorithm for High-Level Synthesis of Three-Dimensional Integrated Circuits.	ISQED	2007	DBLP DOI BibTeX RDF
29	Puneet Gupta 0001, Andrew B. Kahng, Ion I. Mandoiu, Puneet Sharma	Layout-aware scan chain synthesis for improved path delay fault coverage.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
27	Rafael Castro-López, Oscar Guerra, Elisenda Roca, Francisco V. Fernández 0001	An Integrated Layout-Synthesis Approach for Analog ICs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
25	Sanjiv Taneja	DFT Aware Layout - Layout Aware DFT.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
25	Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen	CYCLONE: automated design and layout of RF LC-oscillators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
25	Almitra Pradhan, Ranga Vemuri	Efficient Synthesis of a Uniformly Spread Layout Aware Pareto Surface for Analog Circuits.	VLSI Design	2009	DBLP DOI BibTeX RDF
22	Nuno Lourenço 0003, Ricardo Martins 0003, António Canelas, Ricardo Povoa, Nuno Horta	AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation.	Integr.	2016	DBLP DOI BibTeX RDF
20	David Bañeres, Jordi Cortadella, Michael Kishinevsky	Layout-aware gate duplication and buffer insertion.	DATE	2007	DBLP DOI BibTeX RDF
20	Liangpeng Guo, Yici Cai, Qiang Zhou 0001, Xianlong Hong	Logic and Layout Aware Voltage Island Generation for Low Power Design.	ASP-DAC	2007	DBLP DOI BibTeX RDF
20	Aman Kokrady, C. P. Ravikumar	Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures.	VLSI Design	2004	DBLP DOI BibTeX RDF	Timing Failure, Test Validation, Crosstalk, At Speed Testing, IR Drop
17	Ritesh Sarkhel, Xiaoqi Ren, Lauro Beltrão Costa, Guolong Su, Vincent Perot, Yanan Xie, Emmanouil Koukoumidis, Arnab Nandi 0001	Noise-Aware Training of Layout-Aware Language Models.	CoRR	2024	DBLP DOI BibTeX RDF
16	Junhyung Um, Taewhan Kim	Resource Sharing Combined with Layout Effects in High-Level Synthesis.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	resource allocation, high-level synthesis, layout
16	Raoul F. Badaoui, Ranga Vemuri	Multi-Placement Structures for Fast and Optimized Placement in Analog Circuit Synthesis.	DATE	2005	DBLP DOI BibTeX RDF
16	Enrico Macii	Leakage power optimization in standard-cell designs.	SBCCI	2004	DBLP DOI BibTeX RDF
13	Sureum Choi, Daejin Han, Chanyeong Choi, Yeongkyo Seo	Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System.	IEEE Trans. Very Large Scale Integr. Syst.	2024	DBLP DOI BibTeX RDF
13	Marcel Lamott, Yves-Noel Weweler, Adrian Ulges, Faisal Shafait, Dirk Krechel, Darko Obradovic	LAPDoc: Layout-Aware Prompting for Documents.	CoRR	2024	DBLP DOI BibTeX RDF
13	Takahiro Shirakawa, Seiichi Uchida	NoiseCollage: A Layout-Aware Text-to-Image Diffusion Model Based on Noise Cropping and Merging.	CoRR	2024	DBLP DOI BibTeX RDF
13	Dongsheng Wang 0005, Natraj Raman, Mathieu Sibue, Zhiqiang Ma, Petr Babkin, Simerjot Kaur, Yulong Pei, Armineh Nourbakhsh, Xiaomo Liu	DocLLM: A layout-aware generative language model for multimodal document understanding.	CoRR	2024	DBLP DOI BibTeX RDF
13	Pu Li, Weize Quan, Jianwei Guo, Dong-Ming Yan 0001	Layout-aware Single-image Document Flattening.	ACM Trans. Graph.	2024	DBLP DOI BibTeX RDF
13	Chao Wang 0094, Zhaohao Wang, Zhongkui Zhang, Jiagao Feng, Youguang Zhang, Weisheng Zhao	Layout Aware Optimization Methodology for SOT-MRAM Based on Technically Feasible Top-Pinned Magnetic Tunnel Junction Process.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
13	Mingliang Zhang, Zhongzhi Li, Fei Yin, Cheng-Lin Liu 0001	LANS: A Layout-Aware Neural Solver for Plane Geometry Problem.	CoRR	2023	DBLP DOI BibTeX RDF
13	Jun Bao, Buyu Liu, Jianping Fan 0001, Jun Yu 0002	GLOW: Global Layout Aware Attacks for Object Detection.	CoRR	2023	DBLP DOI BibTeX RDF
13	Ahmet Faruk Budak, Keren Zhu 0001, David Z. Pan	Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks.	CoRR	2023	DBLP DOI BibTeX RDF
13	Laura Nguyen, Thomas Scialom, Benjamin Piwowarski, Jacopo Staiano	LoRaLay: A Multilingual and Multimodal Dataset for Long Range and Layout-Aware Summarization.	CoRR	2023	DBLP DOI BibTeX RDF
13	Anfeng Cheng, Yiding Liu, Weibin Li, Qian Dong, Shuaiqiang Wang, Zhengjie Huang, Shikun Feng, Zhicong Cheng, Dawei Yin	Layout-aware Webpage Quality Assessment.	CoRR	2023	DBLP DOI BibTeX RDF
13	Mingxiao Li, Zehao Wang, Tinne Tuytelaars, Marie-Francine Moens	Layout-Aware Dreamer for Embodied Visual Referring Expression Grounding.	AAAI	2023	DBLP DOI BibTeX RDF
13	Laura Nguyen, Thomas Scialom, Benjamin Piwowarski, Jacopo Staiano	LoRaLay: A Multilingual and Multimodal Dataset for Long Range and Layout-Aware Summarization.	EACL	2023	DBLP DOI BibTeX RDF
13	Ahmet Faruk Budak, Keren Zhu 0001, David Z. Pan	Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks.	ICCAD	2023	DBLP DOI BibTeX RDF
13	Zhiyang Zhang, Yaping Zhang, Yupu Liang, Lu Xiang, Yang Zhao, Yu Zhou, Chengqing Zong	LayoutDIT: Layout-Aware End-to-End Document Image Translation with Multi-Step Conductive Decoder.	EMNLP (Findings)	2023	DBLP DOI BibTeX RDF
13	Minyan Gao, Domenic Forte	Detour: Layout-aware Reroute Attack Vulnerability Assessment and Analysis.	HOST	2023	DBLP DOI BibTeX RDF
13	Mingxiao Li, Zehao Wang, Tinne Tuytelaars, Marie-Francine Moens	Layout-aware Dreamer for Embodied Referring Expression Grounding.	CoRR	2022	DBLP DOI BibTeX RDF
13	Prakhar Kulshreshtha, Konstantinos-Nektarios Lianos, Brian Pugh, Salma Jiddi	Layout Aware Inpainting for Automated Furniture Removal in Indoor Scenes.	CoRR	2022	DBLP DOI BibTeX RDF
13	Zhangxuan Gu, Changhua Meng, Ke Wang, Jun Lan, Weiqiang Wang, Ming Gu 0011, Liqing Zhang 0001	XYLayoutLM: Towards Layout-Aware Multimodal Networks For Visually-Rich Document Understanding.	CoRR	2022	DBLP DOI BibTeX RDF
13	Zhenyu Zhang 0006, Bowen Yu 0002, Haiyang Yu, Tingwen Liu, Cheng Fu, Jingyang Li, Chengguang Tang, Jian Sun 0021, Yongbin Li	Layout-Aware Information Extraction for Document-Grounded Dialogue: Dataset, Method and Demonstration.	CoRR	2022	DBLP DOI BibTeX RDF
13	Jierun Chen, Tianlang He, Weipeng Zhuo, Li Ma, Sangtae Ha, S.-H. Gary Chan	TVConv: Efficient Translation Variant Convolution for Layout-aware Visual Processing.	CoRR	2022	DBLP DOI BibTeX RDF
13	Amit Mazumder Shuvo, Nitin Pundir, Jungmin Park, Farimah Farahmandi, Mark M. Tehranipoor	LDTFI: Layout-aware Timing Fault-Injection Attack Assessment Against Differential Fault Analysis.	ISVLSI	2022	DBLP DOI BibTeX RDF
13	Prakhar Kulshreshtha, Nektarios Lianos, Brian Pugh, Salma Jiddi	Layout Aware Inpainting for Automated Furniture Removal in Indoor Scenes.	ISMAR Adjunct	2022	DBLP DOI BibTeX RDF
13	Zhenyu Zhang 0006, Bowen Yu 0002, Haiyang Yu, Tingwen Liu, Cheng Fu, Jingyang Li, Chengguang Tang, Jian Sun 0021, Yongbin Li	Layout-Aware Information Extraction for Document-Grounded Dialogue: Dataset, Method and Demonstration.	ACM Multimedia	2022	DBLP DOI BibTeX RDF
13	Jing Qian, Qi Sun, Curtis Wigington, Han L. Han, Tong Sun, Jennifer Healey, James Tompkin 0001, Jeff Huang 0002	Dually Noted: Layout-Aware Annotations with Smartphone Augmented Reality.	CHI	2022	DBLP DOI BibTeX RDF
13	Jierun Chen, Tianlang He, Weipeng Zhuo, Li Ma, Sangtae Ha, S.-H. Gary Chan	TVConv: Efficient Translation Variant Convolution for Layout-aware Visual Processing.	CVPR	2022	DBLP DOI BibTeX RDF
13	Ali Furkan Biten, Ron Litman, Yusheng Xie, Srikar Appalaraju, R. Manmatha	LaTr: Layout-Aware Transformer for Scene-Text VQA.	CVPR	2022	DBLP DOI BibTeX RDF
13	Zhangxuan Gu, Changhua Meng, Ke Wang, Jun Lan, Weiqiang Wang, Ming Gu 0011, Liqing Zhang 0001	XYLayoutLM: Towards Layout-Aware Multimodal Networks For Visually-Rich Document Understanding.	CVPR	2022	DBLP DOI BibTeX RDF
13	Preethika Kasu, Prince Hamandawana, Tae-Sun Chung	DLFT: Data and Layout Aware Fault Tolerance Framework for Big Data Transfer Systems.	IEEE Access	2021	DBLP DOI BibTeX RDF
13	Ali Furkan Biten, Ron Litman, Yusheng Xie, Srikar Appalaraju, R. Manmatha	LaTr: Layout-Aware Transformer for Scene-Text VQA.	CoRR	2021	DBLP BibTeX RDF
13	Anik Saha, Catherine Finegan-Dollak, Ashish Verma	Position Masking for Improved Layout-Aware Document Understanding.	CoRR	2021	DBLP BibTeX RDF
13	Te-Lin Wu, Cheng Li 0012, Mingyang Zhang 0001, Tao Chen 0008, Spurthi Amba Hombaiah, Michael Bendersky	LAMPRET: Layout-Aware Multimodal PreTraining for Document Understanding.	CoRR	2021	DBLP BibTeX RDF
13	Jongyun Choi, Hyesoo Kong, Hwamook Yoon, Heung-Seon Oh, Yuchul Jung	LAME: Layout Aware Metadata Extraction Approach for Research Articles.	CoRR	2021	DBLP BibTeX RDF
13	Teakgyu Hong, Donghyun Kim 0012, Mingi Ji, Wonseok Hwang, Daehyun Nam, Sungrae Park	BROS: A Layout-Aware Pre-trained Language Model for Understanding Documents.	CoRR	2021	DBLP BibTeX RDF
13	Tianshi Mu, Huabing Zhang, Jian Wang, Huijuan Li	CoLaFUZE: Coverage-Guided and Layout-Aware Fuzzing for Android Drivers.	IEICE Trans. Inf. Syst.	2021	DBLP DOI BibTeX RDF
13	Tanvir Ahmed, Johannes Maximilian Kühn, Ken Namura	A Highly Efficient Layout-Aware FPGA Overlay Accelerator Mapping Method.	MCSoC	2021	DBLP DOI BibTeX RDF
13	Kaushik Kandadi Suresh, Bharath Ramesh 0005, Chen-Chun Chen, Seyedeh Mahdieh Ghazimirsaeed, Mohammadreza Bayatpour, Aamir Shafi, Hari Subramoni, Dhabaleswar K. Panda 0001	Layout-aware Hardware-assisted Designs for Derived Data Types in MPI.	HiPC	2021	DBLP DOI BibTeX RDF
13	Dongyu She, Yu-Kun Lai, Gaoxiong Yi, Kun Xu 0003	Hierarchical Layout-Aware Graph Convolutional Network for Unified Aesthetics Assessment.	CVPR	2021	DBLP BibTeX RDF
13	Lukasz Garncarek, Rafal Powalski, Tomasz Stanislawek, Bartosz Topolski, Piotr Halama, Michal Turski, Filip Gralinski	LAMBERT: Layout-Aware Language Modeling for Information Extraction.	ICDAR (1)	2021	DBLP DOI BibTeX RDF
13	Maizhen Ning, Qiu-Feng Wang, Kaizhu Huang, Xiaowei Huang 0001	A Segment-Based Layout Aware Model for Information Extraction on Document Images.	ICONIP (5)	2021	DBLP DOI BibTeX RDF
13	Shuibing He, Yanlong Yin, Xian-He Sun, Xuechen Zhang 0001, Zongpeng Li	Optimizing Parallel I/O Accesses through Pattern-Directed and Layout-Aware Replication.	IEEE Trans. Computers	2020	DBLP DOI BibTeX RDF
13	Mengxi Wei, Yifan He, Qiong Zhang	Robust Layout-aware IE for Visually Rich Documents with Pre-trained Language Models.	CoRR	2020	DBLP BibTeX RDF
13	Lukasz Garncarek, Rafal Powalski, Tomasz Stanislawek, Bartosz Topolski, Piotr Halama, Filip Gralinski	LAMBERT: Layout-Aware language Modeling using BERT for information extraction.	CoRR	2020	DBLP BibTeX RDF
13	Catherine Finegan-Dollak, Ashish Verma	Layout-Aware Text Representations Harm Clustering Documents by Type.	Insights	2020	DBLP DOI BibTeX RDF
13	Mengxi Wei, Yifan He, Qiong Zhang	Robust Layout-aware IE for Visually Rich Documents with Pre-trained Language Models.	SIGIR	2020	DBLP DOI BibTeX RDF
13	Niloofar Charmchi	Compressed cache layout aware prefetching. (Préchargement adapté à la structure d'un cache compressé).		2020	RDF
13	Preethika Kasu, Taeuk Kim, Jung-Ho Um, Kyongseok Park, Scott Atchley, Youngjae Kim 0001	FTLADS: Object-Logging Based Fault-Tolerant Big Data Transfer System Using Layout Aware Data Scheduling.	IEEE Access	2019	DBLP DOI BibTeX RDF
13	Jian Zhou 0004, Huafeng Wu, Jun Wang 0001	ApproxSSD: Data Layout Aware Sampling on an Array of SSDs.	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
13	Shangbin Wu, Xiaoqing Zhang	A Low-Complexity Antenna-Layout-Aware Spatial Covariance Matrix Estimation Method.	CoRR	2019	DBLP BibTeX RDF
13	Kangqi Luo, Jinyi Lu, Kenny Q. Zhu, Weiguo Gao, Jia Wei, Meizhuo Zhang	Layout-aware information extraction from semi-structured medical images.	Comput. Biol. Medicine	2019	DBLP DOI BibTeX RDF
13	Xiangyang Shi, Yue Wu 0001, Huaigu Cao, Gully Burns, Prem Natarajan	Layout-aware Subfigure Decomposition for Complex Figures in the Biomedical Literature.	ICASSP	2019	DBLP DOI BibTeX RDF
13	Jose P. Pinilla, Steven J. E. Wilton	Layout-Aware Embedding for Quantum Annealing Processors.	ISC	2019	DBLP DOI BibTeX RDF
13	Niloofar Charmchi, Caroline Collange, André Seznec	Compressed Cache Layout Aware Prefetching.	SBAC-PAD	2019	DBLP DOI BibTeX RDF
13	Masayuki Arai, Shingo Inuyama, Kazuhiko Iwasaki	Layout-Aware Fast Bridge/Open Test Generation by 2-Step Pattern Reordering.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2018	DBLP DOI BibTeX RDF
13	Preethika Kasu, Taeuk Kim, Youngjae Kim 0001, Jung-Ho Um, Kyongseok Park, Scott Atchley	FT-LADS: Fault-Tolerant Object-Logging based Big Data Transfer System using Layout-Aware Data Scheduling.	CoRR	2018	DBLP BibTeX RDF
13	Kecheng Zheng, Zheng-Jun Zha, Yang Cao 0010, Xuejin Chen, Feng Wu 0001	LA-Net: Layout-Aware Dense Network for Monocular Depth Estimation.	ACM Multimedia	2018	DBLP DOI BibTeX RDF
13	Daniel Ferrés, Horacio Saggion, Francesco Ronzano, Àlex Bravo	PDFdigest: an Adaptable Layout-Aware PDF-to-XML Textual Content Extractor for Scientific Articles.	LREC	2018	DBLP BibTeX RDF
13	Ricardo Martins 0003, Nuno Lourenço 0003, António Canelas, Nuno Horta	Stochastic-based placement template generator for analog IC layout-aware synthesis.	Integr.	2017	DBLP DOI BibTeX RDF
13	Yu Hu 0001, Jing Ye 0001, Zhiping Shi 0002, Xiaowei Li 0001	LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization.	IEICE Trans. Inf. Syst.	2017	DBLP DOI BibTeX RDF
13	Kalidas Ganesh, Youngjae Kim 0001, Monobrata Debnath, Sungyong Park, Junghee Lee	LAWC: Optimizing Write Cache Using Layout-Aware I/O Scheduling for All Flash Storage.	IEEE Trans. Computers	2017	DBLP DOI BibTeX RDF
13	Shuang Ma, Jing Liu 0002, Chang Wen Chen	A-Lamp: Adaptive Layout-Aware Multi-Patch Deep Convolutional Neural Network for Photo Aesthetic Assessment.	CoRR	2017	DBLP BibTeX RDF
13	Katherine Shu-Min Li, Sying-Jyan Wang, Ruei-Ting Gu, Bo-Chuan Cheng	Layout-Aware Optimized Prebond Silicon Interposer Test Synthesis.	IEEE Des. Test	2017	DBLP DOI BibTeX RDF
13	Simon Harmata, Katharina Hofer-Schmitz, Phuong-Ha Nguyen, Christoph Quix, Bujar Bakiu	Layout-Aware Semi-automatic Information Extraction for Pharmaceutical Documents.	DILS	2017	DBLP DOI BibTeX RDF
13	Ricardo Martins 0003, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández 0001	Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks.	SMACD	2017	DBLP DOI BibTeX RDF
13	Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández 0001, Ricardo Martins 0003, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno C. G. Horta	Systematic design of a voltage controlled oscillator using a layout-aware approach.	SMACD	2017	DBLP DOI BibTeX RDF
13	Tao Wang 0047, Xuming He 0001, Songzhi Su, Yin Guan	Efficient Scene Layout Aware Object Detection for Traffic Surveillance.	CVPR Workshops	2017	DBLP DOI BibTeX RDF
13	Shuang Ma, Jing Liu, Chang Wen Chen	A-Lamp: Adaptive Layout-Aware Multi-patch Deep Convolutional Neural Network for Photo Aesthetic Assessment.	CVPR	2017	DBLP DOI BibTeX RDF
13	Masayuki Arai, Shingo Inuyama, Kazuhiko Iwasaki	Layout-aware 2-step window-based pattern reordering for fast bridge/open test generation.	ITC	2017	DBLP DOI BibTeX RDF
13	Seungryul Baek, Zhiyuan Shi, Masato Kawade, Tae-Kyun Kim	Kinematic-Layout-aware Random Forests for Depth-based Action Recognition.	BMVC	2017	DBLP BibTeX RDF
13	David del Rio, Iñaki Gurutzeaga, Héctor Solar, Andoni Beriain, Roc Berenguer	Layout-aware design methodology for a 75 GHz power amplifier in a 55 nm SiGe technology.	Integr.	2016	DBLP DOI BibTeX RDF
13	Rajiv V. Joshi, Sudesh Saroop, Rouwaida Kanj, Yang Liu, Weike Wang, Carl Radens, Yue Tan, Karthik Yogendra	A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM.	IEEE Trans. Very Large Scale Integr. Syst.	2016	DBLP DOI BibTeX RDF
13	Shuibing He, Yang Wang 0006, Xian-He Sun	Improving Performance of Parallel I/O Systems through Selective and Layout-Aware SSD Cache.	IEEE Trans. Parallel Distributed Syst.	2016	DBLP DOI BibTeX RDF
13	David Neves, Ricardo Martins 0003, Nuno Lourenço 0003, Nuno Horta	Design automation tasks scheduling for enhanced parallel execution of a state-of-the-art layout-aware sizing approach.	DATE	2016	DBLP BibTeX RDF
13	Ricardo Martins 0003, António Canelas, Nuno Lourenço 0003, Nuno Horta	On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies.	SMACD	2016	DBLP DOI BibTeX RDF
13	Andre Ferreira, Nuno Lourenço 0003, Ricardo Martins 0003, Nuno Horta	Automated analog IC design constraints generation for a layout-aware sizing approach.	SMACD	2016	DBLP DOI BibTeX RDF
13	Jing Ye 0001, Yu Huang 0005, Yu Hu 0001, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li 0001, Wei-pin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles C. C. Liu, Sam Pan	Diagnosis and Layout Aware (DLA) Scan Chain Stitching.	IEEE Trans. Very Large Scale Integr. Syst.	2015	DBLP DOI BibTeX RDF
13	Sudip Roy 0001, Partha Pratim Chakrabarti, Srijan Kumar, Krishnendu Chakrabarty, Bhargab B. Bhattacharya	Layout-Aware Mixture Preparation of Biochemical Fluids on Application-Specific Digital Microfluidic Biochips.	ACM Trans. Design Autom. Electr. Syst.	2015	DBLP DOI BibTeX RDF
13	Ahmedullah Aziz, William Cane-Wissing, Moon Seok Kim, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta	Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective.	ISVLSI	2015	DBLP DOI BibTeX RDF
13	Marta Salas, Muhammad Wajahat Hussain, Alejo Concha, Luis Montano, Javier Civera 0001, J. M. M. Montiel	Layout aware visual tracking and mapping.	IROS	2015	DBLP DOI BibTeX RDF
13	Nuno Lourenço 0003, Ricardo Martins 0003, Nuno Horta	Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction.	DATE	2015	DBLP BibTeX RDF
13	Youngjae Kim 0001, Scott Atchley, Geoffroy Vallée, Galen M. Shipman	LADS: Optimizing Data Transfers Using Layout-Aware Data Scheduling.	FAST	2015	DBLP BibTeX RDF
13	Yuichi Tsujita, Atsushi Hori, Yutaka Ishikawa	Striping Layout Aware Data Aggregation for High Performance I/O on a Lustre File System.	ISC	2015	DBLP DOI BibTeX RDF