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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 863 occurrences of 527 keywords
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Results
Found 1128 publication records. Showing 1128 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
41 | Shigeaki Iwasa, Shung Ho Shing, Hisashi Mogi, Hiroshi Nozuwe, Hiroo Hayashi, Osamu Wakamori, Takashi Ohmizo, Kuninori Tanaka, Hiroshi Sakai, Mitsuo Saito |
SSM-MP: more scalability in shared-memory multi-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 558-563, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
SSM-MP, shared-memory multi-processor, cache refill latency, bus bottle neck problem, MTag, scalability, shared memory systems, cache coherency, memory architecture, multi-processor system |
39 | Minsu Choi, Nohpill Park, Fabrizio Lombardi |
Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Multi-Processor-Memory System, Field Reconfiguration, HW/SW Co-reliability, Modular Redundancy |
38 | Dongyoon Lee, Mahmoud Said, Satish Narayanasamy, Zijiang Yang 0006, Cristiano Pereira |
Offline symbolic analysis for multi-processor execution replay. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 564-575, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
multi-processor replay, shared-memory dependencies, SMT solver |
38 | Wolfgang Puffitsch |
Decoupled root scanning in multi-processor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 91-98, 2008, ACM. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
real-time, garbage collection, multi-processor |
34 | Hossein Pourreza, Peter Graham |
On the Programming Impact ofMulti-Core, Multi-Processor Nodes inMPI Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCS ![In: 21st Annual International Symposium on High Performance Computing Systems and Applications (HPCS 2007), 13-16 May 2007, Saskatoon, Saskatchewan, Canada, pp. 1, 2007, IEEE Computer Society, 978-0-7695-2813-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
32 | Giovanni Mariani, Aleksandar Brankovic, Gianluca Palermo, Jovana Jovic, Vittorio Zaccaria, Cristina Silvano |
A correlation-based design space exploration methodology for multi-processor systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 47th Design Automation Conference, DAC 2010, Anaheim, California, USA, July 13-18, 2010, pp. 120-125, 2010, ACM, 978-1-4503-0002-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
design space exploration, kriging, response surface, multi-processor systems-on-chip |
32 | Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, Omar Sattari, Michael A. Lai, Jeremy W. Webb, Eric W. Work, Tinoosh Mohsenin, Bevan M. Baas |
Architecture and Evaluation of an Asynchronous Array of Simple Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 53(3), pp. 243-259, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
programmable DSP, digital signal processing, DSP, multi-core, array processor, GALS, many-core, chip multi-processor, globally asynchronous locally synchronous |
32 | Tsutomu Nishimura, Takuji Miki, Hiroaki Sugiura 0003, Yuki Matsumoto, Masatsugu Kobayashi, Toshiyuki Kato, Tsutomu Eda, Hironori Yamauchi |
Configurable multi-processor architecture and its processor element design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 124-125, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Pierre G. Paulin, Chuck Pilkington, Michel Langevin, Essaid Bensoudane, Gabriela Nicolescu |
Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004, pp. 48-53, 2004, ACM, 1-58113-937-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
system-on-chip, embedded software, multi-processor systems |
29 | Pavel Krcál, Martin Stigge, Wang Yi 0001 |
Multi-processor Schedulability Analysis of Preemptive Real-Time Tasks with Variable Execution Times. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORMATS ![In: Formal Modeling and Analysis of Timed Systems, 5th International Conference, FORMATS 2007, Salzburg, Austria, October 3-5, 2007, Proceedings, pp. 274-289, 2007, Springer, 978-3-540-75453-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Guilin Chen, Guangyu Chen, Ozcan Ozturk 0001, Mahmut T. Kandemir |
Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 90-95, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Tai-Yi Huang, Yu-Che Tsai, Edward T.-H. Chu |
A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-10, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Dragomir Milojevic, Luc J. M. Montperrus, Diederik Verkest |
Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 57(2), pp. 139-153, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Multi-processor systems-on-chip (MPSoC), Real-time video encoding, AVC/H.264, Low-power VLSI implementation, decoding, Networks-on-chip (NoC) |
26 | Yadan Deng, Ning Jing, Wei Xiong 0010, Chen Luo, Hongsheng Chen |
Hash Join Optimization Based on Shared Cache Chip Multi-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DASFAA ![In: Database Systems for Advanced Applications, 14th International Conference, DASFAA 2009, Brisbane, Australia, April 21-23, 2009. Proceedings, pp. 293-307, 2009, Springer, 978-3-642-00886-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Radix-Join, Shared L2-Cache, Chip Multi-Processor, Cache Conflict |
26 | Jingui Huang, Jianer Chen, Songqiao Chen, Jianxin Wang 0001 |
A simple linear time approximation algorithm for multi-processor job scheduling on four processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comb. Optim. ![In: J. Comb. Optim. 13(1), pp. 33-45, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Multi-processor job scheduling, Approximation algorithm, NP-hard problem |
26 | Kevin T. Pedretti, Ron Brightwell, Joshua Williams |
Cplant? Runtime System Support for Multi-Processor and Heterogeneous Compute Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2002 IEEE International Conference on Cluster Computing (CLUSTER 2002), 23-26 September 2002, Chicago, IL, USA, pp. 207-214, 2002, IEEE Computer Society, 0-7695-1745-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
heterogeneous computing, runtime system, multi-processor, commodity cluster |
26 | Michiko Inoue, Sen Moriya, Toshimitsu Masuzawa, Hideo Fujiwara |
Optimal Wait-Free Clock Synchronisation Protocol on a Shared-Memory Multi-processor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WDAG ![In: Distributed Algorithms, 11th International Workshop, WDAG '97, Saarbrücken, Germany, September 24-26, 1997, Proceedings, pp. 290-304, 1997, Springer, 3-540-63575-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
shared-memory multi-processor system, napping fault, fault-tolerance, clock-synchronization, wait-freedom |
25 | Rodrigo P. Mendonça, Mario A. R. Dantas |
A Study of Adaptive Co-scheduling Approach for an Opportunistic Software Environment to Execute in Multi-core and Multi-Processor Configurations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE ![In: Proceedings of the 11th IEEE International Conference on Computational Science and Engineering, CSE 2008, São Paulo, SP, Brazil, July 16-18, 2008, pp. 41-47, 2008, IEEE Computer Society, 978-0-7695-3193-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-core, metacomputing, co-scheduling |
24 | Cheng Chang, Chien-Chung Chen, Yao-Liang Chen, Fu-Shin Huang |
Real-time scheduling in a programmable radar signal processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 4th International Workshop on Real-Time Computing Systems and Applications (RTCSA '97), 27-29 October 1997, Taipei, Taiwan, pp. 206-, 1997, IEEE Computer Society, 0-8186-8073-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
programmable radar signal processor, parallel multi-processor architecture, real-time scheduling algorithm, digital signal processing, real-time scheduling, processing speed, radar signal processing |
24 | Thomas Rauber, Gudula Rünger |
Library support for hierarchical multi-processor tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, USA, November 16-22, 2002, CD-ROM, pp. 5:1-5:10, 2002, IEEE Computer Society, 0-7695-1524-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hierarchical decomposition of processor sets, library support, mixed task and data parallelism, multilevel group SPMD, distributed memory, multiprocessor tasks |
22 | G. D. Nagendra, V. G. Prem Kumar, B. S. Sheshadri Chakravarthy |
Simulation bridge: a framework for multi-processor simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 49-54, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
simulation framework, instruction set simulator, multiprocessor simulation |
22 | Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. Das |
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the 14th international conference on World Wide Web, WWW 2005, Chiba, Japan, May 10-14, 2005, pp. 730-739, 2005, ACM, 1-59593-046-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
asynchronous multi-process event-driven, single event-driven process, symmetric multi-processor, system-on-chip, multi-thread, multi-process |
22 | Myunggwon Hwang, Dongjin Choi, Pankoo Kim |
Least Slack Time Rate First: New Scheduling Algorithm for Multi-Processor Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISIS ![In: CISIS 2010, The Fourth International Conference on Complex, Intelligent and Software Intensive Systems, Krakow, Poland, 15-18 February 2010, pp. 806-811, 2010, IEEE Computer Society, 978-0-7695-3967-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
multi-processor scheduling, least slack time rate, LSTR, scheduling algorithm, optimal scheduling |
22 | Chandra Chekuri, Ashish Goel, Sanjeev Khanna, Amit Kumar 0001 |
Multi-processor scheduling to minimize flow time with epsilon resource augmentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
STOC ![In: Proceedings of the 36th Annual ACM Symposium on Theory of Computing, Chicago, IL, USA, June 13-16, 2004, pp. 363-372, 2004, ACM, 1-58113-852-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multi-processor scheduling, load balancing, online algorithms, stretch, resource augmentation, flow time |
21 | Emiliano Dolif, Michele Lombardi 0001, Martino Ruggiero, Michela Milano, Luca Benini |
Communication-aware stochastic allocation and scheduling framework for conditional task graphs in multi-processor systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMSOFT ![In: Proceedings of the 7th ACM & IEEE International conference on Embedded software, EMSOFT 2007, September 30 - October 3, 2007, Salzburg, Austria, pp. 47-56, 2007, ACM, 978-1-59593-825-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
multimedia dataflow streaming, scheduling, allocation |
21 | Dakai Zhu 0001, Rami G. Melhem, Bruce R. Childers |
Scheduling with Dynamic Voltage/Speed Adjustment Using Slack Reclamation in Multi-Processor Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 22nd IEEE Real-Time Systems Symposium (RTSS 2001), London, UK, 2-6 December 2001, pp. 84-94, 2001, IEEE Computer Society, 0-7695-1420-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Hiroshi Yasui, Toshikazu Sakaguchi, Kohichi Kudo, Nobuyuki Hironishi |
Design of the Shared Memory System for Multi-Processor Lisp Machines and Its Implementation on the EVLIS Machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Parallel Lisp ![In: Parallel Lisp: Languages and Systems, US/Japan Workshop on Parallel Lisp, Sendai, Japan, June 5-8, 1989, Proceedings, pp. 348-352, 1989, Springer, 3-540-52782-6. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Hans G. Kerkhoff, Jarkko J. M. Huijts |
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, January 23-25, 2008, pp. 38-44, 2008, IEEE Computer Society, 978-0-7695-3110-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reconfigurable multi-processor-cores SoC, embedded system test, dependable SoCs, ATPG, Design-for-Test, self-repair |
20 | Bart D. Theelen, A. C. Verschueren |
Architecture Design of a Scalable Single-Chip Multi-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 132-139, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Yijun Liu, Banghai Wang, Guobo Xie, Pinghua Chen, Zhenkun Li |
Designing a Multi-Processor Education Board for High-Performance Embedded Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 2546-2551, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Guan Yu, Gauthier Lafruit, Peter Schelkens |
Platform-scalable Task Partition and Multilevel Buffering in Multi-processor Plessey Corner Detector. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), 10-13 July 2007, Bratislava, Slovak Republic, pp. 120-126, 2007, IEEE Computer Society, 978-0-7695-2902-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Satoshi Imai, Atsuki Inoue, Motoaki Matsumura, Kenichi Kawasaki, Atsuhiro Suga |
Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 541-546, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, Ingrid Verbauwhede |
Energy and Performance Analysis of Mapping Parallel Multithreaded Tasks for An On-Chip Multi-Processor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 102-104, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Sourav Ghosh, Ragunathan Rajkumar, Jeffery P. Hansen, John P. Lehoczky |
Scalable Resource Allocation for Multi-Processor QoS Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 23rd International Conference on Distributed Computing Systems (ICDCS 2003), 19-22 May 2003, Providence, RI, USA, pp. 174-183, 2003, IEEE Computer Society, 0-7695-1920-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Eryk Laskowski |
Fast Scheduling and Partitioning Algorithm in the Multi-processor System with Redundant Communication Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 4th International Conference, PPAM 2001 Naleczow, Poland, September 9-12, 2001, Revised Papers, pp. 97-106, 2001, Springer, 3-540-43792-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Seung-Min Lee, Jin-Hong Chung, Mike Myung-Ok Lee |
High-Speed and Low-Power Real-Time Programmable Video Multi-Processor for MPEG-2 Multimedia Chip on 0.6µm TLM CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 201-204, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
19 | Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu 0006 |
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 14-19, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
communication speed selection, communication/computation trade-offs, embedded multi-processor, low-power design, functional partitioning |
19 | Bilge Saglam Akgul, Jaehwan Lee 0002, Vincent John Mooney III |
A system-on-a-chip lock cache with task preemption support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2001 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2001, Atlanta, Georgia, USA, November 16-17, 2001, pp. 149-157, 2001, ACM, 1-58113-399-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
lock synchronization, multi-processor synchronization, SoC, shared memory, RTOS, preemption |
19 | Jair Jehuda, Gilad Koren, Daniel M. Berry |
A time-sharing architecture for complex real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), November 6-10, 1995, Fort Lauderdale, Florida, USA, pp. 9-16, 1995, IEEE Computer Society, 0-8186-7123-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
time-sharing systems, time-sharing architecture, dynamic multiple job systems, shared-memory multi-processor platforms, multiple states, near-optimal mode selection, reliable real-time time-sharing, job-oriented strategy, best-effort system values, dynamic critical task sets, complex task characteristics, real-time systems, resource allocation, shared memory systems, processor scheduling, portability, dynamic load-balancing, complex real-time systems, divide-and-conquer approach |
19 | Marko Bertogna, Michele Cirinei |
Response-Time Analysis for Globally Scheduled Symmetric Multiprocessor Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTSS ![In: Proceedings of the 28th IEEE Real-Time Systems Symposium (RTSS 2007), 3-6 December 2007, Tucson, Arizona, USA, pp. 149-160, 2007, IEEE Computer Society, 0-7695-3062-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Jie Yu 0016, Satish Narayanasamy |
A case for an interleaving constrained shared-memory multi-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 325-336, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, multiprocessors, software reliability, concurrency bugs |
18 | Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout |
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 876-881, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Duoduo Liao, Simon Y. Berkovich |
A conceptual system for parallel solid voxelization using multi-processor pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VRCAI ![In: Proceedings of the 7th International Conference on Virtual Reality Continuum and its Applications in Industry, VRCAI 2008, Singapore, December 8-9, 2008, 2008, ACM, 978-1-60558-335-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
18 | Xu Cheng |
Heterogeneous Multi-processor SoC: An Emerging Paradigm of Embedded System Design and Its Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 3, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane, Michel Langevin, Damien Lyonnard |
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 58-63, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Prasad Krishna Saravu |
Multi-processor Memory Scoreboard: A Multi-processor Memory Ordering and Data Consistency Checker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 7-14, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Kimish Patel, Enrico Macii, Massimo Poncino |
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 700-701, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Valentina Salapura |
Scaling up next generation supercomputers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008, pp. 1-2, 2008, ACM, 978-1-60558-077-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scalability of systems, chip multiprocessors (cmp), multicore, coherence protocols, blue gene |
17 | Claudia Kretzschmar, Christian Galke, Heinrich Theodor Vierhaus |
A Hierarchical Self Test Scheme for SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 37-44, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Jean-Pierre Dérutin, Lionel Damez, Alexis Landrault |
Embedding of a Real Time Image Stabilization Algorithm on SoPC Platform, a Chip Multi-processor Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIVS ![In: Advanced Concepts for Intelligent Vision Systems, 10th International Conference, ACIVS 2008, Juan-les-Pins, France, October 20-24, 2008. Proceedings, pp. 157-169, 2008, Springer, 978-3-540-88457-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Andriy Naborskyy, Richard M. Fujimoto |
Using Reversible Computation Techniques in a Parallel Optimistic Simulation of a Multi-Processor Computing System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PADS ![In: 21st International Workshop on Principles of Advanced and Distributed Simulation, PADS'07, San Diego, California, USA, June 12-15, 2007, pp. 179-188, 2007, IEEE Computer Society, 0-7695-2898-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Thomas Schlichter, Christian Haubelt, Frank Hannig, Jürgen Teich |
Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 9-14, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini |
xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 536-, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Sidney Cadot, Frits Kuijlman, Koen Langendoen, Kees van Reeuwijk, Henk J. Sips |
ENSEMBLE: A Communication Layer for Embedded Multi-Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES/OM ![In: Proceedings of The Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001), June 22-23, 2001 / The Workshop on Optimization of Middleware and Distributed Systems (OM 2001), June 18, 2001, Snowbird, Utah, USA, pp. 56-63, 2001, ACM, 1-58113-425-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Jian-Jia Chen, Chia-Mei Hung, Tei-Wei Kuo |
On the Minimization fo the Instantaneous Temperature for Periodic Real-Time Tasks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Real-Time and Embedded Technology and Applications Symposium ![In: Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2007, April 3-6, 2007, Bellevue, Washington, USA, pp. 236-248, 2007, IEEE Computer Society, 978-0-7695-2800-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Temperature-aware scheduling, Real-time systems, Dynamic voltage scaling |
17 | Thin-Fong Tsuei, Wayne Yamamoto |
Queuing Simulation Model for Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 36(2), pp. 58-64, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
17 | Marek Tudruj, Lukasz Masko |
Task Scheduling for Dynamically Configurable Multiple SMP Clusters Based on Extended DSC Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 4th International Conference, PPAM 2001 Naleczow, Poland, September 9-12, 2001, Revised Papers, pp. 115-124, 2001, Springer, 3-540-43792-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
17 | Brian M. Rogers, Anil Krishna, Gordon B. Bell, Ken V. Vu, Xiaowei Jiang, Yan Solihin |
Scaling the bandwidth wall: challenges in and avenues for CMP scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 371-382, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
analytical model, memory bandwidth, chip multi-processor |
17 | Mohammad Abdullah Al Faruque, Jörg Henkel |
QoS-supported On-chip Communication for Multi-processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(1), pp. 114-139, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
quality of services, Networks on chips, arbitration, multi-processor, service class |
17 | Marc Geilen, Twan Basten |
Requirements on the Execution of Kahn Process Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESOP ![In: Programming Languages and Systems, 12th European Symposium on Programming, ESOP 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings, pp. 319-334, 2003, Springer, 3-540-00886-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Kahn Principle, multi-processor architectures, streaming, signal processing, dynamic scheduling, media processing, Kahn process networks, deadlock resolution |
17 | Kam Hong Shum |
Fault tolerant cluster computing through replication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 11-13 December 1997, Seoul, Korea, Proceedings, pp. 756-, 1997, IEEE Computer Society, 0-8186-8227-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fault tolerant cluster computing, runtime overhead, fault tolerance schemes, checkpoint states, fault tolerant model, Fujitsu AP3000 multi-processor machine, performance evaluation, replication, workstation clusters, workstation cluster, fault recovery, resource consumption, program termination |
16 | Xuli Liu |
Exploiting Object-Based Parallelism on Multi-core Multi-processor Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Eighth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007), 3-6 December 2007, Adelaide, Australia, pp. 259-266, 2007, IEEE Computer Society, 0-7695-3049-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, Ingrid Verbauwhede |
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 15-18, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Natalino G. Busá, Ghiath Alkadi, Michael J. Verberne, Rafael Peset Llopis, Sethuraman Ramanatha |
RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany, pp. 159-165, 2002, IEEE Computer Society, 0-7695-1703-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Murali Annavaram, Ed Grochowski, John Paul Shen |
Mitigating Amdahl's Law through EPI Throttling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 298-309, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Yahya Jan, Lech Józwiak |
Processor architecture exploration and synthesis of massively parallel multi-processor accelerators in application to LDPC decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 38(2), pp. 152-169, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Bill Penner |
Multi-processor debug in SoC and processor designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, April 22-24, 2013, pp. 1, 2013, IEEE, 978-1-4673-4435-7. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Mohammad Mahdi Jaghoori |
From nonpreemptive to preemptive scheduling: from single-processor to multi-processor? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 2011 ACM Symposium on Applied Computing (SAC), TaiChung, Taiwan, March 21 - 24, 2011, pp. 717-722, 2011, ACM, 978-1-4503-0113-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
16 | Andreas Wieferink |
Retargetable processor system integration into multi-processor system on chip platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2008 |
RDF |
|
16 | Koichi Kashiwagi, Yoshinobu Higami, Shin-ya Kobayashi |
A Consideration of Processor Utilization on Multi-Processor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Advances in Information Processing and Protection ![In: Advances in Information Processing and Protection., pp. 383-390, 2007, Springer, 978-0-387-73136-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Arun Vijayaraghavan, M. Kannan, R. Seshasayanan |
Simulation Analysis of Low Power Synchronous Token Ring Based VLIW processor under GALS Multi-processor technology with improved efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CDES ![In: Proceedings of the 2005 International Conference on Computer Design, CDES 2005, Las Vegas, Nevada, USA, June 27-30, 2005, pp. 143-152, 2005, CSREA Press, 1-932415-54-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
16 | Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl |
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1256-1263, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Shunichiro Nakamura, Toshimune Kawanishi, Sunao Tanimoto, Yohtaro Miyanishi, Seiichi Saito |
Improved Processor Synchronization for Multi-processor Traffic Simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsiaSim ![In: Systems Modeling and Simulation: Theory and Applications, Third Asian Simulation Conference, AsiaSim 2004, Jeju Island, Korea, October 4-6, 2004, Revised Selected Papers, pp. 386-391, 2004, Springer, 3-540-24477-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Guichang Zhong, Fan Xu, Alan N. Willson Jr. |
An energy-efficient reconfigurable FFT/IFFT processor based on a multi-processor ring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUSIPCO ![In: 2004 12th European Signal Processing Conference, Vienna, Austria, September 6-10, 2004, pp. 2023-2026, 2004, IEEE, 978-320-0001-65-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
16 | Ken-ichiro Murakami |
A Pseudo Network Approach to Inter-processor Communication on a Shared-memory Multi-processor MacELIS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Parallel Lisp ![In: Parallel Lisp: Languages and Systems, US/Japan Workshop on Parallel Lisp, Sendai, Japan, June 5-8, 1989, Proceedings, pp. 300-305, 1989, Springer, 3-540-52782-6. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
16 | Giovanni Beltrame, Luca Fossati, Donatella Sciuto |
Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 7-12, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
ReSP, Operating System, Emulation, OpenMP, MPSoC, codesign |
16 | Pierre G. Paulin |
Automatic Mapping of Parallel Applications onto Multi-Processor Platforms: A Multimedia Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 2-4, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi |
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings, pp. 88-97, 2009, Springer, 978-3-642-03137-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Bassam Jamil Mohd, Earl E. Swartzlander Jr. |
A Power-Scalable Switch-Based Multi-processor FFT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA, pp. 114-120, 2009, IEEE Computer Society, 978-0-7695-3732-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Jun Wang, Hongbo Zeng, Kun Huang, Ge Zhang 0007, Yan Tang |
Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 792-795, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Jiulong Shan, Yurong Chen 0001, Qian Diao, Yimin Zhang 0002 |
Parallel Information Extraction on Shared Memory Multi-processor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2006 International Conference on Parallel Processing (ICPP 2006), 14-18 August 2006, Columbus, Ohio, USA, pp. 311-318, 2006, IEEE Computer Society, 0-7695-2636-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Chitra Natarajan, Bruce Christenson, Faye A. Briggs |
A study of performance impact of memory controller features in multi-processor server environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WMPI ![In: Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction with the 31st International Symposium on Computer Architecture 2004, Munich, Germany, June 20, 2004, pp. 80-87, 2004, ACM, 1-59593-040-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
memory transaction scheduling, server systems, multi-processors, memory controller, memory subsystem, performance impact |
15 | Noel Eisley, Vassos Soteriou, Li-Shiuan Peh |
High-level power analysis for multi-core chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2006 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2006, Seoul, Korea, October 22-25, 2006, pp. 389-400, 2006, ACM, 1-59593-543-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
simulation, chip multiprocessor (CMP), multi-core, power analysis, system-on-a-chip (SoC) |
15 | Hakduran Koc, Mahmut T. Kandemir, Ehat Ercanli, Ozcan Ozturk 0001 |
Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 224-229, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Peter J. Vidler, Michael J. Pont |
Computer Assisted Source-Code Parallelisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (5) ![In: Computational Science and Its Applications - ICCSA 2006, International Conference, Glasgow, UK, May 8-11, 2006, Proceedings, Part V, pp. 22-31, 2006, Springer, 3-540-34079-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Zhiyi Yu, Bevan M. Baas |
Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 378-383, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
14 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt |
Methodology for multi-granularity embedded processor power model generation for an ESL design flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 255-260, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
system-on-chip, embedded processor, power modeling, esl |
14 | Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasaki, Tetsu Hosoki, Masaya Sumita |
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 649-653, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
14 | M. Chastain, G. Gostin, James E. Mankovich, Steven J. Wallach |
The convex C240 architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings Supercomputing '88, Orlando, FL, USA, November 12-17, 1988, pp. 321-329, 1988, IEEE Computer Society, 0-8186-0882-X. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
13 | Ilya Wagner, Valeria Bertacco |
MCjammer: Adaptive Verification for Multi-core Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 670-675, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Caixia Liu, Jiaxin Li, Hongli Zhang, Qi Zuo |
HHMA: A Hierarchical Hybrid Memory Architecture Sharing Multi-Port Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 1320-1325, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Vijaykumar Ramamurthi, Jason McCollum, Christopher Ostler, Karam S. Chatha |
System Level Methodology for Programming CMP Based Multi-Threaded Network Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA, pp. 110-116, 2005, IEEE Computer Society, 0-7695-2365-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Tong Chen 0001, Tao Zhang |
Supporting OpenMP on Cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWOMP ![In: A Practical Programming Model for the Multi-Core Era, 3rd International Workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007, Proceedings, pp. 65-76, 2007, Springer, 978-3-540-69302-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Seng Lin Shee, Sri Parameswaran |
Design Methodology for Pipelined Heterogeneous Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 811-816, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Joël Rossier, Yann Thoma, Pierre-André Mudry, Gianluca Tempesti |
MOVE Processors That Self-replicate and Differentiate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioADIT ![In: Biologically Inspired Approaches to Advanced Information Technology, Second International Workshop, BioADIT 2006, Osaka, Japan, January 26-27, 2006, Proceedings, pp. 160-175, 2006, Springer, 3-540-31253-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Andreas Hansson 0001, Kees Goossens, Marco Bekooij, Jos Huisken |
CoMPSoC: A template for composable and predictable multi-processor system on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 14(1), pp. 2:1-2:24, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
predictable, system on chip, network on chip, model of computation, Composable |
13 | Miroslav Manik, Elena Gramatová |
Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 144-145, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Sudeep Pasricha, Nikil D. Dutt |
ORB: An on-chip optical ring bus communication architecture for multi-processor systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 789-794, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Sushu Zhang, Karam S. Chatha |
Automated techniques for energy efficient scheduling on homogeneous and heterogeneous chip multi-processor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 61-66, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
13 | Jung-Ho Lee, Sung-Rok Yoon, Kwang-Eui Pyun, Sin-Chong Park |
A Multi-Processor NoC platform applied on the 802.11i TKIP cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 607-610, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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