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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 23 occurrences of 21 keywords
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Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
58 | Chia-Long Wu, Der-Chyuan Lou, Te-Jen Chang |
An efficient Montgomery exponentiation algorithm for public-key cryptosystems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISI ![In: IEEE International Conference on Intelligence and Security Informatics, ISI 2008, Taipei, Taiwan, June 17-20, 2008, Proceedings, pp. 284-285, 2008, IEEE, 978-1-4244-2414-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
58 | Ali Jalali, Hamid Sarbazi-Azad |
The Edge Product of Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDCAT ![In: Eighth International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007), 3-6 December 2007, Adelaide, Australia, pp. 371-375, 2007, IEEE Computer Society, 0-7695-3049-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
53 | Chin-Chen Chang 0001, Ying-Tse Kuo, Chu-Hsing Lin |
Fast Algorithms for Common-Multiplicand Multiplication and Exponentiation by Performing Complements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 17th International Conference on Advanced Information Networking and Applications (AINA'03), March 27-29, 2003, Xi'an, China, pp. 807-811, 2003, IEEE Computer Society, 0-7695-1906-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
38 | Marcelo E. Kaihara, Naofumi Takagi |
Bipartite Modular Multiplication Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(2), pp. 157-164, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Algorithms, Computer arithmetic |
38 | Mark A. Erle, Michael J. Schulte |
Decimal Multiplication Via Carry-Save Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 14th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2003), 24-26 June 2003, The Hague, The Netherlands, pp. 348-, 2003, IEEE Computer Society, 0-7695-1992-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Louis P. Rubinfield |
A Proof of the Modified Booth's Algorithm for Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 24(10), pp. 1014-1015, 1975. The full citation details ...](Pics/full.jpeg) |
1975 |
DBLP DOI BibTeX RDF |
Modified Booth's algorithm, multiplicand, multiplier, partial product |
34 | Jungjoo Seo, Kunsoo Park |
Fast batch modular exponentiation with common-multiplicand multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Process. Lett. ![In: Inf. Process. Lett. 129, pp. 5-10, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
34 | Da-Zhi Sun, Jin-Peng Huai, Zhen-Fu Cao |
A comment on "An efficient common-multiplicand-multiplication method to the Montgomery algorithm for speeding up exponentiation". ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Sci. ![In: Inf. Sci. 223, pp. 331-334, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
34 | Tao Wu, Shuguo Li, Litian Liu |
Fast, compact and symmetric modular exponentiation architecture by common-multiplicand Montgomery modular multiplications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 46(4), pp. 323-332, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
34 | Abdalhossein Rezai, Parviz Keshavarzi |
High-performance modular exponentiation algorithm by using a new modified modular multiplication algorithm and common-multiplicand-multiplication method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WorldCIS ![In: 2011 World Congress on Internet Security, WorldCIS 2011, London, UK, February 21-23, 2011, pp. 192-197, 2011, IEEE, 978-1-4244-8879-7. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
34 | Chia-Long Wu |
An efficient common-multiplicand-multiplication method to the Montgomery algorithm for speeding up exponentiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Sci. ![In: Inf. Sci. 179(4), pp. 410-421, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Chia-Long Wu |
Fast exponentiation based on common-multiplicand-multiplication and minimal-signed-digit techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Math. ![In: Int. J. Comput. Math. 84(10), pp. 1405-1415, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Sung-Ming Yen, Wei-Chih Lien, Sang-Jae Moon |
Inefficiency of common-multiplicand multiplication and exponentiation algorithms by performing binary complements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Math. Comput. ![In: Appl. Math. Comput. 189(1), pp. 285-290, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Der-Chyuan Lou, Chia-Long Wu |
Parallel exponentiation using common-multiplicand-multiplication and signed-digit-folding techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Math. ![In: Int. J. Comput. Math. 81(10), pp. 1187-1202, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | JaeCheol Ha, Sang-Jae Moon |
A Common-Multiplicand Method to the Montgomery Algorithm for Speeding up Exponentiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Process. Lett. ![In: Inf. Process. Lett. 66(2), pp. 105-107, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
19 | Chia-Long Wu |
Fast Parallel Montgomery Binary Exponentiation Algorithm Using Canonical- Signed-Digit Recoding Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 9th International Conference, ICA3PP 2009, Taipei, Taiwan, June 8-11, 2009. Proceedings, pp. 428-438, 2009, Springer, 978-3-642-03094-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Montgomery reduction algorithm, cryptography, complexity analysis, number theory, algorithm design |
19 | Anding Wang, Yier Jin, Shiju Li |
Dual-Residue Montgomery Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NPC ![In: Network and Parallel Computing, IFIP International Conference, NPC 2007, Dalian, China, September 18-21, 2007, Proceedings, pp. 267-276, 2007, Springer, 978-3-540-74783-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Dual residue system, Montgomery algorithm, Parallelism |
19 | Rui Rodrigues 0004, João M. P. Cardoso, Pedro C. Diniz |
A Data-Driven Approach for Pipelining Sequences of Data-Dependent Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 219-228, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Ronen Goldberg, Guy Even, Peter-Michael Seidel |
An FPGA implementation of pipelined multiplicative division with IEEE Rounding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007, 23-25 April 2007, Napa, California, USA, pp. 185-196, 2007, IEEE Computer Society, 0-7695-2940-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rahul M. Badghare, Rajendra M. Patrikar |
FPGA Implementation of Low Power Parallel Multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 115-120, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Jun-Cheol Jeon, Kee-Won Kim, Jai-Boo Oh, Kee-Young Yoo |
Modular Divider for Elliptic Curve Cryptographic Hardware Based on Programmable CA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (4) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part IV, pp. 661-668, 2006, Springer, 3-540-34385-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Jun-Cheol Jeon, Kee-Won Kim, Byung-Heon Kang, Kee-Young Yoo |
Cellular Automata Architecture for Elliptic Curve Cryptographic Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (3) ![In: Computational Science - ICCS 2006, 6th International Conference, Reading, UK, May 28-31, 2006, Proceedings, Part III, pp. 329-336, 2006, Springer, 3-540-34383-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu, Chia-Jen Sheu |
Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 594-597, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Peter-Michael Seidel, Lee D. McFearin, David W. Matula |
Secondary Radix Recodings for Higher Radix Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(2), pp. 111-123, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
recoding, high radix, digit set, mixed radix representation, partial product reduction, Booth recoding, Binary multiplication |
19 | Jun-Cheol Jeon, Kee-Won Kim, Kee-Young Yoo |
Evolutionary Hardware Architecture for Division in Elliptic Curve Cryptosystems over GF(2n). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC (3) ![In: Advances in Natural Computation, First International Conference, ICNC 2005, Changsha, China, August 27-29, 2005, Proceedings, Part III, pp. 348-355, 2005, Springer, 3-540-28320-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
19 | David Guevorkian, Petri Liuha, Aki Launiainen, Ville Lappalainen |
A Family of Accelerators for Matrix-Vector Arithmetics Based on High-Radix Multiplier Structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings, pp. 118-127, 2004, Springer, 3-540-22377-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Kyo-Min Ku, Kyeoung Ju Ha, Wi Hyun Yoo, Kee-Young Yoo |
Parallel Montgomery Multiplication and Squaring over GF(2m) Based on Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (4) ![In: Computational Science and Its Applications - ICCSA 2004, International Conference, Assisi, Italy, May 14-17, 2004, Proceedings, Part IV, pp. 196-205, 2004, Springer, 3-540-22060-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Hao-Yung Lo, Hsiu-Feng Lin, Chichyang Chen, Jenshiuh Liu, Chia-Cheng Liu |
Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(3), pp. 245-269, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
generator, BIST, computer arithmetic, polynomials, VLSI design, multiplication, division |
19 | Alexander Taubin, Karl Fant, John McCardle |
Design of Delay-Insensitive Three Dimension Pipeline Array Multiplier for Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 104-111, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
19 | Peter-Michael Seidel, Lee D. McFearin, David W. Matula |
Binary Multiplication Radix-32 and Radix-256. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA, pp. 23-32, 2001, IEEE Computer Society, 0-7695-1150-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
19 | Takahiro Miomo, Koichi Yasuoka, Masanori Kanazawa |
The Fastest Multiplier on FPGAs with Redundant Binary Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 515-524, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
19 | Menghui Zheng, Alexander Albicki |
Low power and high speed multiplication design through mixed number representations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 566-576, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high speed multiplication, mixed number representations, low power multiplication, reduced switching, Sign-Magnitude, Redundant Binary adder, Booth decoder, Carry-Propagation-Free, digital arithmetic, VLSI architecture, redundant number systems, Partial Products |
19 | Todd C. Marek |
A new simulator workbench for comparing SIMD processing element architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Southeast Regional Conference ![In: Proceedings of the 30th Annual Southeast Regional Conference, 1992, Raleigh, North Carolina, USA, April 8-10, 1992, pp. 320-327, 1992, ACM, 0-89791-506-2. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
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