Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
90 | George Jie Yuan, Nabil H. Farhat |
A compensation-based optimization methodology for gain-boosted opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 669-672, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
82 | Vincent S. L. Cheung, Howard C. Luong, Mansun Chan |
A 0.9-V 0.2-μW CMOS single-opamp-based switched-opamp ΣΔ modulator for pacemaker applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 185-188, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
78 | M. Ali-Bakhshian, K. Sadeghi |
A novel continuous-time common-mode feedback for low-voltage switched-OPAMP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 296-300, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
CMFB, delta-sigma, switched-OPAMP, low-voltage, continuous-time |
76 | Teemu Salo, Saska Lindfors, Kari Halonen |
A low-voltage single-Opamp 4th-order band-pass Sigma-Delta-modulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 352-355, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
70 | Nagendra Krishnapura, Shanthi Pavan |
Negative Feedback System and Circuit Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 35-36, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
62 | Edward K. F. Lee, Anthony Lam, Taihu Li |
A 0.65V rail-to-rail constant gm opamp for biomedical applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2721-2724, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
62 | Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins |
A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Tahereh Kahookar Toosi, Ehsan Zhian Tabasy, Hassan Sarbishaei, Reza Lotfi |
ISECAD: an iterative simulation-equation-based opamp-design CAD tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
56 | Mohammad Taherzadeh-Sani, Anas A. Hamoui |
Digital background calibration of interstage-gain and capacitor-mismatch errors in pipelined ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
56 | Amorn Jiraseree-amornkun, Apisak Worapishet, Eric A. M. Klumperink, Bram Nauta, Wanlop Surakampontorn |
Slew rate induced distortion in switched-resistor integrators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
48 | Weixun Yan, Robert Kolm, Horst Zimmermann |
A low-voltage low-power fully differential rail-to-rail input/output opamp in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2274-2277, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
48 | Amal Kumar Kundu, Subho Chatterjee, Tarun Kanti Bhattacharyya |
A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 311-316, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
48 | Anas A. Hamoui, T. Alhajj, Mohammad Taherzadeh-Sani |
Behavioral modeling of Opamp gain and dynamic effectsfor power optimization of Delta-Sigma modulators and pipelined ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 330-333, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
sigma-delta (??) modulation, synthesis, behavioral modeling, discrete-time systems, analog-to-digital conversion |
48 | Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins |
A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1581-1584, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
48 | Bjørnar Hernes, Øystein Moldsvor, Trond Sæther |
A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 216-219, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
45 | Ram Suryanarayan, Anubhav Gupta, Travis N. Blalock |
A slew rate enhancement technique for operational amplifiers based on a tunable active Gm-based capacitance multiplication circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 273-276, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
opamp, feedback, CMOS, compensation, operational amplifier, slew rate |
42 | Edward K. Lee 0002, Eusebiu Matei, Ravi S. Ananth |
A 0.9 V rail-to-rail constant gm amplifier for implantable biomedical applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
42 | Drazen Jurisic, Neven Mijat, George S. Moschytz |
Low-sensitivity active-RC filters using impedance tapering of symmetrical bridged-T and twin-T networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 808-811, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
42 | Volney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider |
A low-voltage CMOS class-AB operational amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 603-606, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | Jipeng Li, Un-Ku Moon |
High-speed pipelined A/D converter using time-shifted CDS technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 909-912, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
42 | José Vicente Calvano, Vladimir Castro Alves, Marcelo Lubaszewski |
Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 96-, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
PWM circuit, compact test vectors, analog VLSI technology, functional fault macromodels, compact test vector construction, open loop gain, CMMR, analog circuit simulation complexity, VLSI, integrated circuit testing, design for testability, automatic test pattern generation, fault modeling, fault simulation, fault simulation, operational amplifiers, operational amplifiers, test pattern, functional fault models, analogue circuits, fault dictionary, pulse width modulation, slew-rate |
39 | Kai Xing, Wei Wang 0177, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins |
A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 69(1), pp. 64-74, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
39 | Kai Xing, Wei Wang 0177, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins |
A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SAB-ELD-Merged Integrator and 3-Stage Opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-9942-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
39 | Benjamin P. Hershberg, Skyler Weaver, Un-Ku Moon |
A 1.4V signal swing hybrid CLS-opamp/ZCBC pipelined ADC using a 300mV output swing opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010, pp. 302-303, 2010, IEEE, 978-1-4244-6033-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
39 | Hsin-Hung Ou, Bin-Da Liu |
A 1-v 9-bit, 2.5-Msample/s pipelined ADC with merged switched-opamp and opamp-sharing techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1972-1975, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner |
Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 688-693, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Jen-Shiun Chiang, Hsueh-Ping Chen, Cheng-Ming Ying |
A 1V 0.54µW fourth order switched capacitor filter with switched opamp technique for cardiac pacemaker sensing channel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 481-484, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Chon-In Lao, Ho-leng Leong, Kuoi-Fok Au, Kuok-Hang Mok, Seng-Pan U., Rui Paulo Martins |
A 10.7-MHz bandpass sigma-delta modulator using double-delay single-opamp SC resonator with double-sampling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 1061-1064, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | José Vicente Calvano, Antonio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Lubaszewski |
Fault Models and Test Generation for OpAmp Circuits - The FFM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 121-138, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
test generation, fault model, analog test, operational amplifiers |
34 | Vijay Rentala, Saroj Rout, Edward Lee, Robert J. Weber |
A constant GM rail-to-rail opamp with a novel input stage for BiCMOS process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 224-227, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Samiran DasGupta, Pradip Mandal |
An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Sub-micron Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010, pp. 294-299, 2010, IEEE Computer Society, 978-0-7695-3928-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
opamp, submicron sizing, design automation, geometric program |
28 | Ying Wei 0002, Alex Doboli |
Structural Macromodeling of Analog Circuits Through Model Decoupling and Transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(4), pp. 712-725, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
28 | Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto |
A 600mV 3.6mW 68dB DR 4th Order Analog Base Band Filter for WLAN Receivers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 3542-3545, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
28 | Mohammad Maymandi-Nejad, Manoj Sachdev |
DTMOS Technique for Low-Voltage Analog Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 14(10), pp. 1151-1156, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Shu-Chuan Huang, Min-Hsiung Liao, Chih-Sheng Hsu |
A low-distortion fourth-order bandpass delta-sigma modulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Peter R. Kinget, Aurel A. Lazar, László T. Tóth |
On the robustness of an analog VLSI implementation of a time encoding machine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4221-4224, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Joan Font, J. Ginard, Rodrigo Picos, Eugeni Isern 0001, Jaume Segura 0001, Miquel Roca 0001, Eugenio García |
A BICS for CMOS OpAmps by Monitoring the Supply Current Peak. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(5), pp. 597-603, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
oscillation test, analog test, Built-In Current Sensor, current test |
28 | Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei |
A low-power design methodology for high-resolution pipelined analog-to-digital converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 334-339, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
low-power design, operational amplifiers, pipelined analog-to-digital converters |
28 | Varun Aggarwal |
Evolving Sinusoidal Oscillators Using Genetic Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 5th NASA / DoD Workshop on Evolvable Hardware (EH 2003), 9-11 July 2002, Chicago, IL, USA, pp. 67-76, 2003, IEEE Computer Society, 0-7695-1977-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Joan Font, J. Ginard, Eugeni Isern 0001, Miquel Roca 0001, Jaume Segura 0001, Eugenio García |
A BICS for CMOS Opamps by Monitoring the Supply Current Peak. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 94-98, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
28 | Adrian Maxim, Danielle Andreu, Marc Cousineau, Jacques Boucher |
A novel SPICE behavioral macromodel of operational amplifiers including a high accuracy description of frequency characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 278-281, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Chen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta 0001 |
Fault macromodeling and a testing strategy for opamps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(3), pp. 225-235, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
catastrophic fault model, operational amplifier design for testability, analog test, macromodeling, parametric faults |
28 | Mehrdad Negahban, Daniel Gajski |
Silicon compilation of switched: capacitor networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 164-168, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
20 | P. V. Ananda Mohan |
New Generalized Impedance Converter (GIC)-Based Two-Opamp Active RC Biquads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Circuits Syst. Signal Process. ![In: Circuits Syst. Signal Process. 43(3), pp. 1366-1390, March 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Sukju Yun, Jaegeun Cho, Sengjun Jo, In-Chul Hwang, Youngjin Kim, Seongheon Jeong, Jungeun Lee, Sanghoon Lee, Keontae Kim, Seungyup Yoo, Sangwoo Han, Kuduck Kwon |
A 2.4/5 GHz Dual-Band Low-Noise and Highly Linear Receiver With a New Power-Efficient Feedforward OPAMP for WiFi-6 Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 137264-137273, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Sayan Banerjee, Ankesh Jain |
Modified Gm-Free Assisted Opamp Technique in Continuous Time Delta Sigma Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2023, Hyderabad, India, November 19-22, 2023, pp. 154-158, 2023, IEEE, 979-8-3503-8119-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Shuenn-Yuh Lee, Hao-Yun Lee, Chia-Ho Kung, Po-Han Su, Ju-Yi Chen |
A 0.8-μW and 74-dB High-Pass Sigma-Delta Modulator With OPAMP Sharing and Noise-Coupling Techniques for Biomedical Signal Acquisition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Biomed. Circuits Syst. ![In: IEEE Trans. Biomed. Circuits Syst. 16(5), pp. 742-751, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | António Gusmão 0001, Ricardo Póvoa, Nuno Horta, Nuno Lourenço 0003, Ricardo Martins 0003 |
DeepPlacer: A custom integrated OpAmp placement tool using deep models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Soft Comput. ![In: Appl. Soft Comput. 115, pp. 108188, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Salvatore Pennisi, Francesco Pulvirenti, Katia Samperi |
Frequency Compensation Scheme for a Full GaN OpAmp driving 1-nF load. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 2042-2046, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Ömer T. Keles, Metin Yazgi |
Design of an Opamp-RC Lowpass Filter in 22nm FDSOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIU ![In: 30th Signal Processing and Communications Applications Conference, SIU 2022, Safranbolu, Turkey, May 15-18, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-5092-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Maged ElAnsary, Jianxiong Xu, José B. Sales Filho, Gairik Dutta, Liam Long, Camilo Tejeiro, Aly Shoukry, Chenxi Tang, Enver Kilinc, Jaimin Joshi, Parisa Sabetian, Samantha Unger, José Zariffa, Paul B. Yoo, Roman Genov |
Bidirectional Peripheral Nerve Interface With 64 Second-Order Opamp-Less ΔΣ ADCs and Fully Integrated Wireless Power/Data Transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(11), pp. 3247-3262, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Anoop Narayan Bhat, Ronan A. R. van der Zee, Bram Nauta |
A Baseband-Matching-Resistor Noise-Canceling Receiver With a Three-Stage Inverter-Only OpAmp for High In-Band IIP3 and Wide IF Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(7), pp. 1994-2006, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Mohammad Reza Pazhouhandeh, Hossein Kassiri, Aly Shoukry, Iliya Weisspapir, Peter L. Carlen, Roman Genov |
Opamp-Less Sub-μW/Channel Δ-Modulated Neural-ADC With Super-GΩ Input Impedance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 56(5), pp. 1565-1575, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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20 | Shih-Che Kuo, Jia-Sheng Huang, Yu-Cheng Huang, Chia-Wei Kao, Che-Wei Hsu, Chia-Hung Chen |
A Multi-Step Incremental Analog-to-Digital Converter With a Single Opamp and Two- Capacitor SAR Extended Counting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 68(7), pp. 2890-2899, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Mohsen Padash, Mostafa Yargholi, Maryam Shojaei Baghini |
An Opamp-Less PVT Compensation Structure for Ramp Generator Circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 30(2), pp. 2150032:1-2150032:14, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Toprak Kayanselçuk, Ertan Zencir |
Ultra-Wide Bandwidth Fully Differential CMOS Opamp with a Novel Bandwidth Extension Technique for SoC Active Filter Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 30(12), pp. 2150226:1-2150226:19, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Fernando Cardes, Nikhita Baladari, Jihyun Lee, Andreas Hierlemann |
A Low-Power Opamp-Less Second-Order Delta-Sigma Modulator for Bioelectrical Signals in 0.18 µm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 21(19), pp. 6456, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Johannes Wagner 0003, Takashi Miki, Maurits Ortmanns |
Compensation of Finite GBW in CT Bandpass SDMs based on Single-OpAmp Resonators with Positive-Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021, pp. 284-287, 2021, IEEE, 978-1-6654-2461-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Mohamed A. Mokhtar, Martin Merkle, John G. Kauffman, Maurits Ortmanns |
A Comparative Study of Noise Behavior in Single-Opamp Resonators in Delta-Sigma Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 28th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2021, Dubai, United Arab Emirates, November 28 - Dec. 1, 2021, pp. 1-4, 2021, IEEE, 978-1-7281-8281-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
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20 | Maged ElAnsary, Jianxiong Xu, José B. Sales Filho, Gairik Dutta, Liam Long, Aly Shoukry, Camilo Tejeiro, Chenxi Tang, Enver Kilinc, Jaimin Joshi, Parisa Sabetian, Samantha Unger, José Zariffa, Paul B. Yoo, Roman Genov |
28.8 Multi-Modal Peripheral Nerve Active Probe and Microstimulator with On-Chip Dual-Coil Power/Data Transmission and 64 2nd-Order Opamp-Less ΔΣ ADCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2021, San Francisco, CA, USA, February 13-22, 2021, pp. 400-402, 2021, IEEE, 978-1-7281-9549-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Maged ElAnsary, Nima Soltani, Hossein Kassiri, Ruben Machado, Suzie Dufour, Peter L. Carlen, Michael Thompson, Roman Genov |
50nW Opamp-Less ΔΣ-Modulated Bioimpedance Spectrum Analyzer for Electrochemical Brain Interfacing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(7), pp. 1971-1983, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Guoyong Shi |
Automatic Stage-form Circuit Reduction for Multistage Opamp Design Equation Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 25(1), pp. 2:1-2:26, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Susie Kim, Cyuyeol Rhee, Suhwan Kim |
A Wide Dynamic Range Multi-Mode Band-Pass Continuous-Time Delta-Sigma Modulator Employing Single-Opamp Resonator With Positive Resistor-Feedback. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(2), pp. 235-239, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Alexander Meyer, Ralf Wunderlich, Stefan Heinen |
Analysis of Opamp Non-Idealities in Quadrature Bandpass Sigma-Delta Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 27th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2020, Glasgow, Scotland, UK, November 23-25, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-6044-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy |
A two-stage opamp frequency Compensation technique by splitting the 2nd stage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 11th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2020, Kharagpur, India, July 1-3, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-6851-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Sung-En Hsieh, Chih-Cheng Hsieh |
A 0.4-V 13-bit 270-kS/s SAR-ISDM ADC With Opamp-Less Time-Domain Integrator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(6), pp. 1648-1656, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Tsung-Chih Hung, Tai-Haur Kuo |
A 75.3-dB SNDR 24-MS/s Ring Amplifier-Based Pipelined ADC Using Averaging Correlated Level Shifting and Reference Swapping for Reducing Errors From Finite Opamp Gain and Capacitor Mismatch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(5), pp. 1425-1435, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Bilal Yassine, Saddam Zourob, Sumathi Raparthy, Nabil Yassine |
A Start-up Assisted Fully Differential Folded Cascode Opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 28(10), pp. 1950164:1-1950164:12, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Jingyu Wang 0003, Yongyuan Li, Zhangming Zhu |
A 0.6-V pseudo-differential OTA with switched-opamp technique for low power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 90, pp. 117-122, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Mahmoud Sadollahi, Gabor C. Temes |
A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9), pp. 3384-3392, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Jiye Lim, Jintae Kim |
A 20-kHz~16-MHz Programmable-Bandwidth 4th Order Active Filter Using Gain-Boosted Opamp With Negative Resistance in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 66-II(2), pp. 182-186, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Shuai Li, Jianguo Diao, Yimin Wu, Fan Ye 0001, Junyan Ren |
A 20MHz Bandwidth Band-Pass Noise-Shaping SAR ADC With OPAMP Sharing Switched-Capacitor Filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019, pp. 109-112, 2019, IEEE, 978-1-7281-2788-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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20 | Vikas Aggarwal, Ritabrata Bhattacharya, Ashish Gupta, Taranjit Kukal, Sankaran Aniruddhan |
A 1.1V 1.3GHz 4th order filter with feedforward miller compensation OPAMP for 5G applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, Dallas, TX, USA, August 4-7, 2019, pp. 925-928, 2019, IEEE, 978-1-7281-2788-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Bakr Hesham, El-Sayed A. M. Hasaneen, Hesham F. A. Hamed |
Design Procedure for Two-Stage CMOS Opamp using gm/ID design Methodology in 16 nm FinFET Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICM ![In: 31st International Conference on Microelectronics, ICM 2019, Cairo, Egypt, December 15-18, 2019, pp. 325-329, 2019, IEEE, 978-1-7281-4058-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Nobukazu Takai, Masafumi Fukuda, Masahiro Saruta |
Self-improvement of OPAmp parameters using Q-Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMACD ![In: 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, July 15-18, 2019, pp. 293-296, 2019, IEEE, 978-1-7281-1201-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Yohsuke Shiiki, Hiroki Ishikuro |
Interface with Opamp Output-Impedance Calibration Technique for a Large Integrated 2-D Resistive Sensor Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Ahmed ElShater, Calvin Y. Lee, Praveen Kumar Venkatachala, Mohamed Dessouky, Un-Ku Moon |
Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Wieslaw Kuzmicz |
A Simple Ultra-Low Power Opamp in 22 nm FDSOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 26th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2019, Rzeszów, Poland, June 27-29, 2019, pp. 167-170, 2019, IEEE, 978-83-63578-16-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Yohsuke Shiiki, Hiroki Ishikuro |
A High Accuracy Opamp-less Interface Circuit for 2-D Cross-Point Resistive Sensor Array with Switch Resistance Calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: 2019 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2019, Bangkok, Thailand, November 11-14, 2019, pp. 105-108, 2019, IEEE, 978-1-7281-2940-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Wei Wang 0177, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins |
A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 53(10), pp. 2783-2794, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Jiaji Mao, Mingqiang Guo, Sai-Weng Sin, Rui Paulo Martins |
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 65-II(10), pp. 1380-1384, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Andrés Fontana, Sebastián Matías Pazos, Fernando L. Aguirre, Felix Palumbo, Nahuel Vega, Nahuel A. Müller, Emanuel de la Fourniere, Mario Debray |
Heavy Ion Microbeam Experimental Study of ASET on a Full-Custom CMOS OpAmp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: 31st Symposium on Integrated Circuits and Systems Design, SBCCI 2018, Bento Gonçalves, RS, Brazil, August 27-31, 2018, pp. 1-5, 2018, IEEE, 978-1-5386-7431-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Maged ElAnsary, Nima Soltani, Hossein Kassiri, Ruben Machado, Suzie Dufour, Peter L. Carlen, Michael Thompson, Roman Genov |
50nW 5kHz-BW opamp-less ΔΣ impedance analyzer for brain neurochemistry monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, pp. 288-290, 2018, IEEE, 978-1-5090-4940-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Sung-En Hsieh, Chih-Cheng Hsieh |
A 0.4V 13b 270kS/S SAR-ISDM ADC with an opamp-less time-domain integrator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018, pp. 240-242, 2018, IEEE, 978-1-5090-4940-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Mohammad Reza Pazhouhandeh, Hossein Kassiri, Aly Shoukry, Iliya Weisspapir, Peter L. Carlen, Roman Genov |
Artifact-Tolerant Opamp-Less Delta-Modulated Bidirectional Neuro-Interface. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018, pp. 127-128, 2018, IEEE, 978-1-5386-4214-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy |
A Technique to Reduce the Capacitor Size in Two Stage Miller Compensated Opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 9th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2018, Bengaluru, India, July 10-12, 2018, pp. 1-4, 2018, IEEE, 978-1-5386-4430-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Yi Zhang 0023, Chia-Hung Chen, Tao He 0001, Gabor C. Temes |
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 52(4), pp. 1066-1076, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | I-Jen Chao, Bin-Da Liu, Soon-Jyh Chang, Chun-Yueh Huang, Hsin-Wen Ting |
Analyses of Splittable Amplifier Technique and Cancellation of Memory Effect for Opamp Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 25(2), pp. 621-634, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Subrahmanyam Boyapati, Jean-Michel Redoute, Maryam Shojaei Baghini |
Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10), pp. 2679-2690, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Liang Qi, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins |
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10), pp. 2641-2654, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Patinya Ketthong, Wimol San-Um, Banlue Srisuchinwong, Masayoshi Tachibana |
A simple current-reversible chaotic jerk circuit using inherent tanh(x) of an opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 14(17), pp. 20170192, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Greeshma R, Anoop V. K, B. Venkataramani |
A Novel Opamp and Capacitor Sharing 10 Bit 20 MS/s Low Power Pipelined ADC in 0.18µm CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017, pp. 594-599, 2017, IEEE Computer Society, 978-1-5090-6762-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Lida Kouhalvandi, Sercan Aygün, Ece Olcay Günes, Mürvet Kirci |
An improved 2 stage opamp with rail-to-rai! gain-boosted folded cascode input stage and monticelli rail-to-rail class AB output stage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017, Batumi, Georgia, December 5-8, 2017, pp. 542-545, 2017, IEEE, 978-1-5386-1911-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Marcello De Matteis, Andrea Donno, Stefano Marinaci, Stefano D'Amico, Andrea Baschirotto |
A 0.9V 3rd-order single-OPAMP analog filter in 28nm CMOS-bulk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWASI ![In: 7th IEEE International Workshop on Advances in Sensors and Interfaces, IWASI 2017, Vieste, Italy, June 15-16, 2017, pp. 155-158, 2017, IEEE, 978-1-5090-6707-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Wei Wang 0177, Yan Zhu 0001, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins |
A 5.35 mW 10 MHz bandwidth CT third-order ΔΣ modulator with single Opamp achieving 79.6/84.5 dB SNDR/DR in 65 nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
A-SSCC ![In: IEEE Asian Solid-State Circuits Conference, A-SSCC 2017, Seoul, Korea (South), November 6-8, 2017, pp. 285-288, 2017, IEEE, 978-1-5386-3178-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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20 | Yang Xu 0005, Zehong Zhang, Baoyong Chi, Nan Qi, Hualin Cai, Zhihua Wang 0001 |
A 5-/20-MHz BW Reconfigurable Quadrature Bandpass CT ΔΣ ADC With AntiPole-Splitting Opamp and Digital I/Q Calibration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(1), pp. 243-255, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Mohsen Tamaddon, Mohammad Yavari |
High-performance time-based continuous-time sigma-delta modulators using single-opamp resonator and noise-shaped quantizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 56, pp. 110-121, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Johannes Wagner 0003, Stefan Reich, Rudolf Ritter, Jens Anders, Maurits Ortmanns |
Finite GBW in single OpAmp CT ΣΔ modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016, pp. 468-471, 2016, IEEE, 978-1-5090-6113-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Aditya Raj, Shyam Akashe |
Power and Area Efficient Capacitor Multiplier Technique for Multi-Fin Two Stage Opamp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTCS ![In: ICTCS, pp. 93:1-93:5, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Zhijie Chen, Masaya Miyahara, Akira Matsuzawa |
A stability-improved single-opamp third-order ΣΔ modulator by using a fully-passive noise-shaping SAR ADC and passive adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, pp. 249-252, 2016, IEEE, 978-1-5090-2972-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|